Acer Extensa 390 Service Guide
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Page 81
Major Chips Description2-35 The chip provides two extra IRQ lines and one programmable chip select for motherboard Plug-and-Play functions. The interrupt lines can be routed to any of the available ISA interrupts. The on-chip IDE controller supports two separate IDE connectors for up to four IDE devices providing an interface for IDE hard disks and CD ROMs. The Ultra 33 specification (that supports the 33 MB/second transfer rate) has been implemented at this IDE controller. The ATA bus pins and the...
Page 82
2-36Service Guide· Independent programmable level/edge triggered channels · Counter/Timers · 8254 compatible timers for System Timer, Refresh Request, Speaker Output Use · Distributed DMA supported · 7 DMA Channels can be arbitrarily programmed as distributed channel · Serialized IRQ supported · Quiet/Continuous mode · Programmable (default 21) IRQ/DATA frames · Programmable START frame pulse width · Plug-and-Play port supported · One programmable chip select · Two steerable interrupt request lines ·...
Page 83
Major Chips Description2-37 - Hard disk - Floppy - Serial ports - Parallel port - Keyboard - Six programmable I/O groups - Three programmable memory spaces · Provides hot plugging events detection - CRT connector - AC power - Docking insert - Eject - Setup button - Hot key press · Multiple external wakeup events of Standby mode - Power button - Cover open - Modem ring - RTC alarm - EXTSW - DRQ2 · Suspend wakeup detected - Hot key - Modem ring - RTC alarm - Cover open - Docking insert - Power button - USB...
Page 84
2-38Service Guide· L2 cache power down and PCI CLKRUN control logic supported · 21 general purpose input signals, 24 general purpose output signals, 20 general purpose input/output signals · 16 external expandable general purpose inputs, 16 external expandable general purpose outputs · LCD control · All registers readable/restorable for proper resume from Suspend state · Built-in PCI IDE controller · Supports Ultra 33 Synchronous DMA Mode transfers up to Mode 2 Timing (33 MB/sec) · Supports PIO Modes up...
Page 85
Major Chips Description2-39 2.2.2.2 Pin Diagram 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 A NCAD21AD18CBEJ2STOPJAD14AD9AD5AD0SIDED7SIDED10SIDED2 SIDED15SIDEAKJSIDECS3J PIDED6PIDED10PIDED3 NC NC B NCAD22AD19AD16DEVSELJ AD15AD10AD6AD1PHLDJSIDED5SIDED12SIDED0SIDEIRDY SIDECS1JPIDED9PIDED11 PIDED13 PIDED2 PIDED14 C CBEJ3AD23AD20AD17TRDYJCBEJ1AD11AD7AD2PHLDAJ SIDED9SIDED3SIDED14SIDEIORJ SIDEA2 PIDED5 PIDED4 PIDED1 PIDED15PIDED0 D AD26AD25AD24PCIRSTJIRDYJ PARAD12CBEJ0AD3 CLKRUNJ...
Page 86
2-40Service Guide2.2.2.3 Numerical Pin List Table 2-5M1533 Numerical Pin ListNo.NameTypeNo.NameTypeNo.NameTypeA1...
Page 89
Major Chips Description2-43 Table 2-5M1533 Numerical Pin ListNo.NameTypeNo.NameTypeNo.NameTypeW9MEMRJI/OE8AD8I/OY13EXTSWIW10DACKJ6OA7AD9I/OE5FRAMEJI/OW11SD11I/OB7AD10I/OH10GNDPW12SD14I/OC7AD11I/OH11GNDPW13SPLEDOD7AD12I/OH12GNDPW14XD2I/OE7AD13I/OH13GNDPW15XD6I/OA6AD14I/OH8GNDPW16SETUPJIB6AD15I/OH9GNDPW17GPI4IB4AD16I/OJ10GNDPW18GPI7IC4AD17I/OJ11GNDPW19GPI8IA3AD18I/OJ12GNDPW20---B3AD19I/OJ13GNDPY1...