NEC Mcu 5000a Multipoint Control Unit Equipment Manual

NECA 340-414-100 Revision 2.0Page 39
MCU 5000A Multipoint Control Unit General Description Manual
F:  A CODEC Unit 4.20
The A CODEC unit, which accommodates four audio channels per unit. 
Two A CODEC units  can be installed in a MCU 5000A subrack (Total eight 
channels per subrack).
(1) The received audio coding signal (64/56/48 kbps, µ -law PCM or SB-
ADPCM) from multiplexing/demultiplexing part (EC H221 MUX unit) is 
decoded to PCM signal (8 kHz×14 bit or 16 kHz×16 bit).  The output 
level is adjusted...

Page 40NECA 340-414-100 Revision 2.0
General Description Manual MCU 5000A Multipoint Control Unit
(7) Audio Signal Coding
The subtracted PCM signal is compress-coded with 64/56/48 kbps, µ -law 
PCM or SB-ADPCM.  This signal is sent to the multiplexing/
demultiplexing part (EC H221 MUX unit) as send audio coding signal.
(8) Muting
When receiving the muting signal from the control part (M CONT unit), 
the receive audio decoding signal (MUTE 1) or substructed summing 
PCM signal (MUTE 2) is muted.
(9) Test...

NECA 340-414-100 Revision 2.0Page 41
MCU 5000A Multipoint Control Unit General Description Manual
Figure 4-10:   Block Diagram of A CODEC Unit
SB-ADPCM
DECODER
64 kbps
m-Law PCM
DECODER
SB-ADPCM
DECODER
64 kbps
m-Law PCM
DECODERVOICE LEVEL
CALCULATIONVOICE
DETECTIONSPEECH
DETECTIONM
U
X
AT T E N U AT I O N
DELAY
+ -
+
TEST TONE
OSCILLATOR
(+5v)
(+5v)
64/56 kbps
VOICE
DATA
(RECEIVE)
64/56 kbps
VOICE
DATA
(SEND)LOOP MUTE1TONE1 THR BP FPVOICE POW
INFORMATION
DATA
VOICE POWER
INFORMATION
DATA
AT T E N UAT I...

Page 42  NECA 340 -41 4-1 00 Revisi on  2.0
General Descr ipt ion Manual   MCU 5000A Mult ipoint Con trol Unit
G:  A SUM Unit  General 

NECA 340-414-100 Revision 2.0Page 43
MCU 5000A Multipoint Control Unit General Description Manual
Figure 4-11:   Block Diagram of Voice Signal Process 1
LOAD
CONTROLLER
TA L K E R
IDENTIFIER
MESSAGE TONE
OSCILLATOR
D/A
+
+
+
+
+
+
+
+
TO A CODECTO  M CONT
VOICE/NON-VOICE CH 1
VOICE/NON-VOICE CH 8
LOADING VALUE CH 1
LOADING VALUE CH 8
TALKER/NON-TALKER CH 1
TALKER/NON-TALKER CH 8
CH 1 PCMIN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT
IN
OUT CH 2 PCM
CH 3 PCM
CH 4 PCM
CH 5 PCM
CH 6 PCM
CH 7 PCM
CH 8 PCM...

Page 44NECA 340-414-100 Revision 2.0
General Description Manual MCU 5000A Multipoint Control Unit
Figure 4-12:   Block Diagram of Voice Signal Process 2
TALK DECISION
LOAD CONTROL
S
TALK DECISION
LOAD CONTROL
S
-
DEC
DOCVD(MDRn)
CODED VOICE
SIGNAL INPUT
(MDRn)
CODED VOICE
SIGNAL OUTPUTVOICE/NON-VOICE
TALKING/NON-TALKING (APD)
A.T.T. VALUE (AAD)
DECODED VOICE OUTPUT (LDR)
SUM VOICE SIGNAL INPUT (LSD)
CH 1
CH 2
CH 3
CH 4
CH 5
CH 6
CH 7
CH 8MUX
DEM
MUX
DEM
A CODEC #2
(E32-441-Y1438-0A00)A CODEC #1...

NECA 340-414-100 Revision 2.0Page 45
MCU 5000A Multipoint Control Unit General Description Manual
H:  PG/SIO Unit General
4.22
This unit generates the clock which is locked the phases of the internal 
clock within MCU 5000A and external  clock  extracted  from  the line by LIF 
unit.  The four RS-232C interface ports are provided.  Fig. 4-13 shows the Block 
Diagram of  PG/SIO unit. 
Functions
(1) Clock Phase Locking (PLO: Phase Locked Oscillator)
Each internal clock phase (1.544 MHz, 4.096 MHz, or...

Page 46NECA 340-414-100 Revision 2.0
General Description Manual MCU 5000A Multipoint Control Unit
Figure 4-13:   Block Diagram of PG/SIO Unit
4
44 4 SERIAL
CONTROLLER
SERIAL
CONTROLLER
INTERRUPT
CONTROLLER
INTERRUPT
CONTROLLER
1.544 MHz
PLO CIRCUIT
4.096 MHz
PLO CIRCUIT
10.752 MHz
PLO CIRCUIT OSCILLATORSEL CLK LOSS
DETECTOR
1.5M LIF UNIT1.5M LIF UNIT M CONT UNITCPU INF
CLK LOSS
SLIP1
SLIP2
SLIP3
CH8CH7
CH6
CH5
CH4
CH3
CH2
CH1LINE LINECPU BUSPG/SIO
PLO:  PHASE LOCKED OSCILLATORRS-232C CH4
RS-232C CH4...

NECA 340-414-100 Revision 2.0Page 47
MCU 5000A Multipoint Control Unit General Description Manual
I:  M CONT Unit General
4.23
The M CONT unit consists of V53CPU (UPD70236), 256 kbytes ROM 
(UPD27C1001×2), 3.6 Mbytes RAM (UPD424400×8), (UPD431000×2),1 
Mbytes Memory Card, and Real-time Clock (RTC-62421) etc., and which 
controls the MCU 5000A.  The interruption and serial communication control 
operation are performed with the V53 ICU or SCU.  Fig. 4-14 shows the Block 
Diagram of M CONT unit....

Page 48NECA 340-414-100 Revision 2.0
General Description Manual MCU 5000A Multipoint Control Unit
Figure 4-14:   Block Diagram of M CONT Unit
OSC 31.9488 MHz CLOCK IN UPD70236 (V53)
INT
SCUTTL/
RS-232C
CN3 UPD4711A
ADDRESS
DEC
RAM
CARD
SRAM X 2
(128 KB) DRAM X 2
(3.5 MB) ROM X 2
(256 KB)UPD431000 UPD424400
UPD27C1001AD
ADDRESS
ADDRESS BUS
DATA
DATA BUS
CONT
CONTROL BUS
REAL TIME
CLOCK
SYS BUS