Motorola Radius Cm200 Cm300 Pm400 Detailed 6881098c00 A Manual

							Receive Audio Circuits2-19
9.0 Receive Audio Circuits
Figure 2-9 Receive Audio Paths
9.1 Squelch Detect
The radio’s RF circuits are constantly producing an output at the discriminator (IF IC). This signal 
(DISC AUDIO) is routed to the ASFIC CMP’s squelch detect circuitry input DISC (U504-pin 2). All of 
the squelch detect circuitry is contained within the ASFIC CMP. Therefore from a user’s point of 
view, DISC AUDIO enters the ASFIC CMP, and the ASFIC CMP produces two CMOS logic outputs 
based on the result. They are CH ACT (U504-16) and SQ DET (U504-17).
The squelch signal entering the ASFIC CMP is amplified, filtered, attenuated, and rectified. It is then 
sent to a comparator to produce an active high signal on CH ACT. A squelch tail circuit is used to 
produce SQ DET (U504-17) from CH ACT. The state of CH ACT and SQ DET is high (logic “1”) 
when carrier is detected, otherwise low (logic “0”).
CH ACT is routed to the µP pin 84 while SQ DET is routed to the µP pin 83.
SQ DET is used to determine all audio mute / unmute decisions except for Conventional Scan. In 
this case CH ACT is a pre-indicator as it occurs slightly faster than SQ DET.
FLT RX AUDIO
P111
16
1EXTERNAL
SPEAKER
INTERNAL
SPEAKER ACCESSORY
CONNECTOR
CONTROL HEAD
CONNECTOR
HANDSET
AUDIO 1820 19
J2 INT
SPKR-
SPKR +
SPKR -1
9
2
U509
41 10
INT
SPKR+
4
6
DISC
ASFIC_CMP
U504
AUDIO 
PA
U502
VOLUME
ATTEN.
FILTER AND
DEEMPHASIS
17
MICRO 
CONTROLLER
U40380 FROM
RF
SECTION
(IF IC)
LIMITER, RECTIFIER
FILTER, COMPARATOR
SQ DETSQUELCH
CIRCUIT
16
PL  FILTER 
LIMITER
CH ACT
AUX RX43
18
LS IO
U IOAUDIO
8384
39URX OUT
DISC
AUDIO37
85
GCB4
MUTE
GCB1 14
U505 
						

							2-20THEORY OF OPERATION
9.2 Audio Processing and Digital Volume Control
The receiver audio signal (DISC AUDIO) enters the controller section from the IF IC where it is.DC 
coupled to ASFIC CMP via the DISC input U504-pin 2. The signal is then applied to both the audio 
and the PL/DPL paths
The audio path has a programmable amplifier, whose setting is based on the channel bandwidth 
being received, an LPF filter to remove any frequency components above 3000 Hz, and a HPF to 
strip off any sub-audible data below 300 Hz. Next, the recovered audio passes through a de-
emphasis filter (if it is enabled to compensate for Pre-emphasis which is used to reduce the effects 
of FM noise). The IC then passes the audio through the 8-bit programmable attenuator whose level 
is set depending on the value of the volume control. Finally the filtered audio signal passes through 
an output buffer within the ASFIC CMP. The audio signal exits the ASFIC CMP at AUDIO output 
(U504 pin 41).
The µP programs the attenuator, using the SPI BUS, based on the volume setting. The minimum / 
maximum settings of the attenuator are set by codeplug parameters.
Since sub-audible signaling is summed with voice information on transmit, it must be separated 
from the voice information before processing. Any sub-audible signaling enters the ASFIC CMP 
from the IF IC at DISC U504-2. Once inside, it goes through the PL/DPL path. The signal first 
passes through one of the two low-pass filters, either the PL low-pass filter or the DPL/LST low-pass 
filter. Either signal is then filtered and goes through a limiter and exits the ASFIC CMP at LSIO 
(U504-pin 18). At this point, the signal will appear as a square wave version of the sub-audible 
signal which the radio received. The µP U403 pin 80 will decode the signal directly to determine if it 
is the tone / code which is currently active on that mode.
9.3 Audio Amplification Speaker (+) Speaker (-)
The output of the ASFIC CMP’s digital volume pot, U504-pin 41 is routed through DC blocking 
capacitor C5049 to the audio PA (U502 pin 1 and 9). 
The audio power amplifier has one inverted and one non-inverted output that produces the 
differential audio output SPK+/SPK- (U502 pins 4 and 6)
The audio PA is enabled via the ASFIC CMP (U504-GCB1). When the base of Q501 is low, the 
transistor is off and U502-pin 8 is high, using pull up resistor R5041, and the audio PA is ON. The 
voltage at U502-pin 8 must be above 8.5 Vdc to properly enable the device. 
If the voltage is between 3.3 and 6.4 V, the device will be active but has its input (U502-pins 1/9) off. 
This is a mute condition which is used to prevent an audio pop when the PA is enabled.
The SPK+ and SPK- outputs of the audio PA have a DC bias which varies proportionately with B+ 
(U502- pin 7). B+ of 11 V yields a DC offset of 5 V, and B+ of 17 V yields a DC offset of 8.5 V. If 
either of these lines is shorted to ground, it is possible that the audio PA will be damaged. SPK+ and 
SPK- are routed to the accessory connector (P1-pin 1 and 16) and to the control head (connector 
J2-pins 19 and 20). 
						

							Receive Signalling Circuits2-21
9.4 Handset Audio
Certain handheld accessories have a speaker within them which require a different voltage level 
than that provided by U502. For these devices HANDSET AUDIO is available at control head 
connector J2 pin18.
The received audio from the output of the ASFIC CMP’s digital volume attenuator is routed to U505 
pin 2 where it is amplified. This signal is routed from the output of the op-amp U505 to J2-pin 18. 
From the control head, the signal is sent directly to the microphone jack. 
9.5 Filtered Audio and Flat Audio
The ASFIC CMP output audio at U504-pin 39 is filtered and de-emphasized, but has not gone 
through the digital volume attenuator. From ASFIC CMP U504-pin 39 the signal is routed via R5034 
through gate U509-pin 12 and AC coupled to U505-pin 6. The gate controlled by ASFIC CMP port 
GCB4 selects between the filtered audio signal from the ASFIC CMP pin 39 (URXOUT) or the 
unfiltered (flat) audio signal from the ASFIC CMP pin 10 (UIO). Resistors R5034 and R5021 
determine the gain of op-amp UU505-pin 6 for the filtered audio while R5032 and R5021 determine 
the gain for the flat Audio. The output of U505-pin 7 is then routed to P1 pin 11 via DC blocking 
capacitor C5003. Note that any volume adjustment of the signal on this path must be done by the 
accessory.
10.0 Receive Signalling Circuits
Figure 2-10 Receive Signalling Paths
10.1 Sub-Audio Data (PL/DPL) and High Speed Data Decoder
The ASFIC CMP (U504) is used to filter and limit all received data. The data enters the ASFIC CMP 
at input DISC (U504 pin 2). Inside U504 the data is filtered according to data type (HS or LS), then it 
is limited to a 0-3.3 V digital level. The MDC and trunking high speed data appear at U504-pin 19, 
where it connects to the µP U403 pin 80.
DET AUDIO
DISCRIMINATOR AUDIO
FROM RF SECTION
(IF  IC)19
18
25
2
82
80
DISC
PLCAP2LSIO HSIO DATA FILTER
AND DEEMPHASISLIMITER
FILTER
LIMITERASFIC_CMP
U504
MICRO
CONTROLLER
U403
85 44
8 PLEAP 
						

							2-22THEORY OF OPERATION
The low speed limited data output (PL, DPL, and trunking LS) appears at U504-pin18, where it 
connects to the µP U403-pin 80.
The low speed data is read by the µP at twice the frequency of the sampling waveform; a latch 
configuration in the ASFIC CMP stores one bit every clock cycle. The external capacitors C5028, 
and C5026 set the low frequency pole for a zero crossings detector in the limiters for PL and HS 
data. The hysteresis of these limiters is programmed based on the type of received data.
10.2 Alert Tone Circuits
When the software determines that it needs to give the operator an audible feedback (for a good 
key press, or for a bad key press), or radio status (trunked system busy, phone call, circuit failures), 
it sends an alert tone to the speaker. It does so by sending SPI BUS data to U504 which sets up the 
audio path to the speaker for alert tones. The alert tone itself can be generated in one of two ways: 
internally by the ASFIC CMP, or externally using the µP and the ASFIC CMP.
The allowable internal alert tones are 304, 608, 911, and 1823 Hz. In this case a code contained 
within the SPI BUS load to the ASFIC CMP sets up the path and determines the tone frequency, 
and at what volume level to generate the tone. (It does not have to be related to the voice volume 
setting.)
For external alert tones, the µP can generate any tone within the 100-3000 Hz audio band. This is 
accomplished by the µP generating a square wave which enters the ASFIC CMP at U504 pin 19. 
Inside the ASFIC CMP this signal is routed to the alert tone generator.
The output of the generator is summed into the audio chain just after the RX audio de-emphasis 
block. Inside U504, the tone is amplified and filtered, then passed through the 8-bit digital volume 
attenuator, which is typically loaded with a special value for alert tone audio. The tone exits at U504-
pin 41 and is routed to the audio PA like receive audio. 
						

							Chapter 3
TROUBLESHOOTING CHARTS
This section contains detailed troubleshooting flowcharts. These charts should be used as a guide in 
determining the problem areas. They are not a substitute for knowledge of circuit operation and 
astute troubleshooting techniques. It is advisable to refer to the related detailed circuit descriptions 
in the theory of operation sections prior to troubleshooting a radio.
Most troubleshooting charts end up by pointing to an IC to replace. It is not always noted, but it is 
good practice to verify supplies and grounds to the affected IC and to trace continuity to the 
malfunctioning signal and related circuitry before replacing any IC. For instance, if a clock signal is 
not available at a destination, continuity from the source IC should be checked before replacing the 
source IC. 
						

							3-2TROUBLESHOOTING CHARTS
1.0 Troubleshooting Flow Chart for Receiver RF (Sheet 1 of 2)
Problem in 12 KHz and 
25 KHz channel spacing
9V on
R310 (LNA)
OK
?Check
RX_ENNoGo to 
DC Section
Ye s
RX_EN
ON ?NoSW ProblemYe s
START
LOC_DIST
ON
?SW Problem
LO
POWER
OK ?
Go to SYN 
Section
Ye s
Ye s No
No
Go
to A
Ye s
3 V
to U301
Okay ?No
Check
LOC_DIST
Go to
DC Section
Ye s
Check D301-304
Replace IF Filters( FL304, FL301
If problem in 25 KHz spacing
Check
TPI
Check 5V
on R337 (UHF),
R336 (VHF)
5V
(IF AMP)
OK ?Go to 
DC SectionYe s NoCheck 3V
on R339  
						

							Troubleshooting Flow Chart for Receiver RF (Sheet 1 of 2) 3-3
1.1Troubleshooting Flow Chart for Receiver (Sheet 2 of 2)
3V
(IFIC -Vcc)
OK ?
Installation
OK ?
Ye s
Ye s No
No
A From
Check visually
FE and BE
components
installation ?
Inject - 40dBm (CW)
to RF connector
Check Power on
C335 (UHF) C332 (VHF)
RF
Power
> -28 dBM
?Ye s NoCheck Power on
C337 (UHF),
C336 (VHF)
Go to 
DC Section
Check 
the component
FE Problem
Replace 
Q303, Q301
Check passive
componentsRF
Power
> -28 dBM
?Ye s
NoReplace 
Q305, Q300, U302
Check passive
componentsCheck Y301
44.395 MHz
Y301
OK
?Ye s NoReplace Q302, Y300
Check D301 - 304
Replace Y301
3V to
U301
OK
?Ye s No
Replace U300Go to DC Section 
						

							3-4TROUBLESHOOTING CHARTS
2.0 Troubleshooting Flow TX RF (No Output Power)
START
Key the radio using
Radster (type k)
NoYe s
Ye sNoTune the
PA_BIAS
Press F6 and
read the ASFIC byte
Is
Byte
#04=0
?Put 80 Hex in byte #06
and measure the
Output Power
Is
POUT
< 1 Watt
?Replace
L108
End 
						

							Troubleshooting Flow TX RF (No Output Power) 3-5
2.1Troubleshooting Flow TX RF (No Output Power/No Current)
START
Key the radio using
Radster (type k)
NoYe s
Ye sNoTune the
PA_BIASMeasure the
resistance from
R131 to groundIs 
POUT >
10 Watts
Put 80 Hex in byte #06
and measure the
Output Power
Is
20kOhms
< R 
						

							3-6TROUBLESHOOTING CHARTS
2.2Troubleshooting Flow TX RF (Not Txing at Nominal power)
Press F6 and read the ASFIC byte
Is byte
#04=0
?
No
Tune the PA_BIAS
Ye s
START
Key the radio using radster (type k)
Ye s
Measure the resistance 
from R131 to ground
Is R131
< 1K Ohm
?
No
Repalace PA (Q100)Tune the K and M factors 
using the Tuner tool