Motorola Radius Cm200 Cm300 Pm400 Detailed 6881098c00 A Manual
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Receive Signalling Circuits2-21 9.4 Handset Audio Certain handheld accessories have a speaker within them which require a different voltage level than that provided by U502. For these devices HANDSET AUDIO is available at control head connector J2 pin18. The received audio from the output of the ASFIC CMP’s digital volume attenuator is routed to U505 pin 2 where it is amplified. This signal is routed from the output of the op-amp U505 to J2-pin 18. From the control head, the signal is sent directly to the microphone jack. 9.5 Filtered Audio and Flat Audio The ASFIC CMP output audio at U504-pin 39 is filtered and de-emphasized, but has not gone through the digital volume attenuator. From ASFIC CMP U504-pin 39 the signal is routed via R5034 through gate U509-pin 12 and AC coupled to U505-pin 6. The gate controlled by ASFIC CMP port GCB4 selects between the filtered audio signal from the ASFIC CMP pin 39 (URXOUT) or the unfiltered (flat) audio signal from the ASFIC CMP pin 10 (UIO). Resistors R5034 and R5021 determine the gain of op-amp UU505-pin 6 for the filtered audio while R5032 and R5021 determine the gain for the flat Audio. The output of U505-pin 7 is then routed to P1 pin 11 via DC blocking capacitor C5003. Note that any volume adjustment of the signal on this path must be done by the accessory. 10.0 Receive Signalling Circuits Figure 2-10 Receive Signalling Paths 10.1 Sub-Audio Data (PL/DPL) and High Speed Data Decoder The ASFIC CMP (U504) is used to filter and limit all received data. The data enters the ASFIC CMP at input DISC (U504 pin 2). Inside U504 the data is filtered according to data type (HS or LS), then it is limited to a 0-3.3 V digital level. The MDC and trunking high speed data appear at U504-pin 19, where it connects to the µP U403 pin 80. DET AUDIO DISCRIMINATOR AUDIO FROM RF SECTION (IF IC)19 18 25 2 82 80 DISC PLCAP2LSIO HSIO DATA FILTER AND DEEMPHASISLIMITER FILTER LIMITERASFIC_CMP U504 MICRO CONTROLLER U403 85 44 8 PLEAP
2-22THEORY OF OPERATION The low speed limited data output (PL, DPL, and trunking LS) appears at U504-pin18, where it connects to the µP U403-pin 80. The low speed data is read by the µP at twice the frequency of the sampling waveform; a latch configuration in the ASFIC CMP stores one bit every clock cycle. The external capacitors C5028, and C5026 set the low frequency pole for a zero crossings detector in the limiters for PL and HS data. The hysteresis of these limiters is programmed based on the type of received data. 10.2 Alert Tone Circuits When the software determines that it needs to give the operator an audible feedback (for a good key press, or for a bad key press), or radio status (trunked system busy, phone call, circuit failures), it sends an alert tone to the speaker. It does so by sending SPI BUS data to U504 which sets up the audio path to the speaker for alert tones. The alert tone itself can be generated in one of two ways: internally by the ASFIC CMP, or externally using the µP and the ASFIC CMP. The allowable internal alert tones are 304, 608, 911, and 1823 Hz. In this case a code contained within the SPI BUS load to the ASFIC CMP sets up the path and determines the tone frequency, and at what volume level to generate the tone. (It does not have to be related to the voice volume setting.) For external alert tones, the µP can generate any tone within the 100-3000 Hz audio band. This is accomplished by the µP generating a square wave which enters the ASFIC CMP at U504 pin 19. Inside the ASFIC CMP this signal is routed to the alert tone generator. The output of the generator is summed into the audio chain just after the RX audio de-emphasis block. Inside U504, the tone is amplified and filtered, then passed through the 8-bit digital volume attenuator, which is typically loaded with a special value for alert tone audio. The tone exits at U504- pin 41 and is routed to the audio PA like receive audio.
Chapter 3 TROUBLESHOOTING CHARTS This section contains detailed troubleshooting flowcharts. These charts should be used as a guide in determining the problem areas. They are not a substitute for knowledge of circuit operation and astute troubleshooting techniques. It is advisable to refer to the related detailed circuit descriptions in the theory of operation sections prior to troubleshooting a radio. Most troubleshooting charts end up by pointing to an IC to replace. It is not always noted, but it is good practice to verify supplies and grounds to the affected IC and to trace continuity to the malfunctioning signal and related circuitry before replacing any IC. For instance, if a clock signal is not available at a destination, continuity from the source IC should be checked before replacing the source IC.
3-2TROUBLESHOOTING CHARTS 1.0 Troubleshooting Flow Chart for Receiver RF (Sheet 1 of 2) Problem in 12 KHz and 25 KHz channel spacing 9V on R310 (LNA) OK ?Check RX_ENNoGo to DC Section Ye s RX_EN ON ?NoCheck Q306, Q300 and U403Ye s START LOC_DIST ON ?Check Q304, D305 and U403 LO POWER OK ? Go to SYN Section Ye s Ye s No No Go to A 3 V to U301 Okay ?No Check LOC_DIST Go to DC Section Ye s Check D301-304 Replace IF Filters( FL304, FL301 If problem in 25 KHz spacing Check TPI Check 5V on R337 (UHF), R336 (VHF) 5V (IF AMP) OK ?Go to DC SectionYe s NoCheck 3V on R339
Troubleshooting Flow Chart for Receiver RF (Sheet 1 of 2) 3-3 1.1Troubleshooting Flow Chart for Receiver (Sheet 2 of 2) 3V (IFIC -Vcc) OK ? Installation OK ? Ye s Ye s No No A From Check visually FE and BE components installation ? Inject - 40dBm (CW) to RF connector Check Power on C335 (UHF) C332 (VHF) RF Power > -28 dBM ?Ye s NoCheck Power on C337 (UHF), C336 (VHF) Go to DC Section Check the component FE Problem Replace Q303, Q301 Check passive componentsRF Power > -28 dBM ?Ye s NoReplace Q305, Q300, U302 Check passive componentsCheck Y301 44.395 MHz Y301 OK ?Ye s NoReplace Q302, Y300 Check D301 - 304 Replace Y301 3V to U301 OK ?Ye s No Replace U300Go to DC Section
3-4TROUBLESHOOTING CHARTS 2.0 Troubleshooting Flow Chart for 40 W Transmitter (Sheet 1 of 3) START Ye s No Check components between Q100 and RF output, Antenna Switch D104, D103, VR102 and Q106 No or too low power when keyed Current increase when keyed? Check power settings, tuning & components between U103 Pin 3 and ASFIC Pin 6 before replacing ASFIC Control Voltage at TP150 >4Vdc?Check PA Stages >4A Voltage U103 pin 5 = 4.7V? U103 Pin 3 1.8Vdc Check 9.3V Regulator U501 Ye s Ye sNo No Ye sCheck U103 Check forward Power Sense Circuit No Short U100 Pin 3 to ground Voltage at TP150 rises?Check PA Stages Check Forward Power Sense Circuit Ye s No >500mA &
Troubleshooting Flow Chart for 40 W Transmitter (Sheet 1 of 3) 3-5 2.1Troubleshooting Flow Chart for 40 W Transmitter (Sheet 2 of 3) No Ye s Ye sNo Check bias tuning before replacing U504 Check PA Stages No or too low power when keyed DC Voltage at Q101 & Q102 base=0? DC Voltage at U103 Pin 8 Check U510 Check resistive network at Pin 9 and 10 of U103 before replacing U101 Measure DC Voltage at Pin 2 & 3 of U5401 Pin 2 Voltage 0.62 x Voltage at Pin 1 Replace U5410 Pin 3 Voltage 0.51 x Voltage at Pin 1 Replace U5410 DC Voltage at PA_CURRENT line? Replace Q105 Check Final PA Stages ASFIC U504 Pin 5 2-3V Check components be- tween ASFIC and Q105 before replacing Q105 DC Voltage at U103 Pin 10=8.9V Check Q102, Q101, R122, R165 Check U103 and Resistive Network at Pin 10 of U103 before replacing U101 No No Ye s >5V 2 to 5V Ye s Supply Voltage 2-3V Ye s No 0V
3-6TROUBLESHOOTING CHARTS 2.2Troubleshooting Flow Chart for 40 W Transmitter (Sheet 3 of 3) No Ye s Ye sNo Check Final PA Stage PA_Bias Voltage at R134 RF Voltage after C1044 >100mV? Voltage across R122 >2V? RF Voltage Q105 gate >1V? RF Voltage Q100 gate >7V? Check components between Q100 & antenna connector Replace Q100 Check FGU (U5301) Check components between C1044 & C1117 Check components between C117 & Q105 Check components between Q105 & Q100 No No Ye s Ye s 1-4VSupply Voltage Check components between ASFIC & Q100 before re- placing Q100 RF Voltage after C1044 >100mV? Check Bias Tuning before replacing ASFIC U504 Ye s No0V
Troubleshooting Flow Chart for Synthesizer3-7 3.0 Troubleshooting Flow Chart for Synthesizer 5V at pin 6 of D200 Is information from uP U403 correct ? Is U200 Pin 47 at = 14.6VDC ? Is U201 Pin 19 4.5 VDC in TX? (at VCO section) ? Sta rt Visual check of the Board OK?Correct Problem Check 5V Regulator U503 +5V at U200 Pin’s 13 & 30 ? Is 16.8MHz Signal at U200 Pin 19 ? Check Y201 and associated Parts Are signals at Pin’s 14 &15 of U200 ? Check R228Check R201 Is U200 Pin 2 >4.5 VDC in Tx &
3-8TROUBLESHOOTING CHARTS 4.0 Troubleshooting Flow Chart for VCO Are Q200 Base at 2.9V Collector at 6.6V Emitter at 2.2V Are U201 Pins 15 at 1.0V 10 at 3.9V 16 at 1.8V Low or no RF Signal at TP1 Visual check of board OK? 370mV DC at U201 Pin 19 NO YES at base of Q200 NO NO NO YES YESYESLow or no RF Signal at input to PA 4.5V DC at U201 Pin 19 Is RF available at C2060 YES YESYES YES NO NO NO NO NO Audio =180mVRMSat “-” Side of 4.5VDC at D205 If R211 and R12 are OK, then replace D205 Replace R211 Replace R212 NONO YES YES If parts between R109 & U201 Pin10 are OK, replace U201 TX VCO RX VCO Correct ProblemVisual check of board OK? Check runner between U200 Pin 2 and U201 Pin 19 Is RF available Replace U201 If all parts associated with the pins are OK, replace Q200 If all parts from collector of Q200 to TP1 are OK, replace Q200 Power OK but no modulation Check parts to pre-driver If all parts associated with the pins are OK, replace U201 YESYES Make sure Synthesizer is working correctly and runner between U200 Pin 28 and U201 Pin 14 & 18 is OK 4.5V DC OK ? OK? OK? D205 at U201 Pin 14 & 18 4.5V DC OK ? at U201 Pin 14 & 18 NO