Motorola Astro Xts5000 Detailed 6881094c31 E Manual
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November 16, 20066881094C31-E 3-2Theory of Operation: Transceiver Board Figure 3-1. XTS 5000 Overall Block Diagram 3.1 Transceiver Board The transceiver (XCVR) board performs the transmitter and receiver functions necessary to translate between voice and data from the VOCON board and the modulated radio-frequency (RF) carrier at the antenna. The transceiver board contains all the radio’s RF circuits for the following major components: • Receiver • Transmitter • Frequency Generation Unit (FGU) Figure 3-2 illustrates the VHF transceiver board block diagram while Figure 3-3 on page 3-3 illustrates the transceiver UHF Range 1 and 700–800 MHz transceiver block diagrams. Figure 3-2. Transceiver (VHF) Block Diagram (Power and Control Omitted) Reference Oscillator FracN U203 MOD INLoop Filter LPF FL200EPIC Y200 DAC U203VCOVCOBIC U202 VCO Crystal Filter FL403Mixer U401 2ND LO Sample Clk RX_SSI to VOCON Board TX_SSI from VOCON Board Preselector Filter FL401PCIC U104Power Module TX Buffer Q304TX Driver Amplifier U102 RF Power Detector D103Directional Coupler U101 Antenna Switch Preselector Filter FL402 RX LNA Q401To Antenna Harmonic Filter Serial EE PROM U4 ABACUS III U500 MAEPF-27529-O 3 3
6881094C31-ENovember 16, 2006 Theory of Operation: Transceiver Board3-3 Figure 3-3. Transceiver (UHF Range 1, UHF Range 2 and 700–800 MHz) Block Diagram (Power and Control Omitted) 3.1.1 Interconnections This section describes the various interconnections for the transceiver board. 3.1.1.1 Battery Connector J3 Battery connector J3 consists of three gold-plated contacts on the printed circuit board that mate with a B-plus connector assembly. Signal descriptions are in Table 3-1. 3.1.1.2 VOCON Connector P1 VOCON connector P1 (located on the XCVR board) consists of 26 gold-plated pads for the 26-pin compression connector, and one plated tool hole (pin 27) used for connector alignment. This is a digital interface carrying DC power, control, and data between the XCVR and VOCON boards. P1 connects through the compression connector to P201 on the VOCON board.Table 3-1. Battery Connector J3 Pin No.SignalDescription 1 BATT Battery positive terminal, nominally 7.5 Vdc 2 BSTAT Battery status, from battery to VOCON 3 BAT_RTN Battery negative terminal, tied to PCB ground Reference Oscillator FracN MOD INLoop Filter LPF FL200Y200 DAC U203VCO 1VCOBIC VCO 2 Crystal FilterMixer 2ND LO Sample Clk RX_SSI to VOCON Board TX_SSI from VOCON Board Preselector FilterPCIC U104Power Module TX Buffer TX DriverAmplifier U102 D101 D102 U106 Directional Coupler U101 Antenna Switch Preselector Filter RX LNATo Anten naHarmonic Filter Serial EE PROM U4 ABACUS III U500 MAEPF-27530-A VCO 3 VCO 4 3 3 Note: 700/800 MHz has 3 VCOs (2 TX/RX, 1 TX) UHF Range 1, has 4 VCOs (2 TX, 2 RX) UHF Range 2, has 3 VCOs (2 Rx, 1 TX)See Note
November 16, 20066881094C31-E 3-4Theory of Operation: Transceiver Board Table 3-2 lists the connector pins, their signals, and functions. SPI refers to serial peripheral interface, which is the control bus from the microprocessor. SSI is the serial synchronous interface bus for data to and from the DSP. There is a RX SSI bus for demodulated data from the receiver and a TX SSI bus for modulation data to the transmitter. Table 3-2. VOCON Connector P1 Pin No.VOCON SignalXCVR SignalXCVR I/OTy p eDescription 1 UNSW_B+ FUB+ O dc Fused B+ to VOCON 2 UNSW_B+ FUB+ O dc Fused B+ to VOCON 3 LOCK_DET* LOCK O status FGU lock detect 4 TX_SSI_DATA TXTD O ssi TX SSI data 5 SSI_CLK RXCK O ssi RX SSI clock 6 SSI_FSYNC SSFS O ssi RX SSI frame sync 7 16.8MHz F168 O RF 16.8 MHz reference clock 8 SW_B+ SWB+ I dc Switch control 9 TX_SSI_FSYNC TXFS I ssi TX SSI frame sync 10 TX_SSI_CLK TXCK I ssi TX SSI clock 11 G N D G N D 12 RX_SSI_DATA RXDO O ssi RX SSI data 13 ABACUS3_CS ABCS I ssi SPI Abacus chip select 14 GND GND 15 VSW1 VSW1 I dc Regulated 3.8 V 16 SPI_CLK_A SPCK I spi SPI clock 17 SPI_MISO_A MISO O spi SPI data out 18 EEPROM_SEL* EECS I spi SPI EEPROM chip select 19 TX_INHIBIT TXINH I control TX inhibit control for secure 20 GND GND 21 BAT_STATUS BSTAT O dc Battery status 22 GND GND 23 SPI_MOSI_A MOSI I/O spi SPI data I/O 24 UNI_CS USEL I spi SPI universal chip select 25 AD_CS ADCS I spi SPI ADC chip select 26 POR* RSTL I/O control asynchronous reset, active low
6881094C31-ENovember 16, 2006 Theory of Operation: Transceiver Board3-5 3.1.1.3 Antenna Port J2 Antenna port J2 is a surface-mount, miniature coaxial connector for the antenna cable. 3.1.1.4 Serial EEPROM The serial, electrostatically erasable, programmable, read-only memory (EEPROM), U907 in VHF and 700–800 MHz or U4 in UHF Range 1, holds all of the transceiver tuning data. This allows transceivers to be tuned in the factory and installed in the field without retuning. 3.1.1.5 Power Conditioning Components DC power-conditioning components include zener diodes, capacitors, ferrite beads, a power inductor, and the fuse. Diodes VR1 and VR2 provide over-voltage protection. Ferrite beads (designated E1, etc.) and capacitors suppress electromagnetic interference from the transceiver. The power-line filter consisting of L1, C13, and C14 for VHF radios or L1, C10, and C11 for UHF Range 1 and 700–800 MHz radios, suppresses digital noise from the VOCON board switching power supplies that could degrade the transmitter spectral purity. Pass transistor Q1 switches the battery voltage to the transceiver when control signal SWB+ or SB+ from the VOCON board is asserted high. This increases the transceiver’s immunity to conducted interference that might be present on SWB+ or SB+, such as from switching voltage regulators on the VOCON board. Ground clips G1 through G12 make contact between the transceiver board ground and the radio chassis. The chassis connection is a necessary electrical reference point to complete the antenna circuit path. Shields SH101 through SH700 and the tool hole appear on the schematic to show their connection to ground. 3.1.2 Receiver The XTS 5000 transceiver has a dual-conversion superheterodyne receiver. Figure 3-4 illustrates the major receiver components: • Receiver Front End • Receiver Back End Figure 3-4. Receiver Block Diagram RF InputRX Front End Harmonic Filter ADC LOCKORX_SSI_ DATA to VOCON Board XTAL Filter ABACUS III - RX Back End Antenna SwitchLNATuneable Preselector Filter Tuneable Preselector Filter 1st Mixer 1st LO 3 MAEPF-27278-A
November 16, 20066881094C31-E 3-6Theory of Operation: Transceiver Board 3.1.2.1 Receiver Front End NOTE:Refer to Table 8-1, “List of Transceiver Schematics and Board Overlays,” on page 8-1 for a listing of receiver front end schematics. The receiver front end tunes to the desired channel and down converts the RF signal to the first intermediate frequency (IF). Channel selection is by way of a tunable local oscillator, RXLO, from the FGU. The receiver front end consists of a preselector filter, an RF amplifier, a second preselector, mixer, and an IF crystal filter. VHF, UHF Range 1and UHF Range 2 radios also contain a switchable attenuator between the antenna switch and the first preselector filter. The RF amplifier is a discrete RF transistor with associated circuitry. The mixer is a double-balanced, active mixer IC, coupled by transformers. The receiver (RX) local oscillator (LO) is provided by the FGU. 3.1.2.1.1 Preselector Filters VHF, UHF Range 1, and UHF Range 2: The receiver front end uses two discrete, tunable, bandpass filters to achieve its required out-of-band rejection. The first preselector filter precedes the RF amplifier, while the second preselector filter follows the RF amplifier. DAC2, from the PCIC, is used to simultaneously tune both preselector filters by applying voltage to the varactors. 700–800 MHz: The receiver front end uses two, multi-layer, ceramic, tunable, bandpass filters to achieve its required out-of-band rejection. The first preselector filter, FL401, precedes the discrete RF amplifier. To tune the center frequency of the first filter, voltage from port DAC1 is applied to pin 3 of FL401. Pin 3 connects to the surface-mounted varactor diodes placed on each filter. A second identical filter, FL402, follows the discrete RF amplifier. The second filter is tuned by applying voltage from port DAC2 to pin 3 of FL402. Capacitors C409 and C410 are RF bypasses. Capacitors C400 and C411 are used to filter out noise from the DAC1 and DAC2 control lines. 3.1.2.1.2 LNA (Low-Noise Amplifier) The XTS 5000 radio uses a discrete transistor for the low-noise amplifier (Q428 in VHF, Q430 in UHF Range 1, Q428 in UHF Range 2, and either Q401 or Q420 (NUF3577C or later) in 700– 800 MHz). A feedback network between the collector and base improves stability and gain balance across the frequency band. Input and output LC networks match the LNA impedance to 50 ohms. A diode limiter (D722 in VHF, D400 in UHF Range 1, D722 in UHF Range 2, and D401 in 700-800 MHz) protects the amplifier damage by strong input signals. 3.1.2.1.3 Mixer The mixer (U451 in VHF, U470 in UHF Range 1, U451 in UHF Range 2 and either U401or U405 (NUF3577C or later) in 700–800 MHz) down-converts the received RF to the first intermediate frequency (IF). The IF is 44.85 MHz for VHF, 73.35 MHz for UHF Range 1 and UHF Range 2, and 109.65 MHz for 7/800 MHz. High-side LO injection is used for VHF and 700 MHz, low-side for the UHF bands and 800 MHz. Transformers are used as baluns to convert signals from singleended to balanced at pins MI, MIX, LO, and LOX. An output transformer converts the balanced signal at pins MO and MOX to a single-ended output. 3.1.2.1.4 IF Filter The IF filter (FL451 in VHF, FL490 in UHF Range 1, FL451 in UHF Range 2, and FL403 in 700–800 MHz) is a leadless, surface-mount, 3-pole, quartz crystal filter. This narrow bandpass filter gives the radio its adjacent-channel and alternate-channel rejection performance. Input and output LC networks match the filter impedance to 50 ohms. Exceptions are the VHF and UHF Range 2, where the output is matched to 50 ohms, but the input is not.
6881094C31-ENovember 16, 2006 Theory of Operation: Transceiver Board3-7 3.1.2.2 Receiver Back End The receiver back end, which consists of the Abacus III (AD9874 IF digitizing subsystem) IC and its associated circuitry, processes the down-converted IF signal to produce digital data for final processing by the VOCON DSP. NOTE:Refer to Table 8-1, “List of Transceiver Schematics and Board Overlays,” on page 8-1 for a listing of receiver back end schematics. 3.1.2.2.1 Abacus III IC U500 The AD9874 (Figure 3-5) is a general-purpose, IF subsystem that digitizes a low-level 10–300 MHz IF input with a bandwidth up to 270 kHz. The output of the Abacus III IC is SSI data to the VOCON. The signal chain of the AD9874 consists of a low-noise amplifier, a mixer, a bandpass sigma-delta A/D converter, and a decimation filter with programmable decimation factor. An automatic gain control (AGC) circuit provides the AD9874 with 12 dB of continuous gain adjustment. The high dynamic range and inherent anti-aliasing provided by the bandpass sigma-delta converter allow the AD9874 to cope with blocking signals 80 dB stronger than the desired signal. Auxiliary blocks include frequency synthesizers for the second LO and sampling clock LO, as well as an SPI port. The second LO uses a discrete external loop filter and VCO. The clock oscillator has an external loop filter and resonator. Figure 3-5. Abacus III (AD9874) Functional Block Diagram (from data sheet) VHF: Input signal RXIF is the 44.8 MHz IF from crystal filter FL451 in the receiver front end. Components C547 and L542 match the input impedance from 50 ohms at the RXIF to the Abacus input IFIN. DAC AGC LNA IFIN FREF LO Synth.Samp. Clock SynthesizerVoltage/ Current ReferenceControl Logic SPI Decimation Filter MADC AD9874 -16dB ......=13-26MHz DOUTA DOUTB FS CLKOUT LO VCO and Loop FilterCLK VCO and Loop Filter IOUTL LOP LON IOUTC CLKP CLKN VREFP RREF VREFN PC PD PE SYNCBMXOP MXON IF2P IF2N GCP GCN Formatting/SSI MAEPF-27412-O
November 16, 20066881094C31-E 3-8Theory of Operation: Transceiver Board UHF Range 1: Input signal RXIF is 73.35 MHz. Components L547 and C547 match the input impedance to 50 ohms. UHF Range 2: Input signal RXIF is 73.35 MHz. L542, C515, and C547 match the Ababcus input to 50 Ohms. 700–800 MHz: Input signal RXIF is the 109.65 MHz IF from crystal filter FL403 in the receiver front end. Components L547 and C542 match the input impedance from 50 ohms at RXIF to approximately 420 ohms in parallel with a 1 pF capacitance at the Abacus input IFIN. Formatted SSI data is output to the VOCON board on ports FS, DOUTA, and CLKOUT. 3.1.2.2.2 Second Local Oscillator The second LO is controlled by the Abacus LO synthesizer, which mixes with IFIN to produce a 2.25 MHz final IF. The external VCO consists of Q502 and its bias network and frequency- determining elements. Signal FREF is the 16.8 MHz reference from the FGU. Darlington transistor Q501 with C550 and R501 form an active power-line filter. VHF: The second LO frequency is 42.6 MHz by default, or 47.1 MHz in special cases as needed to avoid radio self-quieters. The loop filter is composed of R507, C558, C559, and C503. UHF Range 1: The second LO frequency is 71.1 MHz by default or 75.6 MHz in special cases as needed to avoid radio self-quieters. The loop filter is composed of R551, C558, C559, R552, and C512. UHF Range 2: The 2nd LO frequency is 71.1 Mhz. C558, R507, and C559 form the loop filter. 700–800 MHz: The second LO frequency is 107.4 MHz by default or 111.9 MHz in special cases as needed to avoid radio self-quieters. The loop filter is composed of R507, C558, C559, R505, and C512. 3.1.2.2.3 Sampling Clock Oscillator The Abacus sampling clock synthesizer operates at 18 MHz = 8 x 2.25 MHz. The VCO uses an internal transistor and external resonator. The resonator is composed of L503, C535, and D501. VHF: The loop filter is composed of R514, C536, C570, and C571. UHF Range 1 and 700–800 MHz: The loop filter is composed of R514, C570, and C571. UHF Range 2: C503, C536, R415, C570, and C571 form the loop filter. 3.1.3 Transmitter The transmitter takes modulated RF from the FGU and amplifies it to the radios rated output power to produce the modulated transmitter carrier at the antenna. NOTE:Refer to Table 8-1, “List of Transceiver Schematics and Board Overlays,” on page 8-1 for a listing of transmitter-related schematics that will aid in the following discussion. The transmitter (Figure 3-6 on page 3-9) consists of an RF driver IC that receives its input signal from the voltage-controlled oscillator (VCO) and a high-power output transistor. Transmitter power is controlled by a power-control IC (PCIC) that senses the output of a directional coupler and adjusts PA control voltages to maintain a constant power level. The signal passes through an antenna switch and harmonic filter to the antenna.
6881094C31-ENovember 16, 2006 Theory of Operation: Transceiver Board3-9 Figure 3-6. Transmitter Block Diagram 3.1.3.1 Power Distribution To minimize voltage drop to the power amplifiers, net RAWB+ connects to power module Q107 and the second stage of driver amplifier U102 through components having minimal series resistance— ferrite beads and chokes only. During receive, no RF or DC bias is applied, and leakage current through U102 and Q107 is less than 100 microamps. The first stage of U102 uses less than 50 mA and is supplied by TX7V, which is switched on during TX, and switched off during RX or whenever TXINH, the transmitter inhibit control line, is high. VHF: At a transmitter power of 6 Watts, the radio consumes approximately 2000 mA. Bias TX7V is controlled by transistors Q101, Q102, Q103, and Q106. UHF Range 1 and Range 2: At the rated transmitter power of 5 Watts, the radio consumes approximately 2000 mA. Bias TX7V is controlled by transistors Q101, Q102, Q103, and Q106. 700–800 MHz: At a transmitter power of 3 Watts, the radio consumes approximately 1200 mA. Bias TX7V is controlled by transistors Q101, Q102, Q103, and Q107. 3.1.3.2 Driver Amplifier The driver amplifier IC (U102) contains two LDMOS FET amplifier stages and two internal resistor bias networks. Pin 16 is the RF input. Modulated RF from the FGU, at a level of +3 dBm ±2 dB, is coupled through a blocking capacitor to the gate of FET-1. An LC interstage matching network connects the first stage output VD1 to the second stage input G2. The RF output from the drain of FET-2 is pin 6 (RFOUT1). Gain control is provided by a voltage applied to pin 1 (VCNTRL). Typical output power is about +27 dBm (500 mW) with VCNTRL at 5.0 V. VHF: L109 and C113 are the interstage matching network. Components C108–C111 and L106–L107 match the output impedance to maximize power transfer to Q107; capacitor C107 is a DC block. UHF Range 2: L109 and C113 are the interstage matching network. Components C108–C111 and L105, L107, and L108 match the output impedance to maximize power transfer to Q107. UHF Range 1 and 700–800 MHz: L109 and C116 are the interstage matching network. Components L105 and C110 match the output impedance to 50 ohms; capacitor C107 is a DC block. Modulated RF from FGUDriver amplifierPower amplifierDirectional couplerAntenna switchHarmonic filterAntenna Forward and reverse power detectors Vd = m*sqrt(P) + b Summing amplifier RFIN INT PCIC MAEPF-27408-O
November 16, 20066881094C31-E 3-10Theory of Operation: Transceiver Board 3.1.3.3 Power Amplifier Transistor Q107 The power amplifier transistor, Q107, is an LDMOS FET housed in a high-power, surface-mount, ring package. To prevent thermal damage, it is essential that the heat sink of the power module be held in place against the radio chassis. The input impedance-matching network uses discrete inductors and capacitors. The low-pass output matching network uses both transmission lines and lumped LCs. Drain bias is applied through E101 and L101. Gain is dynamically controlled by adjusting the gate bias. The gate is insulated from the drain and source so that gate bias current is essentially zero. VHF: The input and output impedance-matching networks consist of L112–L114 and C137–C140. Gate bias is applied through R105, R106, and L108. UHF Range 2: The input and output impedance-matching networks consist of L113, L114 and C137, C139, C140, C149, and C151. Gate bias is applied through R105, R106, and L720. UHF Range 1 and 700–800 MHz: The input impedance-matching network is L106, L107, C108, and C109. A transmission-line structure and C137, C111, and C112 form the output-matching network. Gate bias applied through R106 and L110. 3.1.3.4 Directional Coupler A directional coupler senses the transmitter forward and reverse power as control signals in the transmitters automatic level control (ALC) loop. Isolated ports are terminated with external resistors. VHF and UHF Range 1: The directional coupler consists of three embedded transmission lines. UHF Range 1 and 700–800 MHz: The directional coupler is U101, a low-loss, bidirectional coupler. 3.1.3.5 Antenna Switch NOTE:Refer to Table 8-1, “List of Transceiver Schematics and Board Overlays,” on page 8-1 for a listing of schematics that will aid in the following discussion. The antenna switch is a single-pole, double-throw, positive-intrinsic-negative (PIN) diode, transmit/ receive (T/R) antenna switch. Forward DC bias turn the diodes ON, reverse or zero bias turns them OFF. VHF and UHF Range 2: PIN diodes D707 and D717 form a narrow-band, quarter-wave, T/R switch. In transmit mode, both diodes are forward-biased, and the signal goes from the transmitter to the antenna through the low resistance of the series PIN diode, while the low resistance of the shunt diode shorts the receiver. In receive mode, neither diode is biased and both behave as small-value capacitors, creating a high blocking impedance, in effect disconnecting the transmitter circuitry from the antenna. UHF Range 1: Diodes D701 and D702 form a broadband switch. Inductors L706 and L707 resonate with the OFF diode parasitic capacitance to improve isolation. 700–800 MHz: PIN diodes D701 and D702 form a narrow-band, quarter-wave, T/R switch. When the PIN diodes are OFF, parallel inductors L706 and L707 resonate with the diode parasitic capacitance to increase isolation at the signal frequency. The switch control circuit consists of transistors Q101, Q103, Q106, and associated resistors. The input signals are TXINH from the VOCON board and RXH (RX for VHF) from the PCIC. When TXINH is low and RXH (RX for VHF) is high, the switch is in the receive state. When TXINH and RXH (RX for VHF) are low, the switch is in its transmitter state. When TXINH is held high, the radio is inhibited from transmitting. This is a secure-module control feature.
6881094C31-ENovember 16, 2006 Theory of Operation: Transceiver Board3-11 3.1.3.6 Harmonic Filter The harmonic filter is a high-power, low-loss, low-pass filter. Its purpose is to suppress transmitter harmonics. The filter also improves receiver out-of-band rejection. Shield SH700 must be in place to achieve the required stop band rejection. VHF: The harmonic filter uses discrete components. The pass band is up to 190 MHz, and the stop band is above 260 MHz. UHF Range 1: The harmonic filter is discrete, the pass band is up to 470 MHz, and the stop band is above 760 MHz. UHF Range 2: The harmonic filter uses discrete components. The pass band is up to 595 MHz, and the stop band is above 900 MHz. 700–800 MHz: The harmonic filter uses both discrete components and transmission lines. The pass band is up to 870 MHz, and the stop band is above 1500 MHz. 3.1.3.7 RF Detectors D101 and D102 Two Schottky diodes, D101 and D102, are used as forward- and reverse-power detectors. Forward- coupled RF from the power amplifier, and reverse-coupled RF from the antenna are converted to DC voltages FWD and RVS. Detector output is a positive DC voltage, proportional to the amplitude of the RF signal at the input. 3.1.3.8 Summing Amplifier U106 This op-amp circuit is a non-inverting buffer. Signals FWD and RVS are summed and sent to the ALC input of the PCIC. When the antenna port is loaded with a low VSWR (voltage standing wave ratio), as in normal operation, RVS is far less than FWD, the amplifier output is a function of FWD, and the radio maintains a constant output power. Under high VSWR conditions, such as when the antenna is damaged or held near a large metal surface, the amplitude of RVS becomes a large fraction of FWD, the amplifier output increases proportionally, and the radio cuts back the transmitter power by up to 50%. This reduces high battery current into a large VSWR transmitter to extend battery life. 3.1.3.9 Power-Control IC (PCIC) U104 The PCIC, U104, contains all of the digital, and most of the analog, circuits needed to control the transmitter power amplifier. Host control is through a 3-wire, smart SPI interface. Pin descriptions are shown in Table 3-3. Table 3-3. Power Control IC (U104) Pin Descriptions PinNameDescription 1 RFIN Detector voltage input to ALC 2 T1 Test point 3 CI External capacitor for integrator time constant 4 INT Integrator output; control voltage to amplifiers 5 CJ External capacitor for PA rise and fall times 6, 7 VL, CL External capacitor for PA rise and fall times 8GND1 Ground