Yamaha Ysp1 Service Manual

YSP-1
31
YSP-1
7. AD DATA CHECK
This menu is used to display the A/D conversion value
of the main CPU which detects panel keys of the main
unit and protection functions in % using the sub-menu.
During signal processing, the condition before
execution is maintained.
* The figures in the diagram are given as reference
only.

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YSP-1
32
YSP-1
TI1-2
Not applied to this model. CS1-5
Indicates channel status information of the input signal
(IEC60958).
BS1-7
Indicates information of the bit stream included in the dts
signal.
MTT
Mute Trigger
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YSP-1
33
YSP-1
11. MICROPROCESSOR INFORMATION
There are 4 SUB menu items.
The version, checksum and the port specified by the
microprocessor are displayed. The signal is processed
using EFFECT OFF. The checksum is obtained by
adding the data at every 16 bits for each program area
and expressing the result as a 4-figure hexadecimal
data.



YSP-1
34
YSP-112. DATE
There are 4 SUB menu items.
The updated date of the program, clearance of the
protection history and the remote control reception
code are displayed.
When Remo Code menu is selected, keys become non-
operable due to detection of the values of all keys.
However, it is possible to advance to the next sub-
menu by push the INPUT key of the remote control.
MAIN
The updated date of the MAIN CPU firmware is displayed.

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YSP-1
35
YSP-1
13. 1 SP TEST
ONE SP TEST
Have the sound produced from each driver to check its
condition and installation position.
Use the “SELECT” and “RETURN” keys of the remote
controller for selection.


41
5&45
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41
5&45

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YSP-1
36
YSP-114. DSP VER
DSP
The version of Application Code is displayed.

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The version of Core Start-Up Code is displayed.$4$
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YSP-1
37
YSP-1

DISPLAY DATA

 V1 : 15-BT-99GNK (WE204600)

 PIN CONNECTION

 GRID ASSIGNMENT
Pin No.
Connection
Pin No.60
F2
59
NX
58
NP
57
NP
56
P1
55
P2
54
P3
53
P4
52
P5
51
P6
50
P7
49
P8
48
P9
47
P10
46
P11
45
P12
44
P13
43
P14
42
P15
41
P16
40
P17
39
P18
38
P19
37
P20
30
P27
29
P28
28
P29
27
P30
26
P31
25
P32 P33 P34 P35
24 23 22
NX NX
21 20 19
15G
18
14G
17
13G
16
12G
15
11G
14
10G
13
9G
12
8G
11
7G
10
6G
9
5G
8
4G
7
3G
6
2G
5
1G
4
NP
3
NP
36
P21
35
P22
34
P23
2
NX
1
F1
Connection
Note :  1) F1,...

YSP-1
38
YSP-1
IC DATA
IC304 : M30626FHPFP (DSP P.C.B)
Single-Chip 16bit CMOS MICROCOMPUTER (Main CPU)
Output (timer A): 5
Input (timer B): 6
Internal peripheral functions
Watchdog timer(15 bits)
DMAC(2 channels)
D/A converter(8 bits X 2 channels)
Memory
ROM(1)
RAM(2)
A/D converter(10 bits X 8 channels Expandable up to 26 channels)
UART or
clock synchronous serial I/O
(8 bits X3 channels) 
System clock 
generation circuit
XIN-XOUT
XCIN-XCOUT
PLL frequency synthesizer
On-chip oscillator
M16C/60...

YSP-1
39 IC304 : M30626FHPFP (DSP P.C.B)
Single-Chip 16bit CMOS MICROCOMPUTER (Main CPU)
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53Name
PO96
PO95
PO94
PO93
PO92
PI91
PO90
BYTE
CNVSS
PO87
PO86
/RESET
XOUT
VSS
XIN
VCC
PI85
PI84
PI83
PI82
PO81
PO80
PO77
PO76
PO75
PO74
PI73
PO72
PIO71
PIO70
PO67
PI66
PO65
PO64
PO63
PI62
PO61
PO60
PO57
PO56
PI55
PO54
PO53
PO52
PO51
PI50
PO47
PO46
PO45
PO44
PO43
PO42...

YSP-1
40 2
ABCDE FGH I J
1
3
4
5
7
6

BLOCK DIAGRAM
• See page 53  → 
SCHEMATIC DIAGRAMINPUT
• See page 53   → 
SCHEMATIC DIAGRAMINPUT
• See page 51, 52  → 
SCHEMATIC DIAGRAMDSP
• See page 54  → 
SCHEMATIC DIAGRAMAMP
ANALOG INPUT
PJ2PJ3
 IC26  IC27 IC311 TC40538P  uPC4570G2 AK5381VT-E2
TV L/R
VCR L/R
DIGITAL INPUT
U2PJ1
AUX
COAXIAL
A/D
PJ4
Sub Woofer_out
PJ4
VIDEO_out
Remote
RS232CSYSTEM
CONNECTOR
U1
TV
OPTICAL
 IC310 AK4381VTD/A
Q19, 20, 21DTC144EKA/
2SC4488 (S/T)
 IC3 LC74781OSD
 IC300
 IC305
 IC3...