Yamaha Ysp1 Service Manual
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YSP-1 31 YSP-1 7. AD DATA CHECK This menu is used to display the A/D conversion value of the main CPU which detects panel keys of the main unit and protection functions in % using the sub-menu. During signal processing, the condition before execution is maintained. * The figures in the diagram are given as reference only. %%5$)&$, Š.ÍÉç©”zÓ髳ãïsr›U Z`oM”Ý
YSP-1 32 YSP-1 TI1-2 Not applied to this model. CS1-5 Indicates channel status information of the input signal (IEC60958). BS1-7 Indicates information of the bit stream included in the dts signal. MTT Mute Trigger $4 Ö— ôøw*&$½ßïÉçµÂ”»µ ØC› ¯Ô` ‡b{ #4 EUTz%PMCZ%JHJUBMz$
YSP-1 33 YSP-1 11. MICROPROCESSOR INFORMATION There are 4 SUB menu items. The version, checksum and the port specified by the microprocessor are displayed. The signal is processed using EFFECT OFF. The checksum is obtained by adding the data at every 16 bits for each program area and expressing the result as a 4-figure hexadecimal data.
YSP-1 34 YSP-112. DATE There are 4 SUB menu items. The updated date of the program, clearance of the protection history and the remote control reception code are displayed. When Remo Code menu is selected, keys become non- operable due to detection of the values of all keys. However, it is possible to advance to the next sub- menu by push the INPUT key of the remote control. MAIN The updated date of the MAIN CPU firmware is displayed. %5& ±ÒÝÇá”xmK“‡b{ Óé¬åÜwË ýÔ ÇzÓ髳ãïdºw«æžz æÞ¯ï ! ô¯”Å› ¯Ô`‡b{ 3FNP$PEFw
YSP-1 35 YSP-1 13. 1 SP TEST ONE SP TEST Have the sound produced from each driver to check its condition and installation position. Use the “SELECT” and “RETURN” keys of the remote controller for selection. 415&45 0/&415&45 `‡b{ æÞ¯ïw
YSP-1 36 YSP-114. DSP VER DSP The version of Application Code is displayed. %417&3 %41 QQMJDBUJPO$PEFwÌ”´ãï› ¯Ô`‡b{ CSC The version of Core Start-Up Code is displayed.$4$ $PSF4UBSU6Q$PEFw
YSP-1 37 YSP-1 DISPLAY DATA V1 : 15-BT-99GNK (WE204600) PIN CONNECTION GRID ASSIGNMENT Pin No. Connection Pin No.60 F2 59 NX 58 NP 57 NP 56 P1 55 P2 54 P3 53 P4 52 P5 51 P6 50 P7 49 P8 48 P9 47 P10 46 P11 45 P12 44 P13 43 P14 42 P15 41 P16 40 P17 39 P18 38 P19 37 P20 30 P27 29 P28 28 P29 27 P30 26 P31 25 P32 P33 P34 P35 24 23 22 NX NX 21 20 19 15G 18 14G 17 13G 16 12G 15 11G 14 10G 13 9G 12 8G 11 7G 10 6G 9 5G 8 4G 7 3G 6 2G 5 1G 4 NP 3 NP 36 P21 35 P22 34 P23 2 NX 1 F1 Connection Note : 1) F1, F2 ..... Filament 2) NP ..... No pin 3) NX ..... No extened Pin 4) 1G ~ 15G ..... Grid (1G~14G) (15G) 1-1 2-1 3-1 4-1 5-1 1-2 2-2 3-2 4-2 5-2 1-3 2-3 3-3 4-3 5-3 1-4 2-4 3-4 4-4 5-4 1-5 2-5 3-5 4-5 5-5 1-6 2-6 3-6 4-6 5-6 1-7 2-7 3-7 4-7 5-7 2G 5G3G 4G 6G 7G 8G 9G 10G 11G 12G 13G 1G14G 15G 33 P24 32 P25 31 P26 PATTERN AREA t1 B1 B2 B3 B4 B5 B6 B7 B8S1 ANODE CONNECTION 1G~14G 15G P1 1-1– P2 2-1– P3 3-1– P4 4-1– P5 5-1– P6 1-2– P7 2-2 P8 3-2 P9 4-2 P10 5-2 P11 1-3 P12 2-31G~14G 15G P13 3-3 P14 4-3 P15 5-3– P16 1-4– P17 2-4– P18 3-4– P19 4-4– P20 5-4– P21 1-5– P22 2-5 P23 3-5 P24 4-51G~14G 15G P25 5-5 P26 1-6 P27 2-6 S1 P28 3-6 B1 P29 4-6 B2 P30 5-6 B3 P31 1-7 B4 P32 2-7 B5 P33 3-7 B6 P34 4-7 B7 P35 5-7 B8
YSP-1 38 YSP-1IC DATA IC304 : M30626FHPFP (DSP P.C.B) Single-Chip 16bit CMOS MICROCOMPUTER (Main CPU) Output (timer A): 5 Input (timer B): 6 Internal peripheral functions Watchdog timer(15 bits) DMAC(2 channels) D/A converter(8 bits X 2 channels) Memory ROM(1) RAM(2) A/D converter(10 bits X 8 channels Expandable up to 26 channels) UART or clock synchronous serial I/O (8 bits X3 channels) System clock generation circuit XIN-XOUT XCIN-XCOUT PLL frequency synthesizer On-chip oscillator M16C/60 series16-bit CPU core Port P0 8 Port P18 Port P28888 Port P6 8 8 R0L R0H R1H R1L R2 R3 A0 A1 FBSB ISPUSP INTB CRC arithmetic circuit (CCITT ) (Polynomial : X16+X12+X5+1) Multiplier 7 8 8 Port P10 Por t P9 Port P8_5 Por t P8 Por t P7 NOTES : 1. ROM size depends on microcomputer type. 2. RAM size depends on microcomputer type. 3. Ports P11 to P14 exist only in 128-pin version. 4. Use M16C/62PT on VCC1= VCC2.Port P5 Port P4Port P3 Clock synchronous serial I/O(8 bits X2 channels) PCFLG Timer (16-bit) Three-phase motor control circuit 8882 Port P11 Port P12 Port P14 Port P13(3) (4)(4) (4) (4)(4) (3) (3)(3) 1 2 3 4 5 6 7 8 9 10111213141516171819202122232425262728293031 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 P0_0/AN0_0/D0 P0_1/AN0_1/D1P0_2/AN0_2/D2 P0_3/AN0_3/D3 P0_4/AN0_4/D4 P0_5/AN0_5/D5 P0_6/AN0_6/D6 P0_7/AN0_7/D7 P1_0/D8 P1_1/D9 P1_2/D10 P1_3/D11 P1_4/D12 VREFAVSS VCC1 XIN XOUT VSS RESETCNVSS P8_7/XCIN P8_6/XCOUT BYTE P2_0/AN2_0/A0(/D0/-) P2_1/AN2_1/A1(/D1/D0) P2_2/AN2_2/A2(/D2/D1) P2_3/AN2_3/A3(/D3/D2) P2_4/AN2_4/A4(/D4/D3) P2_5/AN2_5/A5(/D5/D4) P2_6/AN2_6/A6(/D6/D5) P2_7/AN2_7/A7(/D7/D6) P3_0/A8(/-/D7) P3_1/A9 P3_2/A10 P3_3/A11 P3_4/A12 P3_5/A13 P3_6/A14 P3_7/A15 P4_0/A16 P4_1/A17 P4_2/A18 P4_3/A19 P7_4/TA2OUT/W P7_6/TA3OUT P5_6/ALE P7_7/TA3IN P5_5/HOLDP5_4/HLDAP5_3/BCLK P5_2/RD VCC2 VSS P5_7/RDY/CLKOUT P4_5/CS1P4_6/CS2P4_7/CS3 AVCCP6_3/TXD0/SDA0 P6_5/CLK1 P6_6/RXD1/SCL1 P6_7/TXD1/SDA1 P6_1/CLK0 P6_2/RXD0/SCL0 P10_0/AN0 P10_1/AN1 P10_2/AN2 P10_3/AN3 P9_3/DA0/TB3IN P9_4/DA1/TB4IN P9_5/ANEX0/CLK4 P9_6/ANEX1/SOUT4 P9_1/TB1IN/SIN3 P9_2/TB2IN/SOUT3P8_0/TA4OUT/U P6_0/CTS0/RTS0 P6_4/CTS1/RTS1/CTS0/CLKS1 P7_2/CLK2/TA1OUT/V P8_2/INT0 P7_1/RXD2/SCL2/TA0IN/TB5IN (1) P8_3/INT1P8_5/NMI P9_7/ADTRG/SIN4 P4_4/CS0 P5_0/WRL/WRP5_1/WRH/BHE P9_0/TB0IN/CLK3 P7_0/TXD2/SDA2/TA0OUT (1) P8_4/INT2/ZPP8_1/TA4IN/U P7_3/CTS2/RTS2/TA1IN/V P7_5/TA2IN/W P1_5/D13/INT3P1_6/D14/INT4P1_7/D15/INT5 P10_7/AN7/KI3P10_6/AN6/KI2P10_5/AN5/KI1P10_4/AN4/KI0
YSP-1 39 IC304 : M30626FHPFP (DSP P.C.B) Single-Chip 16bit CMOS MICROCOMPUTER (Main CPU) No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53Name PO96 PO95 PO94 PO93 PO92 PI91 PO90 BYTE CNVSS PO87 PO86 /RESET XOUT VSS XIN VCC PI85 PI84 PI83 PI82 PO81 PO80 PO77 PO76 PO75 PO74 PI73 PO72 PIO71 PIO70 PO67 PI66 PO65 PO64 PO63 PI62 PO61 PO60 PO57 PO56 PI55 PO54 PO53 PO52 PO51 PI50 PO47 PO46 PO45 PO44 PO43 PO42 PI41Port SOUT4 CLK4 DA1 - SOUT3 SIN3 CLK3 - - CMOS CMOS - - - - - /NMI /INT2 /INT1 /INT0 TA4IN TA4OUT TA3IN TA3OUT TA2IN TA2OUT /CTS2 CMOS SCL SDA TxD1 RxD1 CLK1 /CTS1 TxD0 RxD0 CLK0 /CTS0 CLKOUT ALE /HOLD /HLDA BCLK /RD /WRH /WRL /CS3 /CS2 /CS1 /CS0 CMOS CMOS -I/O S-OUT S-CLK - S-OUT S-IN S-CLK - - OUT OUT - - - - - IN INT-IN INT-IN INT-IN OUT OUT OUT T-OUT OUT OUT IN OUT I2C-CLK I2C-DAT S-OUT S-IN S-CLK OUT TX RX OUT OUT OUT OUT IN OUT OUT OUT OUT IN OUT OUT OUT OUT OUT OUT INFunction FL Driver TxD (Serial I/O-4) FL Driver CLOCK OUT (Serial I/O-4) (Unconnected) YSS TxD (Serial I/O-3) YSS RxD (Serial I/O-3) YSS CLOCK (Serial I/O-3) When single chip mode is selected: VSS (GND) When single chip mode is selected: VSS (GND) via resistor (5.1 k-ohms) [For FLASH writing: Vcc]YSS CE YSS RESET RESET [L:RESET] 16MHz OUT (feedback resistor included) GND 16MHz IN (feedback resistor included) Power supply +3.3V Connected to Vcc via resistor (10 k-ohms) (NMI function unused) INT ADM INT DIR RS232C for communication RX interruption (connected to Pin 32) For FL filament (105KHz) Ready(I2C) MUTE(I2C) I2C SCL [O: Pull-up resistor required N-OD] (Serial I/O-2) I2C SDA [O: Pull-up resistor required N-OD] (Serial I/O-2)For flash writing YDC DATA OUT , For flash writing RS232C TX (Serial I/O-1)For flash writing YDC DATA IN, For flash writing RS232C RX (Serial I/O-1) For FLASH writing YDC CLK (Pull-down resistor required)(Serial I/O-1) For FLASH writing Busy OUT, For communication RS232C /RTS For communication RS232C TX (connected to Pin 31) (UART0) For communication RS232C RX (connected to Pin 32) (UART0) (Unconnected) For communication RS232C /CTS Connected to VSS (GND) via resistor (10 k-ohms) (For flash writing: L) DIR CS ADM CS DIR RESET ADM RESET Connected to Vcc via resistor (10 k-ohms) (For flash writing: H) DAC CS (Unconnected) Power relay output [H: ON] FL Driver RESET(Light off) OUT CS OUT to E 2PROM (Pull-down resistor required) [H: DATA transfer] DATA OUT to E2PROM DATA IN from E2PROM IC304 : M30626FHPFP (DSP P.C.B) Single-Chip 16bit CMOS MICROCOMPUTER (Main CPU) Key Input (A-D) Pull-Up Resistance 10 k-ohmsNo. 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100Name PO40 PO37 PO36 PO35 PO34 PO33 PO32 PO31 VCC PO30 VSS PO27 PO26 PO25 PO24 PO23 PO22 PO21 PO20 P17 P16 P15 PO14 PO13 PO12 PO11 PO10 PO07 PO06 PO05 PO04 PO03 PO02 PO01 PO00 A/D7 A/D6 A/D5 A/D4 A/D3 A/D2 A/D1 AVSS A/D0 VREF AVCC PO97PORT CMOS CMOS - CMOS CMOS CMOS CMOS CMOS - CMOS - CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS /INT5 /INT4 /INT3 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS - - - AN7 AN6 AN5 AN4 AN3 AN2 AN1 - AN0 - - (SIN4)I/O OUT OUT IN OUT OUT OUT OUT OUT - OUT - OUT OUT OUT OUT OUT OUT OUT OUT INT-IN INT-IN INT-IN OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT IN IN IN A-D IN A-D IN A-D IN A-D IN A-D IN A-D IN A-D IN - A-D IN - - OUTFunction CLK OUT to E 2PROM (Design test terminal ··· H: PS protection OFF and 232C are forced for 1Lim setting) [L: Normal]Power supply +3.3V SWFR Mute [L: MUTE] GND OSD TxD OSD Enable OSD Clock PowerDown DETECT INT IN [L: POWER DOWN] Standby SW IN [H: ON] Remote controller IN PLD Reset Analog input selected [L: TV H: VCR] NRESET(TI, BEAMIC, FLASH;3&4&5 (Digital amplifier IC temperature detection) ··· unused (Digital amplifier IC voltage detection) ··· unused (Digital amplifier IC current detection) ··· unused Destination selection input (Pull-up resistor required) [0 ~ VREF] Power voltage detection (PS Protect) IN [0 ~ VREF] 3.3V power start-up detection IN (Pull-down resistor required) [0 ~ VREF] (Pull-up resistor required) [0 ~ VREF] Temperature detection (thermistor) IN ··· unused [0 ~ VREF] Key AD Input 0 (Pull-up resistor required) [0 ~ VREF] Key AD Input 1 (Pull-up resistor required) [0 ~ VREF] Connected to VSS (GND) (Pull-up resistor required) [0 ~ VREF] A-D, D-A Reference voltage input [ ~ VCC] Connected to VCC terminal (+3.3V) FL Driver CE OUT Ohm V ADKEY 0 94pin A/D2 ADKEY 1 95pin A/D10 k ~ 0.30 VOLUME + VOLUME - + 1.2k ~ 0.70 INPUT –
YSP-1 40 2 ABCDE FGH I J 1 3 4 5 7 6 BLOCK DIAGRAM • See page 53 → SCHEMATIC DIAGRAMINPUT • See page 53 → SCHEMATIC DIAGRAMINPUT • See page 51, 52 → SCHEMATIC DIAGRAMDSP • See page 54 → SCHEMATIC DIAGRAMAMP ANALOG INPUT PJ2PJ3 IC26 IC27 IC311 TC40538P uPC4570G2 AK5381VT-E2 TV L/R VCR L/R DIGITAL INPUT U2PJ1 AUX COAXIAL A/D PJ4 Sub Woofer_out PJ4 VIDEO_out Remote RS232CSYSTEM CONNECTOR U1 TV OPTICAL IC310 AK4381VTD/A Q19, 20, 21DTC144EKA/ 2SC4488 (S/T) IC3 LC74781OSD IC300 IC305 IC3 IC4 50MHz_LVDS 50MHz_LVDS 50MHz_LVDS 50MHz_LVDS 390KHz_PWM 390KHz_PWM OUT0 OUT1 OUT2 OUT3 PWM-L PWM-R ASC TAC8256 DSP TMS320C6713BGDP LC4032V- 757N48C IC302 28 29 21 5 8 292 IC6 IC304 CPU Key SW2-5 FL Driver FL Display IC1 10ch D-ClassIC TAD10810ch D-ClassIC TAD10810ch D-ClassIC TAD10810ch D-ClassIC TAD108 IC3 IC1 IC4, Q2-5 IC4, Q2-5H-bridge H-bridge IC3 Ch_1 Ch_10 Ch_11 Ch_20 Ch_21 Ch_30 Ch_31 Ch_40 DRIVER WOOFER L DRIVER WOOFER R YSS930-SZPOST PROSESSER YSS948 MAIN DECODER LC89057WDIR M30626FMPFP 39 44 43 40 99 96 97 98 SDO0 SDO1 SDO2 SDO3SDI0 SDI7 SDI1 SDI0 RDATASDI1 SDI2 SDI3 SDI6 RX3 RX4 RX0 U3 CB1 IC1 V1 74, 94, 95 65, 66, 67 31-34 75 93 28 29 XL30024.576MHz 390KHz_PWM 390KHz_PWM 390KHz_PWM 390KHz_PWM 390KHz_PWM SUB0 POW_RY RESET PW_DNPOW_RY Q16RY1 Q13 S3.3BK+15V Q14 D11C79 C81, 82 C83D12 D13 T1 RY1 IC5 S3.3 S3.3BK SWITCHING POWER SUPPLY UNIT MD3221N NJM78M05FA BP5319 IC40 IC6 IC7 +15V +3.3V +5V -24V 1, 2 1, 3 2, 54,15 3, 5 1, 7 101 3 13 9, 10, 11 49 73 12 POW_RY RESET PW_DN