Yamaha Rmx 1 Manual

							RM1x
11
Ô HG73C205FD 
(XU947A00) SW X000 TONE GENERATOR
PIN
NO.N AME I /O FUN CTI ONPIN
NO.N AME I /O FUN CTI ON1 ICN I Initial  c lear 85 CMA3 O Progr am ad dres s  b us2 RFC LKI I PLL  Cloc k 86 CMA8 O Progr am ad dres s  b us3 TM2 I PLL  Control 87 CMA2 O Progr am ad dres s  b us4 AVD D_PLL Power  s upply 88 CR D O re ad s ignal5 AVSS_PL L Gro und 89 CMA1 O Progr am ad dres s  b us6 MODE0 I SW X d ua l mod e 90 CU B O high  by te  effec tive  sig nal7 VCC7 Power  s upply 91 VCC9 1 Power  s upply8 GND 8 Gro und 92 GHN D92 Gro und9 XIN I crystal oscillator 93 CS1 O CS  signal10 XOUT O crystal oscillator 94 CMA0 O Program address bus11 MODE1 I SW X s epar ate  mode 95 CL B O low  by te e ffe ctive  s ignal12 TEST0 I TEST  pin 96 CMA12 O Progr am ad dres s  b us13 TESTON I TEST  pin 97 CMA11 O Progr am ad dres s  b us14 AN0-P40 I A/D  c onv erter 98 CMA10 O Progr am ad dres s  b us15 AN1-P41 I A/D  c onv erter 99 CMA9 O Progr am ad dres s  b us16 AN2-P42 I A/D  c onv erter 100 GND 100 Gro und17 AN3-P43 I A/D  c onv erter 101 CW E O wr ite  s ignal18 AVD D_AN Power  s upply 102 CMA16 O Progr am ad dres s  b us19 AVSS_AN Gro und 103 CMA15 O Progr am ad dres s  b us20 TXD 0 O for MIDI or TO- HOST 104 CMA14 O Progr am ad dres s  b us21 TXD 1 O for  MIDI 105 CMA13 O Progr am ad dres s  b us22 EXCLK I Crystal  oscillator 106 CMD8 I/O Program memory  Data  bus23 SMD 11 I/O Wav e memor y data bus 107 CMD7 I/O Progr am memor y Data bus24 SMD 4 I/O Wav e memor y data bus 108 CMD9 I/O Progr am memor y Data bus25 SMD 3 I/O Wav e memor y data bus 109 CMD6 I/O Progr am memor y Data bus26 SMD 12 I/O Wav e memor y data bus 110 CMD1 0 I/O Progr am memor y Data bus27 SMD 10 I/O Wav e memor y data bus 111 CMD5 I/O Progr am memor y Data bus28 SMD 5 I/O Wav e memor y data bus 112 CMD11 I/O Progr am memor y Data bus29 SMD 2 I/O Wav e memor y data bus 113 CMD4 I/O Progr am memor y Data bus30 SMD 13 I/O Wav e memor y data bus 114 CMD1 2 I/O Progr am memor y Data bus31 SMD 9 I/O Wav e memor y data bus 115 CMD3 I/O Progr am memor y Data bus32 SMD 6 I/O Wav e memor y data bus 116 CMD1 3 I/O Progr am memor y Data bus33 SMD 1 I/O Wav e memor y data bus 117 CMD2 I/O Progr am memor y Data bus34 SMD 14 I/O Wav e memor y data bus 118 CMD1 4 I/O Progr am memor y Data bus35 VCC3 5 Power  s upply 119 VCC119 Power  s upply36 GND 36 Gro und 120 GND 115 Gro und37 SMD 8 I/O Wav e memor y data bus 121 CMD1 I/O Progr am memor y Data bus38 SMD 7 I/O Wav e memor y data bus 122 CMD1 5 I/O Progr am memor y Data bus39 SMD 0 I/O Wav e memor y data bus 123 CMD0 I/O Progr am memor y Data bus40 SMD 15 I/O Wav e memor y  data  bus 124 CMA21 O Progr am ad dres s  b us41 SOE O re ad s ignal 125 PDT15 I/O SW X a cce ss  da ta  bus42 SW E O wr ite  s ignal 126 PDT14 I/O SW X a cce ss  da ta  bus43 SRAS O RAS s ignal 127 PDT13 I/O SW X a cce ss  da ta  bus44 SCAS O CAS s ignal 128 PDT12 I/O SW X a cce ss  da ta  bus45 REFRESH O REFRESH s ignal 129 PDT11 I/O SW X a cce ss  da ta  bus46 CS0 O CS  signa l 130 PDT10 I/O SW X a cce ss  da ta  bus47 SMA0 O Memory  a ddres s  b us 131 PDT9 I/O SW X a cce ss  da ta  bus48 SMA16 O Memory  a ddres s  b us 132 PDT8 I/O SW X a cce ss  da ta  bus49 VCC4 9 Power  s upply 133 VCC1 33 Power  s upply50 GND 50 Gro und 134 GND 134 Gro und51 SMA1 O Memory  a ddres s  b us 135 PDT7 I/O SW X a cce ss  da ta  bus52 SMA15 O Memory  a ddres s  b us 136 PDT6 I/O SW X a cce ss  da ta  bus53 SMA2 O Memory  a ddres s  b us 137 PDT5 I/O SW X a cce ss  da ta  bus54 SMA14 O Memory  a ddres s  b us 138 PDT4 I/O SW X a cce ss  da ta  bus55 SMA3 O Memory  a ddres s  b us 139 PDT3 I/O SW X a cce ss  da ta  bus56 SMA13 O Memory  a ddres s  b us 140 PDT2 I/O SW X a cce ss  da ta  bus57 SMA4 O Memory  a ddres s  b us 141 PDT1 I/O SW X a cce ss  da ta  bus58 SMA12 O Memory  a ddres s  b us 142 PDT0 I/O SW X a cce ss  da ta  bus59 SMA5 O Memory  a ddres s  b us 143 VCA143 Power  s upply60 GND 60 Gro und 144 GND 144 Gro und61 VCC6 1 Power  s upply 145 PAD 2 I SW X a cce ss  ad dres s  bus62 SMA11 O Memory  a ddres s  b us 146 PAD 1 I SW X a cce ss  ad dres s  bus63 SMA6 O Memory  a ddres s  b us 147 PAD 0 I SW X a cce ss  ad dres s  bus64 SMA10 O Memory  a ddres s  b us 148 VCC1 48 Power  s upply65 SMA7 O Memory  a ddres s  b us 149 GND 149 Gro und66 SMA9 O Memory  a ddres s  b us 150 PCS I Chip  s elec t67 SMA17 O Memory  a ddres s  b us 151 PW R I wr ite  ena ble68 SMA8 O Memory  a ddres s  b us 152 PRD I re ad e nable69 SMA18 O Memory  a ddres s b us 153 RXD0 I for MIDI or TO- HOST70 SMA19 O Memory  a ddres s b us 154 RXD1 I for MIDI or Ke y sc an71 SMA20 O Memory  a ddres s  b us 155 SCLKI I EXT Cloc k72 SMA21 O Memory  a ddres s  b us 156 ADIN I A/D c onverter73 SMA22 O Memory  a ddres s  b us 157 ADLR O A/D c onverter  LR  cl ock74 SMA23 O Memory  a ddres s  b us 158 DO0 O DAC75 CMA20 O Progr am ad dres s  b us 159 DO1 O DAC76 CMA19 O Progr am ad dres s  b us 160 SYSCLK O 1/2 cloc k77 VCC7 7 Power  s upply 161 VCC1 61 Power  s upply78 GND 78 O Gro und 162 GND 162 Gro und79 CMA18 O Progr am ad dres s  b us 163 W CLK O for DAC  LR c l oc k80 CMA17 O Progr am ad dres s  b us 164 QCL K O 1/12 c lo c k81 CMA5 O Progr am ad dres s  b us 165 BCLK O IIS-DAC  c lock82 CMA6 O Progr am ad dres s  b us 166 SYI I Synch signal83 CMA4 O Progr am ad dres s  b us 167 IRQ0 I Interrupt request84 CMA7 O Progr am ad dres s  b us 168 NMI I Interrupt request 
						

							RM1x
12
Ô HG73C201FD 
(XT890A00) SWX00 TONE GENERATOR
PIN
NO.N AME I /O FUN CTI ONPIN
NO.N AME I /O FUN CTI ON1 ICN I Initial c lear 85 CMA3 O2 RFC LKI I PLL Cloc k 86 CMA8 O3 TM2 I PLL Control 87 CMA2 O4 AVD D_PLL Power  s upply 88 CR D O re ad s ignal5 AVSS_PL L Gro und 89 CMA1 O Progr am ad dres s  b us6 MODE0 I Mode se t 90 CU B O high by te  effec tive sig nal7 VCC7 Power  s upply 91 VCC9 1 Power  s upply8 GND 8 Gro und 92 GHN D92 Gro und9 XIN I crystal oscillator 93 CS1 O CS  signal10 XOUT O crystal oscillator 94 CMA0 O Program address bus11 MODE1 I Mode  se t 95 CL B O low  by te e ffe ctive  s ignal12 TEST0 I TEST pin 96 CMA12 O13 TESTON I TEST  pin 97 CMA11 O Progr am ad dres s  b us14 AN0-P40 I 98 CMA10 O15 AN1-P41 I Analog Signal 99 CMA9 O16 AN2-P42 I 100 GND 100 Gro und17 AN3-P43 I 101 CW E O wr ite  s ignal18 AVD D_AN Power  s upply 102 CMA16 O19 AVSS_AN Gro und 103 CMA15 O Progr am ad dres s  b us20 TXD 0 O for MIDI or TO- HOST 104 CMA14 O21 TXD 1 O for MIDI 105 CMA13 O22 EXC LK I 1M Cloc k fo r to Ha st 106 CMD8 I/O23 SMD 11 I/O 107 CMD7 I/O24 SMD 4 I/O 108 CMD9 I/O25 SMD 3 I/O 109 CMD6 I/O26 SMD 12 I/O 110 CMD1 0 I/O27 S MD 10 I /O 111 CMD5 I /O28 SMD 5 I/O Wav e memor y data bus 112 CMD11 I/O Progr am memor y Data bus29 SMD 2 I/O 113 CMD4 I/O30 SMD 13 I/O 114 CMD1 2 I/O31 SMD 9 I/O 115 CMD3 I/O32 SMD 6 I/O 116 CMD1 3 I/O33 SMD 1 I/O 117 CMD2 I/O34 SMD 14 I/O 118 CMD1 4 I/O35 VCC3 5 Power  s upply 119 VCC119 Power  s upply36 GND 36 Gro und 120 GND 115 Gro und37 SMD 8 I/O 121 CMD1 I/O38 SMD 7 I/O Wav e memor y data bus 122 CMD1 5 I/O Progr am memor y Data bus39 SMD 0 I/O 123 CMD0 I/O40 SMD 15 I/O 124 CMA21 O Progr am ad dres s  b us41 SOE O re ad s ignal 125 PDT15 I/O42 SW E O wr ite  s ignal 126 PDT14 I/O43 SRAS O RAS s ignal 127 PDT13 I/O44 SCAS O CAS s ignal 128 PDT12 I/O45 REFRESH O REFRESH s ignal 129 PDT11 I/O SW X a cce ss  da ta  bus46 CS0 O CS signa l 130 PDT10 I/O47 SMA0 O Memory  a ddres s b us 131 PDT9 I/O48 SMA16 O Memory  a ddres s b us 132 PDT8 I/O49 VCC4 9 Power  s upply 133 VCC1 33 Power  s upply50 GND 50 Gro und 134 GND 134 Gro und51 SMA1 O 135 PDT7 I/O52 SMA15 O 136 PDT6 I/O53 SMA2 O 137 PDT5 I/O54 SMA14 O 138 PDT4 I/O55 SMA3 O Wav e Memor y  addr ess  b us 139 PDT3 I/O SW X a cce ss  da ta  bus56 SMA13 O 140 PDT2 I/O57 SMA4 O 141 PDT1 I/O58 SMA12 O 142 PDT0 I/O59 SMA5 O 143 VCC1 43 Power  s upply60 GND 60 Gro und 144 GND 144 Gro und61 VCC6 1 Power  s upply 145 PAD 2 I SW X a cce ss  ad dres s  bus62 SMA11 O 146 PAD 1 I SW X a cce ss  ad dres s  bus63 SMA6 O 147 PAD 0 I SW X a cce ss  ad dres s  bus64 SMA10 O 148 VCC1 48 Power  s upply65 SMA7 O 149 GND 149 Gro und66 SMA9 O 150 PCS I SWX access Chip select67 SMA17 O 151 PW R I SW X a cce ss  w rite e nable68 SMA8 O Wav e Memor y  addr ess  b us 152 PRD I SW X a cce ss  r ead  enabl e69 SMA18 O 153 RXD0 I for MIDI or TO- HOST70 SMA19 O 154 RXD1 I for MIDI or Ke y sc an71 SMA20 O 155 SCLKI I EXT Sy nc  Clock72 SMA21 O 156 ADIN I For Ext  A/D c onv erter73 SMA22 O 157 ADLR O A/D c onverter LR cl ock74 SMA23 O 158 DO0 O DAC75 CMA20 O Progr am ad dres s  b us 159 DO1 O DAC76 CMA19 O Progr am ad dres s  b us 160 SYSCLK O 1/2 cloc k77 VCC7 7 Power  s upply 161 VCC1 61 Power  s upply78 GND 78 O Gro und 162 GND 162 Gro und79 CMA18 O 163 W CLK O for DAC  LR clock80 CMA17 O 164 QCL K O 1/12 cl ock81 CMA5 O 165 BCLK O IIS-DAC c lock82 CMA6 O 166 SYI I Synch signal83 CMA4 O Progr am ad dres s  b us 167 IRQ0 I Interrupt request84 CMA7 O 168 NMI I Interrupt request 
						

							RM1x
13
Ô SH7014 
(XT437A00) CPU
PIN
NO.NAME
I /O FUN CTI ONPIN
NO.N AM E I /O FUN CTI ON
1 PE14 O Port E 57 D11I/O2 PE15 O
Port E58 D10 I/O Data bus
3VSS I Ground 59D9I/O4A0 O 60D8I/O5 A1 O 61 VSS I Ground6A2 O 62D7I/O7 A3 O 63 D6 I/O Data bus8A4 O 64D5I/O9 A5 O 65 VCC I Power supply10A6 O 66D4I/O11 A7 O Address bus 67 D3 I/O12 A8 O 68 D2 I/O Data bus13A9 O 69D1I/O14 A10 O 70 D0 I/O15 A11 O 71 VSS I Ground16 A12 O 72 XTAL I CLK17 A13 O 73 MD3 I Mode c ontrol18 A14 O 74 EXTAL I CLK19 A15 O 75 MD2 I Mode c ontrol20 A16 O 76 NMI I Non-maskable interrupt request21 VCC I Power supply 77 VCC I Power supply22 PB1/A17 O Address bus 78 MD1 I Mode c ontrol23 VSS I Ground 79 MD0 I Mode c ontrol24 /RAS O 80 PLLVCC I25 /CASL O Bus c ontrol 81 PLLCAP I CLK26 /CASH O 82 PLLVSS I27 VSS O Ground 83 PA15/CK O Port A28 RDWR O 84 /RES I Reset29 A18 O 85 PE0 I30 A19 O Port A 86 PE1 I31 A20 O 87 PE2 I Port E32 PB9 O Port B 88 PE3 I33 VSS I Ground 89 PE4 I34 /RD O Bus c ontrol 90 VSS I Ground35 /WDTOVF O NC 91 AN0 I36 /WRH O NC 92 AN1 I37 VCC I Power supply 93 AN2 I A/D38 /WRL O Bus c ontrol 94 AN3 I39 VSS I Ground 95 AN4 I40 /CS1 O Bus c ontrol 96 AN5 I41 /CS0 O Bus c ontrol 97 AVSS I Analog ground42 PA9 O Port A 98 AN6 I A/D43 PA8 I Port A 99 AN7 I A/D44/CS3O Bus c ontrol 100 AVCC I Power  supply45/CS2O Bus c ontrol 101 VSS I Ground46 PA5 O 102 PE5 O Port E47 PA4 O Port A 103 VCC I Power supply48 PA3 O 104 PE6 O49 /IRQ0 I Interrupt 105 PE7 O50 TXD0 O SCI 106 PE8 O Port E51 RXD0 I SCI 107 PE9 O52 D15 I/O 108 PE10 O
53D14I/O Data bus 109 VSS I Ground54D13I/O 110 PE11 O55VSSI Ground 111 PE12 O Port E56 D12 I/O Data bus 112 PE13 O
Ô 
PD63200GS-E1 
(XP867A00) DAC 
(Digital to Analog Converter)
PIN
NO.N AM E I/O FUN CTIONPIN
NO.N AM E I/O FUN CTION
1 4/8FS I 4/8  Fs s election 9 R.  REF Channel R voltage reference2 D. GND Digital ground 10 L. REF Channel L voltage reference3 16/8 BIT I 16 bit/8 bit selec tion 11 L. OUT O Channel L output4 D. VDD Digital power supply 12 A. GND Analog ground5 A. GND Analog ground 13 LRCX/W D I Left/right check, Word clock6 R.  OUT O Channel R output 14 LR/RSI ILeft/right selection, Channel R series input7A. VDD
Analog power supply1 5 S I/ L S I I Se ries  inp ut/Ch ann el L  s eries  in put8A. VDD 16 CLK I Clock 
						

							RM1x
14
ÔHD63266F (XI 939A00) FDC (Floppy Disk  Controller)PIN
NO.N AM E I /O FUN CTI ONPIN
NO.N AM E I /O FUN CTI ON
1 8//5 I Data transmis sion  speed 33 /TRKO I Track  00 signal2 XTALSET I Clock selec t 34 /INDEX I Index s ignal3 /RESET I Res t 35 /RDATA I Read data input from FDD4 E//RD I Enable/Read 36 XTAL25 RW//WR I Read/write/Write 37 EXTAL2 Clock6 /CS I Chip s elect 38 NC7 /DACK I DMA acknowledge 39 XTAL18 RS0 I Register select 40 EXTAL1 Clock9 RS1 I 41 VSS410 VSS1 42 VSS5 Ground11 VSS2 Ground 43 NC12 D0 I/O 44 VCC213 D1 I/O 45 VCC3 Power supply14 D2 I/O 46 VCC415 D3 I/O Data bus 47 /WGATE O Write control16 D4 I/O 48 /WDATA O Write data to FDD17 D5 I/O 49 VSS6 Ground1 8 D 6 I /O 5 0 / ST E P O Ste p s ign al t o c ont ro l he ad  of F DD19 D 7 I /O 51 / HD IR O D irect i on20 /DREQ O DMA request 52 /HLOAD O Head  load21 /IRQ O Interrupt request 53 /HSEL O Head  select22 /DEND I Data end 54 VSS7 Ground23 VSS3 Ground 55 /DS0 O24 1/2 EX1 56 /DS1 O Drive select25 VCC1 Power supply 57 /DS2 O26 NUM1 I 58 /DS3 O27 NUM3 I 59 VSS8 Ground28 IFS I Hos t interface selec t 60 /MON0 O29 SFORM I Format data 61 /MON1 O Motor on30 /INP I Index pulse 62 /MON2 O31 /READY I Ready from FDD 63 /MON3 O32 /WPRT I Write control s ignal 64 VSS9 Ground
ÔSED1335F0B (XQ 595A00) LCDC (LCD Controller)PIN
NO.N AM E I /O FUN CTI ONPIN
NO.N AM E I /O FUN CTI ON
1 VA5 O 31 XD2 O2 VA4 O 32 XD1 O X driver data bus3 VA3 O VRAM address bus 33 XD0 O4 VA2 O 34 XECL O X driver enable chain cloc k5 VA1 O 35 XSCL O X driver shift clock6 VA0 O 36 VSS Ground7 VR/W O VRAM write strobe 37 LP O Latch pulse8 /VCE O VRAM chip enable 38 WF O Frame signal9 NC 39 YDIS O LCD power down10 /RES I Res et 40 YD O Scan start pulse11 NC 41 YSCL O Scan shift  clock12 NC 42 VD7 I/O13 /RD I 80: Read strobe, 68: E clock 43 VD6 I/O14 /WR I 80:  Write  strobe, 68: Read/Write 44 VD5 I/O15 SEL2 I CPU 80/68  bus s elect 45 VD4 I/O VRAM  data  bus16 SEL1 I 46 VD3 I/O17 OSC1 I Clock 47 VD2 I/O18 OSC2 O 48 VD1 I/O19 /CS I Chip select 49 VD0 I/O20 A0 I Data bus  signal discrimination 50 VA15 O21 VDD Power supply 51 VA14 O22 D0 I/O 52 VA13 O23 D1 I/O 53 VA12 O24 D2 I/O 54 VA11 O VRAM address bus25 D3 I/O 55 VA10 O26 D4 I/O Data bus 56 VA9 O27 D5 I/O 57 VA8 O28 D6 I/O 58 VA7 O29 D7 I/O 59 VA6 O30 XD3 O X  driver data  bus 60 NC 
						

							RM1x
15
Ô
 SED1335F0B
 (XQ595A00) LCDC (LCD Controller)
PIN
NO.N AME I /O FUN CTI ONPIN
NO.N AME I /O FUN CTI ON
1 VA5 O 31 X D2 O2 VA4 O 32 XD1 O Data bus output for 4 bit dot3 VA3 O VRAM address bus 33 XD0 O4 VA2 O 34 XECL O S driver enable, chain clock5 VA1 O 35 XSCL O Data bus  shift clock6 VA0 O 36 V ss - Gr ound7 /VWR O VRAM  read/write 37 LP O X  driver latch pulse8 /VCE O Memory c ontrol 38 WF O Frame  signal for X/Y driver9 / VR D - N ot  us ed 3 9 Y DI S OPower down signal for  displaying off  mode10 /RES I Initial clear 40 YD O Scan start signal11 N C - N ot  us ed 4 1 Y S CL O S c a n s h if t c lo c k1 2 N C - N ot  us ed 4 2 V D7 I /O13 /RD I Read strobe 43 VD6 I/O14 /WR I Write s trobe 44 VD5 I/O15 SEL2 I Bus selec t 45 VD4 I/O VRAM  data bus16 SEL1 I Bus select 46 VD3 I/O17 OSC1 I Clock 47 VD2 I/O18 OSC2 O Clock 48 VD1 I/O19 /CS I Chip select 49 VD0 I/O20 A0 I Data mode select 50 VA15 O21 Vdd - Power supply 51 VA14 O22 D 0 I /O 52 VA13 O23 D 1 I /O 53 VA12 O24 D2 I/O 54 VA11 O VRAM address bus25 D3 I/O Data bus 55 VA10 O26 D 4 I /O 56 VA9 O27 D 5 I /O 57 VA8 O28 D 6 I /O 58 VA7 O29 D 7 I /O 59 VA6 O30 XD3 O Data bus output for 4 bit dot 60 NC - Not us ed
Ô SED1335FO B 
(XQ595A00) LCDCPIN
NO.N AME I /O FUN CTI ONPIN
NO.N AME I /O FUN CTI ON
1 VA5 O 31 X D2 O2 VA4 O 32 X D1 O X  Dr iver  D ata  Bus3 VA3 O 33 X D0 O4 VA2 O 34 XECL O Xdriver  Enable Change Clock5 VA1 O 35 XSCL O Xdriver Shift Clock6 VA0 O 36 V ss - Gr oud7 /VWR O VRAM Write Signal 37 LP O Latch Pulse8 /VCE O VRAM Chip enable 38 WF O Frame Signal9 N C - 39 Y DI S O LCD  P ower  D own O utput10 /RES I Res et Input Signal 40 YD O Scan Start Puls e11 NC - 41 YSCL O Scan Sift Clock12 NC - 42 VD7 I/O13 /RD I Read Signal 43 VD6 I/O14 /WR I Write Signal 44 VD5 I/O15 SEL2 I Bus Select 45 VD4 I/O16 SEL1 I Bus Select 46 VD3 I/O17 OS C 1 I Os cil lat or1 47 V D2 I /O18 OS C 2 O Os cil lat or2 48 V D1 I /O19 /CS I Chip Select Input Signal 49 VD0 I/O20 A0 I Data Bus  Signal Kind Judgement 50 VA15 O21 Vdd - Power Supply51 VA14 O22 D 0 I /O 52 VA13 O23 D 1 I /O 53 VA12 O24 D 2 I /O 54 VA11 O25 D 3 I /O 55 VA10 O26 D 4 I /O 56 VA9 O27 D 5 I /O 57 VA8 O28 D 6 I /O 58 VA7 O29 D 7 I /O 59 VA6 O30 X D3 O X  Dr iver  D ata  Bus 60 N C -
VRAM Address Bus
VRAM Data Bus
VRAM Address Bus
Data Bus for System 
						

							RM1x
16 
						

							19 RM1x
28CA1-8812706 
						

							RM1x
20
•  DM Circuit Board
Ú2 Component side
DM:2NA-V260480
to LCD Back light to FDD to MVR CN6
MIDI-OUT MIDI-IN CONTRASTFOOT SWOUTLET/R OUTLET/L-MONO PHONES DC IN STAND BY/ON
to LCD to PN-CN4 to PN-CN5
to FDD UNIT to PN-CN4 to PN-
CN1 
						

							21 RM1x
Patternside
•  DM Circuit Board 
						

							RM1x
22
•  PN 1/3Circuit Board
to DM-CN4Component side
to DM-CN5to DM-CM3 to DM-CN1
Note: See parts list for details of circuit board component parts.
See PANEL SWITCH TABLE on C2 of OVERALL CIRCUIT
DIAGRAM.