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Samsung Exynos 5 User Manual

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    Page 221

    Page 221 Samsung Confidential Exynos 5250_UM 4 Pad Control 4-167 4.4.1.240 EXT_INT42CON  Base Address: 0x1140_0000  Address = Base Address + 0x0E08, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31] –=Reserved=0x0= EXT_INT42= _CON[7]=[30:28]=RW= Setting the signaling method=of EXT_INT42[7]= 0x0 = Sets Low level= 0x1 = Sets High level= 0x2 = Triggers Falling edge = 0x3 = Triggers Rising edge== 0x4 = Triggers Both edge== 0x5 to 0x7 = Reserved= 0x0= RSVD=[27]=–=Reserved=0x0=... 
    Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-167  
4.4.1.240 EXT_INT42CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0E08, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
RSVD [31] –=Reserved=0x0=
EXT_INT42=
_CON[7]=[30:28]=RW=
Setting the signaling method=of EXT_INT42[7]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[27]=–=Reserved=0x0=...

    Page 222

    Page 222 Samsung Confidential Exynos 5250_UM 4 Pad Control 4-168 Name Bit Type Description Reset Value _CON[2] 0x0 = Sets Low level 0x1 = Sets High level 0x2 = Triggers Falling edge 0x3 = Triggers Rising edge 0x4 = Triggers Both edge 0x5 to 0x7 = Reserved RSVD [7] – Reserved 0x0 EXT_INT42 _CON[1] [6:4] RW Setting the signaling method of EXT_INT42[1] 0x0 = Sets Low level 0x1 = Sets High level 0x2 = Triggers Falling edge 0x3 = Triggers Rising edge 0x4 = Triggers Both edge 0x5 to 0x7 =... 
    Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-168  
Name Bit Type Description Reset Value 
_CON[2] 0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
RSVD [7] – Reserved 0x0 
EXT_INT42 
_CON[1] [6:4] RW 
Setting the signaling method of EXT_INT42[1] 
0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 =...

    Page 223

    Page 223 Samsung Confidential Exynos 5250_UM 4 Pad Control 4-169 4.4.1.241 EXT_INT43CON  Base Address: 0x1140_0000  Address = Base Address + 0x0E0C, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31] –=Reserved=0x0= EXT_INT43= _CON[7]=[30:28]=RW= Setting the signaling method=of EXT_INT43[7]= 0x0 = Sets Low level= 0x1 = Sets High level= 0x2 = Triggers Falling edge = 0x3 = Triggers Rising edge== 0x4 = Triggers Both edge== 0x5 to 0x7 = Reserved= 0x0= RSVD=[27]=–=Reserved=0x0=... 
    Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-169  
4.4.1.241 EXT_INT43CON 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0E0C, Reset Value = 0x0000_0000 
Name Bit Type Description Reset Value 
RSVD [31] –=Reserved=0x0=
EXT_INT43=
_CON[7]=[30:28]=RW=
Setting the signaling method=of EXT_INT43[7]=
0x0 = Sets Low level=
0x1 = Sets High level=
0x2 = Triggers Falling edge =
0x3 = Triggers Rising edge==
0x4 = Triggers Both edge==
0x5 to 0x7 = Reserved=
0x0=
RSVD=[27]=–=Reserved=0x0=...

    Page 224

    Page 224 Samsung Confidential Exynos 5250_UM 4 Pad Control 4-170 Name Bit Type Description Reset Value _CON[2] 0x0 = Sets Low level 0x1 = Sets High level 0x2 = Triggers Falling edge 0x3 = Triggers Rising edge 0x4 = Triggers Both edge 0x5 to 0x7 = Reserved RSVD [7] – Reserved 0x0 EXT_INT43 _CON[1] [6:4] RW Setting the signaling method of EXT_INT43[1] 0x0 = Sets Low level 0x1 = Sets High level 0x2 = Triggers Falling edge 0x3 = Triggers Rising edge 0x4 = Triggers Both edge 0x5 to 0x7 =... 
    Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-170  
Name Bit Type Description Reset Value 
_CON[2] 0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 = Reserved 
RSVD [7] – Reserved 0x0 
EXT_INT43 
_CON[1] [6:4] RW 
Setting the signaling method of EXT_INT43[1] 
0x0 = Sets Low level 
0x1 = Sets High level 
0x2 = Triggers Falling edge  
0x3 = Triggers Rising edge  
0x4 = Triggers Both edge  
0x5 to 0x7 =...

    Page 225

    Page 225 Samsung Confidential Exynos 5250_UM 4 Pad Control 4-171 4.4.1.242 EXT_INT40_FLTCON0  Base Address: 0x1140_0000  Address = Base Address + 0x0E80, Reset Value = 0x8080_8080 Name Bit Type Description Reset Value FLTEN14[3] [31] RW Enables Filter for EXT_INT40[3] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL14[3] [30] RW Selects Filter for EXT_INT40[3] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH14[3] [29:24] RW Filtering width of EXT_INT40[3] This value is valid when... 
    Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-171  
4.4.1.242 EXT_INT40_FLTCON0 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0E80, Reset Value = 0x8080_8080 
Name Bit Type Description Reset Value 
FLTEN14[3] [31] RW 
Enables Filter for EXT_INT40[3] 
0x0 = Disables 
0x1 = Enables 
0x1 
FLTSEL14[3] [30] RW 
Selects Filter for EXT_INT40[3] 
0x0 = Delays filter 
0x1 = Digital filter (clock count) 
0x0 
FLTWIDTH14[3] [29:24] RW Filtering width of EXT_INT40[3] 
This value is valid when...

    Page 226

    Page 226 Samsung Confidential Exynos 5250_UM 4 Pad Control 4-172 4.4.1.243 EXT_INT40_FLTCON1  Base Address: 0x1140_0000  Address = Base Address + 0x0E84, Reset Value = 0x8080_8080 Name Bit Type Description Reset Value FLTEN14[7] [31] RW Enables Filter for EXT_INT40[7] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL14[7] [30] RW Selects Filter for EXT_INT40[7] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH14[7] [29:24] RW Filtering width of EXT_INT40[7] This value is valid when... 
    Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-172  
4.4.1.243 EXT_INT40_FLTCON1 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0E84, Reset Value = 0x8080_8080 
Name Bit Type Description Reset Value 
FLTEN14[7] [31] RW 
Enables Filter for EXT_INT40[7] 
0x0 = Disables 
0x1 = Enables 
0x1 
FLTSEL14[7] [30] RW 
Selects Filter for EXT_INT40[7] 
0x0 = Delays filter 
0x1 = Digital filter (clock count) 
0x0 
FLTWIDTH14[7] [29:24] RW Filtering width of EXT_INT40[7] 
This value is valid when...

    Page 227

    Page 227 Samsung Confidential Exynos 5250_UM 4 Pad Control 4-173 4.4.1.244 EXT_INT41_FLTCON0  Base Address: 0x1140_0000  Address = Base Address + 0x0E88, Reset Value = 0x8080_8080 Name Bit Type Description Reset Value FLTEN15[3] [31] RW Enables Filter for EXT_INT41[3] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL15[3] [30] RW Selects Filter for EXT_INT41[3] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH15[3] [29:24] RW Filtering width of EXT_INT41[3] This value is valid when... 
    Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-173  
4.4.1.244 EXT_INT41_FLTCON0 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0E88, Reset Value = 0x8080_8080 
Name Bit Type Description Reset Value 
FLTEN15[3] [31] RW 
Enables Filter for EXT_INT41[3] 
0x0 = Disables 
0x1 = Enables 
0x1 
FLTSEL15[3] [30] RW 
Selects Filter for EXT_INT41[3] 
0x0 = Delays filter 
0x1 = Digital filter (clock count) 
0x0 
FLTWIDTH15[3] [29:24] RW Filtering width of EXT_INT41[3] 
This value is valid when...

    Page 228

    Page 228 Samsung Confidential Exynos 5250_UM 4 Pad Control 4-174 4.4.1.245 EXT_INT41_FLTCON1  Base Address: 0x1140_0000  Address = Base Address + 0x0E8C, Reset Value = 0x8080_8080 Name Bit Type Description Reset Value FLTEN15[7] [31] RW Enables Filter for EXT_INT41[7] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL15[7] [30] RW Selects Filter for EXT_INT41[7] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH15[7] [29:24] RW Filtering width of EXT_INT41[7] This value is valid when... 
    Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-174  
4.4.1.245 EXT_INT41_FLTCON1 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0E8C, Reset Value = 0x8080_8080 
Name Bit Type Description Reset Value 
FLTEN15[7] [31] RW 
Enables Filter for EXT_INT41[7] 
0x0 = Disables 
0x1 = Enables 
0x1 
FLTSEL15[7] [30] RW 
Selects Filter for EXT_INT41[7] 
0x0 = Delays filter 
0x1 = Digital filter (clock count) 
0x0 
FLTWIDTH15[7] [29:24] RW Filtering width of EXT_INT41[7] 
This value is valid when...

    Page 229

    Page 229 Samsung Confidential Exynos 5250_UM 4 Pad Control 4-175 4.4.1.246 EXT_INT42_FLTCON0  Base Address: 0x1140_0000  Address = Base Address + 0x0E90, Reset Value = 0x8080_8080 Name Bit Type Description Reset Value FLTEN16[3] [31] RW Enables Filter for EXT_INT42[3] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL16[3] [30] RW Selects Filter for EXT_INT42[3] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH16[3] [29:24] RW Filtering width of EXT_INT42[3] This value is valid when... 
    Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-175  
4.4.1.246 EXT_INT42_FLTCON0 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0E90, Reset Value = 0x8080_8080 
Name Bit Type Description Reset Value 
FLTEN16[3] [31] RW 
Enables Filter for EXT_INT42[3] 
0x0 = Disables 
0x1 = Enables 
0x1 
FLTSEL16[3] [30] RW 
Selects Filter for EXT_INT42[3] 
0x0 = Delays filter 
0x1 = Digital filter (clock count) 
0x0 
FLTWIDTH16[3] [29:24] RW Filtering width of EXT_INT42[3] 
This value is valid when...

    Page 230

    Page 230 Samsung Confidential Exynos 5250_UM 4 Pad Control 4-176 4.4.1.247 EXT_INT42_FLTCON1  Base Address: 0x1140_0000  Address = Base Address + 0x0E94, Reset Value = 0x8080_8080 Name Bit Type Description Reset Value FLTEN16[7] [31] RW Enables Filter for EXT_INT42[7] 0x0 = Disables 0x1 = Enables 0x1 FLTSEL16[7] [30] RW Selects Filter for EXT_INT42[7] 0x0 = Delays filter 0x1 = Digital filter (clock count) 0x0 FLTWIDTH16[7] [29:24] RW Filtering width of EXT_INT42[7] This value is valid when... 
    Samsung Confidential  
Exynos 5250_UM 4 Pad Control 
 4-176  
4.4.1.247 EXT_INT42_FLTCON1 
 Base Address: 0x1140_0000 
 Address = Base Address + 0x0E94, Reset Value = 0x8080_8080 
Name Bit Type Description Reset Value 
FLTEN16[7] [31] RW 
Enables Filter for EXT_INT42[7] 
0x0 = Disables 
0x1 = Enables 
0x1 
FLTSEL16[7] [30] RW 
Selects Filter for EXT_INT42[7] 
0x0 = Delays filter 
0x1 = Digital filter (clock count) 
0x0 
FLTWIDTH16[7] [29:24] RW Filtering width of EXT_INT42[7] 
This value is valid when...
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