Nintendo 8 Bit Manual
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21 • Single-screen mirroring points all four logical name tables to the same physical name table as shown in figure 3-6. 11 11 Figure 3-6. Single-screen mirroring. • Four-screen mirroring uses an additional 2 KB of RAM in the cartridge itself to allow logical name tables to each map to separate physical name tables as shown in figure 3-7. 12 34 Figure 3-7. Four-screen mirroring. 3.7 Sprites Sprites are the characters to draw on the screen. Sprites can be either 8x8 pixels or 8x16 pixels. Most characters are composed of multiple sprites. The sprite data is stored in the pattern tables while the sprite attributes are stored in SPR-RAM. There are a maximum of 64 sprites, each of which uses four bytes in SPR-RAM. The bytes work as follows: • Byte 0 - Stores the y-coordinate of the top left of the sprite minus 1. • Byte 1 - Index number of the sprite in the pattern tables. • Byte 2 - Stores the attributes of the sprite. • Bits 0-1 - Most significant two bits of the colour. • Bit 5 - Indicates whether this sprite has priority over the background. • Bit 6 - Indicates whether to flip the sprite horizontally. • Bit 7 - Indicates whether to flip the sprite vertically. 8x16 sprites use different pattern tables based on their index number. If the index number is even the sprite data is in the first pattern table at $0000, otherwise it is in the second pattern table at $1000. Sprites can be read or written one at a time by first writing the required address to $2003 and then reading or writing $2004. Alternatively the whole of SPR-RAM can be written in one DMA operation by writing to $4014. Sprites are given priority based on their position in SPR-RAM. The first sprite is known as sprite 0 and has higher priority. On each line the system calculates which sprites are on that line and draws them, lowest priority first, to ensure high priority sprites are drawn on top. Only eight sprites are allowed per scanline, and the system indicates when this number has been reached by setting bit 5 of I/O register $2002.
22 A common technique used for scrolling involves determining whether sprite 0 is overlapping a non-transparent background pixel. If the system is drawing sprite 0, and any non- transparent pixel in it is in the same position as a non-transparent background pixel, the system sets the sprite 0 hit flag in bit 6 of $2002. Therefore if the background tile contains only transparent pixels the sprite 0 hit flag will not be set. Figure 19 shows sprite 0 detection. The left image shows the background, the centre image shows the sprite and the right image shows the composite of the two. Colour 0 represents transparency and the circled pixel indicates where the sprite 0 hit flag is set. Figure 3-8 is adapted from [20], however the original incorrectly indicated where the hit flag was set. Figure 3-8. Sprite 0 detection. Adapted from [7]. Characters are generally larger than a single sprite and so are constructed by combining multiple sprites. For example figure 3-9 shows how the Mario character is constructed of eight separate 8x8 sprites. Figure 3-9. Character construction. Adapted from [33]. 3.8 Scrolling The background can be scrolled horizontally or vertically. Scrolling makes use of the separate name tables. At any given time background on the screen is either taken straight from one of the name tables or will be a combination of two name tables. This is shown in figures 3-10 and 3-11. Figure 3-10 shows the contents of two of the name tables (the other
23 two are, of course, mirrors) and figure 3-11 shows the composite image displayed on the screen, including sprites. Figure 3-10. Horizontal scrolling in Super Mario Bros. Figure 3-11. Composite image. The final image starts on the first name table and stretches across to the second. The division between the two name tables is shown on figure 3-10 by the grey line. The two blue lines indicate the area which is shown on the screen. To the left of the on-screen portion is the section which has already been displayed, and which has now scrolled off the screen. To the right of the on-screen portion is where the system is currently filling the name table with what lies ahead and will be displayed on the screen as Mario continues to move along. As demonstrated by the cloud which is cut in half, not all of this area has yet been filled by the system. Some games only allow movement in one direction while others allow scrolling in both directions. This is described by Nintendo as follows [33]: “The PPU may display only 960 characters at a time, but it actually stores twice that amount. In a one way scroll, new characters constantly replace old characters behind the scroll. This is why in games like Super Mario Bros. the screen can scroll only one way. In Metroid, however, scrolling occurs in two directions and new characters are continually added in the direction of the scroll.”
24 It is clear that the status bar area of the screen is not scrolled in the same way as the rest and is fully resident on the first name table. This is typical of status information and is handled in Super Mario Bros. by using the sprite 0 hit flag and in Super Mario Bros. 3 by generating an IRQ. The general picture of horizontal and vertical scrolling is shown in figure 3-12. The name table shown here as A is specified by bits 0-1 of $2000 and B is the name table after (which depends on the mirroring technique). This does not apply to games which allow simultaneous horizontal and vertical scrolling [7]. The background image will span across the name tables as shown in figure 3-13. Figure 3-12. Horizontal and vertical scrolling. Adapted from [7]. Name Table 0 ($2000) Name Table 2 ($2800) Name Table 1 ($2400) Name Table 3 ($2C00) Figure 3-13. Name tables used for background. Adapted from [7]. The way scrolling works is described in [8] and is summarised here. The system maintains a 16-bit VRAM address register, the value of which is set by $2006. The layout of this register is as follows: • Bits 0-11 - Stores the address in the name table as an offset from $2000. Bits 0-4 are the x-scroll and is incremented as the line is drawn. As this is incremented from 31, it wraps to 0 and bit 10 is switched. Bits 5-9 are the y-scroll and are incremented at the end of a line. When incremented from 29, it wraps to 0 and bit 11 is switched. If the value is set above 29 by a write to $2007, then it will wrap to 0 when it reaches 31, but bit 11 is not affected. • Bits 12-14 are the tile y-offset. Since the x-scroll and the y-scroll indicate tile numbers, this allows 32 tiles across the screen (256 pixels) and 30 tiles down the screen (240 pixels), for a total of 960 tiles. There is a second, temporary VRAM address register which is also 16-bits long. Finally there is a 3-bit tile x-offset. These are updated by writes to registers and as the frame is drawn.
25 3.9 Television Standards The NES connects to a television to display the game to user. As a result different versions of the system were created for the two television formats, NTSC and PAL. NTSC (National Television Standards Committee) is the standard used in North America, most of South America and parts of Asia [34]. PAL (Phase Alternating Line) is the standard used in Europe, much of Asia, Africa and Australasia [35]. Table 3-1 shows the differences between NTSC and PAL versions of the NES. NTSC PAL Frames per second 60 50 Time per frame (milliseconds) 16.67 20 Scanlines per frame (of which is V-Blank) 262 (20) 312 (70) CPU cycles per scanline 113.33 106.56 Resolution 256 x 224 256 x 240 CPU speed 1.79 MHz 1.66 MHz Table 3-1. Comparison of NTSC and PAL NES systems. Images are displayed on a television screen by a stream of high speed electrons which moves across the screen, from left to right, drawing each pixel. A single line of pixels is referred to as a scanline. At the end of a scanline the electron beam must move to the next line and return to the left before it can proceed. The time it takes to do this is known as the Horizontal Blank period (H-Blank). After drawing the screen once, the electron beam must return to the top left corner, ready to start the next frame. The time it takes to do this is known as the Vertical Blank period (V- Blank). When entering the V-Blank period, the PPU indicates this by setting bit 7 of I/O register $2002. This bit is reset when the CPU next reads from $2002. On an NTSC version of the NES, there are 240 scanlines on the screen (although the top and bottom eight lines are cut off) and it takes an additional 3 scanlines worth of CPU cycles to enter V-Blank. The V-Blank period takes a further 20 scanlines worth before the next frame can be drawn.
26 4 - Game Hardware 4.1 Cartridges NES games came on cartridges known as a Game Pak. The game itself was stored on ROM chips inside the cartridge. Some cartridges also featured RAM, powered by a battery, in order to allow games to be saved. Figure 4-1. Ys cartridge for the Famicom compared to Super Mario Bros. / Duck Hunt cartridge for the NES [28]. Figure 4-1 shows the difference between cartridges for the Famicom and NES. Nintendo designed a basic cartridge for the Famicom, as shown top in figure 4-1, but other developers designed their own cartridges with a variety of shapes, sizes and colours. With the NES, Nintendo produced the cartridges to a standard design, which is shown bottom in figure 4-1. Although the NES cartridge is bigger, much of it is just wasted space. Famicom cartridges had a 60-pin connection while NES cartridges had a 72-pin connection, making the two formats incompatible without an adapter [28]. Figure 4-2 shows the inside of a NES, looking at the bottom of the motherboard. The red line indicates the 72-pin connector to which cartridges connect. Figure 4-3 shows a cartridge being used with the original, front-loading, version of the NES. Figure 4-4 shows the inside of a NES cartridge. The chip on the left is the CHR-ROM and contains the pattern tables, the graphics data for the game. The chip on the right is the PRG- ROM and contains the program code for the game. Figure 4-2. Inside the NES, the 72-pin connector is indicated by the red line [36].
27 4.1.1 Memory Mappers The NES’ limited memory was sufficient for early games, however as they became more complex, games became larger and the memory was insufficient. To allow cartridges to contain more ROM, the NES had to be able to swap the data in and out of memory when it was needed. Since the NES could not address beyond $FFFF, switching hardware in the cartridges themselves was used. This hardware was known as a memory mapper or MMC (Memory Management Chip). The basic idea of memory mapping is that when the system requires access to data on a ROM bank that is not currently loaded in memory, the software indicates the need to switch banks and the selected bank is loaded into a page in memory, replacing the existing contents. The use of memory mappers was one of the factors in the NES’ longevity, allowing it to survive technological deficiencies. Several memory mappers were used by the NES and a comprehensive list can be found in Appendix C. Some of the more common memory mappers are described below and detailed explanations of how they work can be found in Appendix D. • UNROM switches were the first chips to allow bank switching of NES games. UNROM only allowed switching of PRG-ROM banks. It provided no support for CHR-ROM. The maximum number of 16 KB PRG-ROM banks using UNROM is 8 [39]. • CNROM switches allowed swapping of CHR-ROM banks but not PRG-ROM. Therefore the size of the program code was no larger than with games using no memory mapper, but more sophisticated graphics were possible. • MMC1 allowed switching of both PRG-ROM and CHR-ROM banks. The chip also allowed changes to name table mirroring and had support for saving to a RAM chip. The maximum number of 16 KB PRG-ROM banks using MMC1 is 8. MMC1 was the most used memory mapper, being used by a variety of games including Metroid and The Legend of Zelda [27]. • MMC3 allowed switching of both PRG-ROM and CHR-ROM banks. The chip also allowed for selective screen scrolling, that is allowing part of the screen to move while part remains stationary, and was capable of generating IRQs. The maximum number of 16 KB PRG-ROM banks using MMC3 is 32 [27]. MMC3 was the second most used chip, used by games including Super Mario Bros. 2 and Super Mario Bros. 3. 4.1.2 Cartridge File Formats Figure 4-4. Inside a NES cartridge [38].Figure 4-3. Cartridge inserted into NES [37].
28 The software that can be run using an emulator is usually referred to as a ROM image in reference to the original ROM chips used to store it. A simple dump of the contents of the cartridge is unlikely to be sufficient as it leaves no way to identify what each part of the file means. Two different file formats have emerged to provide this information. The iNES file format was originally defined by Marat Fayzullin for use in his iNES emulator. The format has since been used by most emulators and is the most common format for ROM images. INES format files should have the file extension *.nes. The format provides a 16 byte header at the start of the file which contains important information. The format as described in [9] is as shown in table 4-1: Starting Byte Length (Bytes) Contents 0 3 Should contain the string ‘NES’ to identify the file as an iNES file. 3 1 Should contain the value $1A, also used to identify file format. 4 1 Number of 16 KB PRG-ROM banks. The PRG-ROM (Program ROM) is the area of ROM used to store the program code. 5 1 Number of 8 KB CHR-ROM / VROM banks. The names CHR-ROM (Character ROM) and VROM are used synonymously to refer to the area of ROM used to store graphics information, the pattern tables. 6 1 ROM Control Byte 1: • Bit 0 - Indicates the type of mirroring used by the game where 0 indicates horizontal mirroring, 1 indicates vertical mirroring. • Bit 1 - Indicates the presence of battery-backed RAM at memory locations $6000-$7FFF. • Bit 2 - Indicates the presence of a 512-byte trainer at memory locations $7000-$71FF. • Bit 3 - If this bit is set it overrides bit 0 to indicate four- screen mirroring should be used. • Bits 4-7 - Four lower bits of the mapper number. 7 1 ROM Control Byte 2: • Bits 0-3 - Reserved for future usage and should all be 0. • Bits 4-7 - Four upper bits of the mapper number. 8 1 Number of 8 KB RAM banks. For compatibility with previous versions of the iNES format, assume 1 page of RAM when this is 0. 9 7 Reserved for future usage and should all be 0. Table 4-1. iNES header information. Following the header is the 512-byte trainer, if one is present, otherwise the ROM banks begin here, starting with PRG-ROM then CHR-ROM. The format allows for up to 256 different memory mappers. Each mapper is assigned a specific number and the mapper number can be obtained by shifting bits 4-7 of control byte 2 to the left by 4 bits and then adding the bits 4-7 of control byte 1. A complete list of mappers and their official iNES mapper numbers can be found in Appendix C.
29 The iNES format suffers from many problems. It is often misused, with people inserting their names in the header, for example. Marat Fayzullin’s involvement in NES development seems to have decreased recently and, in the absence of any official updates to the format, many developers have specified their own alterations, others have also been devising their own mapper numbers. This has led to the format becoming increasingly inaccurate and the development of UNIF (Universal NES Interchange Format) [40]. UNIF format files generally have the extension *.unf and contain a header which identifies the format and the revision number, followed by a series of chunks. Each chunk consists of an ID string to identify the purpose of the chunk, the length of the block in bytes and the data. The format is quite similar to XML, although chunks are not closed, whereas tags are closed in XML. The UNIF format identifies each mapper from the name of the board used, rather than via a number. This ensures that only genuine boards can be used. Although the UNIF format improves greatly on the iNES format, it is currently supported by fewer emulators and less ROM files are available in the format. The iNES format should be gradually replaces by UNIF within the next few years. 4.2 Famicom Disk System Partially in response to rising chip prices and partially as part of an effort to make the Famicom more like a computer, Nintendo released the Famicom Disk System in early 1986 [28]. The system allowed the Famicom to run games stored on 2.5” magnetic disks with 32 KB of RAM and 8 KB of VRAM, rather than the traditional cartridges [9]. The Famicom Disk System is shown attached to the Famicom in figure 4-5 and the Mario Golf disk is shown in figure 4-6. Nintendo hoped that the system would allow for larger games, due to larger capacities, and would also offer cheaper prices to the consumer. The disks were also reusable, allowing gamers to replace a game with a new one at special kiosks, paying a small fee rather than having to pay for a new disk [10]. Almost 2 million Disk Systems sold in 1986. However, the system was not popular with licensees who had to decide which format to release games for, and Nintendo’s strict licensing for Disk System games also made the format unpopular. When semiconductor prices dropped, cartridges could have a higher capacity than disks for the same price. Although over 4 million Disk Systems were sold by 1990, the cartridge remained the main method of storing games and the Famicom Disk System was never released outside Asia. More information on how the Famicom Disk System worked can be found in [9]. Figure 4-5. Famicom attached to Famicom Disk S ystem [28].
30 Figure 4-6. Mario Golf disk [41]. 4.3 Game Genie The Game Genie was a device that allowed gamers to cheat by adjusting the way the code is executed. The Game Genie was designed by Codemasters and distributed by Galoob Toys [14]. Other cheat devices worked by locking the value of a given memory location. For example if the game stores the number of lives remaining in location $1000, then locking this to 5 would give the gamer an infinite number of lives. The Game Genie, however, works on ROM rather than RAM. It monitors the address bus of the cartridge port and if it detects a given address writes the required value to the data bus [5]. Figure 4-7. Game Genie [42].