Motorola Vhf 136 174 Mhz Uhf 435 480 Mhz 6881096c38 Manual

							6881096C38March, 2006
UHF (435-480 MHz) Band Information: Theory of Operation 8-5
7. The radio restores last power up state (i.e. state before the radio was turned-off).
8. Power is supplied to PLL circuitry.
9. Power is supplied to Rx and Rx VCO circuitry.
10. CPU sends data to PLL circuitry. If LOCK status is confirmed, radio continues the power-up 
sequence. Otherwise, PLL ERR is displayed.
11. Squelch level is checked.
12. If the Rx audio level is less than the pre-programmed squelch level, and other unmuting 
conditions are met, the radio will open squelch.
8.3.4 CPU / Control Section
When the radio is turned ON, the CPU (Q101) reads the radio status from the EEPROM Q114. It 
also monitors the keypad, the PTT line and other inputs such as the squelch detect, etc. 
continuously. When there is a channel change, the CPU sends the correct frequency information to 
the synthesizer via pins 2, 100, and 89. The CPU is clocked by the 8.388608MHz oscillator, which is 
composed of X101, C101, C106, and R158.
8.3.5 VCO / Synthesizer Section
This section consists of the Temperature-Compensated Crystal Oscillator (TCXO), Voltage 
Controlled Oscillator (VCO), Synthesizer and the Loop Filter. These circuits are found on the RF 
board.
8.3.5.1  Temperature-Compensated Crystal Oscillator (TCXO)
The reference oscillator is a temperature compensated crystal-controlled, Pierce type circuit. It 
utilizes a logic gate within Q323 as a gain element. C335 is used to adjust the oscillator on frequency 
(14.4 MHz) at room temperature (22°C). Temperature variations cause resistance changes in 
thermistor R330 and R567, which is on the base of Q320, thus varying the voltage applied to 
varactor Q322. This changes the impedance across crystal X301 in a manner complementary to the 
temperature drift characteristic of the crystal. In this way, the reference oscillator is held within the 
specified ±2.5 PPM from -30 to +60°C.
8.3.5.2  Voltage-Controlled Oscillators
Only one of the VCOs runs at a time, which is controlled by Q317 and Q101. The receive VCO 
consists of C344-C351, L302-L305, Q302 and Q311. This VCO oscillates at 45.1 MHz above the 
programmed receive frequency. The VCO’s oscillating frequency is tuned by the varactor Q311. The 
tuning voltage is supplied from the output of the Loop Filter. The output of the VCO is AC coupled 
(C311) to the synthesizer and the output buffer Q308 respectively. The output of the VCO buffer 
Q308 is AC coupled (C312, C313, C463, and R439-R441) to the synthesizer and the output buffer 
Q416 respectively.
When the PTT is pressed, Q101 pin36 goes low (approx. 0V) disabling the receive VCO by the Q317 
and biases on Q916 to enable the transmitter VCO. The transmitter VCO consists of C352, C935-
C938, L307-L309, Q303, Q921, and Q922. This VCO oscillates on the programmed transmit 
frequency. The VCO’s oscillating frequency is tuned by the varactor Q922. The tuning voltage is 
directed from the output of the Loop Filter. The transmit voltage controlled oscillator is directly 
frequency-modulated and operates on the carrier frequency. In the receive mode, the transmit VCO 
is disabled and the receive VCO is enabled, producing the receive local oscillator signal at a 
frequency 45.1 MHz above the incoming receive frequency. The synthesizer is tuned in 5.00 kHz or 
6.25 kHz steps. 
						

							March, 20066881096C38
8-6UHF (435-480 MHz) Band Information: Theory of Operation
8.3.5.3  Synthesizer
The frequency synthesizer is a large-scale monolithic synthesizer integrated circuit Q323. The 
synthesizer IC contains a dual modulus prescaler, programmable divide-by-N counter, prescale 
control (swallow) counter, reference oscillator, reference divider, phase detector, charge pump and 
lock detector. Also, included in Q323 are shift registers and control circuits for frequency controls and 
general device control.
RF output from the active VCO is AC coupled to the synthesizer Q323 prescaler input at Pin 8. The 
divide counter chain in Q323, consisting of the dual-modulus prescaler, swallow counter and 
programmable counter, divides the VCO signal down to a frequency very close to 5.00 kHz or 
6.25 kHz which is applied to the phase detector. The phase comparator compares the phase with the 
5.00 kHz or 6.25 kHz reference signal from the reference divider and drives the external charge 
pump (Q314, Q315 and Q301). The synthesizer unlock detector circuit prevents the operation of the 
transmitter and receiver, when the phase lock loop (PLL) is unlocked. The following discussion 
assumes the unit has been placed in the transmit mode. Q323 lock detector Pin 7 goes high when 
the PLL is locked. This high level is applied to Pin 25 of the CPU Q101. A software timing routing 
brings the RX/TX line low (Pin 36 of Q101). With the RX/TX line goes low, Q209 is cut off and Q208 
is biased on passing +5VTX-B to Q202; it biases on Q201 to pass switched TX-B to the transmitter 
amplifier string which enables transmission.
When the PLL is unlocked, the lock detector at Q323 Pin 7 begins pulsing low. An RC circuit 
converts this low pulse to a low level for the CPU. The CPU then changes the RX/TX line to a high, 
thus signaling the other transistor switches to drive Q201 into cutoff, which disables transmission. 
Therefore, the transmitter remains disabled while the loop remains out of lock, and “PLL ERR” is 
displayed.
8.3.5.4  Loop Filter
The Loop Filter, a passive lead-lag filter consisting of R314-R317, R356, C323, C369, and C371 
integrates the charge pump output to produce the DC tuning voltage for the VCO. One parasitic pole, 
consisting of RF chokes L306 and L310, prevent modulation of the VCOs by the 5.00 kHz or 
6.25 kHz reference energy remaining at the output of the loop filter. Direct FM is obtained for 
modulating frequencies outside the PLL bandwidth by applying the CTCSS/DCS signals and the pre-
emphasized, limited microphone audio to the VCO modulation circuit. The modulation circuit 
consists of R329 and Q921.
8.3.6 Transmitter Section
8.3.6.1  RF Power Amplifier
After the PTT is pressed, the +5VTX-B line switches to approximately 5V. Q916 is turned on, 
enabling transmit VCO. The VCO buffer, pre-driver, driver and power amplifier are biased on by 
Q201. Q201 is biased on by the +5VTX-B line switching to 5V. RF output from the transmit VCO 
(Q303) is applied to the VCO output buffer Q308. Output from Q308 feeds the buffer Q414. The 
output signal from Q414 feeds the pre-driver amplifier Q413, and feeds the driver amplifier Q412, 
whose output from the driver stage feeds the final RF power amplifier Q411 to produce the rated 
output power of 5 watts. The final output is feed to a low-pass filter (C435-437, C491-C493, L418, 
and L419) and then to the transmit/receive switch Q410. RF power is then fed to the antenna via the 
output low-pass filter consisting of C440-C445, L415, and L416.
8.3.6.2  Antenna Switching
Switching of the antenna between the transmitter and the receiver is accomplished by the antenna 
transmit/receive switch consisting of diodes Q409 and Q410. In the transmit mode, switched TX B+ 
is applied through R419 and RF choke L417, hard forward biasing the two diodes on Q410, thus 
permitting the flow of RF power from the output of the low-pass filter. L414 and C455 isolate the 
receiver circuit from the transmitter power input. 
						

							6881096C38March, 2006
UHF (435-480 MHz) Band Information: Theory of Operation 8-7
8.3.7 Power Control
Output power is controlled by the CPU (Q101), the D/A converter (Q121), the dual Op-Amp (Q419), 
which is used as a differential amplifier and comparator. Current is sensed by the voltage drop 
across R445. When the radio is in high power mode, this voltage is compared to the D/A converter 
voltage at 5-watt. When the radio is in low power mode, this voltage is compared to the D/A 
converter voltage at 1-watt. The power output is then reduced or increased by varying the applied 
voltage to the gate of the power amplifier Q411 and Q412.
8.3.7.1  Transmitter Audio Circuits
The transmitter audio circuits consist of the audio processing circuits, the CTCSS circuits and the 
DCS circuits.
8.3.7.1.1  Audio Processing
Transmit speech audio is provided by either the internal electric microphone M101 or the external 
microphone. The audio is pre-emphasized by 6 dB per octave by C615 and R655, and then its signal 
is amplified. The microphone audio is directed to amplifier Q602B, Q602A and low-pass filter Q602C 
and Q602D. Q602A has limiting function. The modulation adjustment is done by potentiomter 
RV601, and directed to a four-pole active low-pass filter. The resulting signal is then limited, and is 
directed to a low pass filter (-18 dB per octave roll-off above 3 kHz). The audio is then directed 
through the 25 kHz/12.5 kHz channel spacing SW Q601 to varactor diode Q329 in transmit VCO. By 
varying the voltage on the varactor diode Q329 at an audio rate, VCO output is frequency-
modulated.
8.3.7.1.2  CTCSS Tone Encoder / Digital Code Squelch (DCS) Encoder
CTCSS signals and DCS signals are synthesized by CPU Q101 and appear as pulse waveform on
I/O line Pin 7. This I/O line is connected to a digital-to-analog converter network (consisting of C136, 
C173, R150, R177, and R182), which produces a pseudo-sine wave at its output. The waveform is 
smoothed by low pass filters Q610B to produce an acceptable sine wave output. The CTCSS tone 
signal is adjusted to the proper level by RV602.
8.3.8 Receiver Section
8.3.8.1  Receiver Front End
In the receive mode, the RF signal enters through the antenna, then through the low-pass filter 
C439-C445, and L414-L416. The diodes Q409 and Q410 are biased off, so that the output of the 
low-pass filter is coupled (C432, C433, and L418) to the first band-pass filter C401-C407, C408, 
C409, L401, L402, Q401, and Q402 and to the Front End RF overload protection diode pair Q403. 
The signal from the band-pass filter is directed to the input of the RF amplifier Q404. The output of 
the RF amplifier is directed to three stages of band-pass filters, consisting of C413-C417, C487, 
L404-L406, Q405, Q406, R408, and R410. The output from the band-pass filter is directed to the 
mixer’s Q407 and L408.
8.3.8.2  Local Oscillator (LO)
The Receive VCO (C314, C315, C913, C918, L302- L305, Q302, and Q311) provides the LO signal. 
The VCO is running at 45.1 MHz above the desired receive frequency and is applied to output Buffer 
Q308 and Q416. The output of the buffer is sent through the low-pass filter C423 and L410 and to 
the mixer Q407 and L409. 
						

							March, 20066881096C38
8-8UHF (435-480 MHz) Band Information: Theory of Operation
8.3.8.3  Mixer
The mixer is a DBM type (L407, L408, Q407). The mixer LO frequency is 45.1 MHz above the 
desired receiver frequency. When the receiver frequency is present, the mixer output will be a 
45.1 MHz signal. The mixer output is peaked for 45.1 MHz at L410, C432 and R413, and the signal 
is filtered by crystal filter F402 and amplified by Q408 before being sent to the input of the IF IC 
Q506. The 45.1 MHz IF signal and LO frequency of 44.645 MHz (X501) are mixed in Q506. The 
455 kHz ceramic filter F501 or F502 filters the second mixer’s output. The resulting signal is the 
second IF signal. The mixer’s output is then fed to the internal limiting amplifier, and consequently to 
the FM decoder.
8.3.8.4  FM Detector and Squelch
The FM detector output is used for squelch, decoding tones and audio output. The squelch amplifier 
is inside of Q506, and its output is fed to an internal rectifier and squelch detector. The output on 
Q506 Pin 14 signals the CPU Q101 with a low (~0 V) to unmute the radio. The audio is unmuted by 
the CPU Q101 Pin 41 switching to a high (~5 V), thus biasing on Q503. The audio is then routed to 
the audio amplifier Q702 via the volume control SW201.
8.3.8.5  Receiver Audio Circuit
The detector’s audio output also is fed to the tone (CTCSS and DCS) low-pass filter Q505A. Then 
the output of the low-pass filter is routed to the second stage filter Q505B. The output of Q505B is 
passed to Q505C. The output of Q505C is directed to the squaring circuit Q505D, and finally to the 
CPU Q101 Pin 22 for decoding.
The detector output feeds the audio high-pass filter Q502. The output of the audio high-pass filter 
feeds the Volume Control SW201 (VOL). From the wiper arm on the Volume Control, the audio is 
routed to Pin 4, which is the input to the audio power amplifier Q702. The output of the audio power 
amplifier is routed through the earphone jack J701 to the internal speaker SP701.
8.3.9 Battery Section
The battery connects to the contact (CN201). The positive terminal of the battery connects to the 
ON/OFF Volume control switch (SW201), and the negative terminal connects to PWB ground. Low 
battery is detected by R127 and R128 and voltage regulator Q204.
Battery voltage status is monitored by Pin 19 of the CPU Q101 through R127 and R128. When the 
battery voltage goes below the threshold voltage, “LOW BATT” is displayed on LCD LC101. When 
the radio is on a channel with no tone programmed, the BATTERY SAVER Mode is enabled when 
programmed. In the BATTERY SAVER Mode, the CPU Q101 generates a square wave signal on 
Pin 37. The signal’s duty cycle varies according to what the BATTERY SAVE TIMER is set. When 
the signal goes high (approximately 5 V), Q210 is biased off, and Q211 is cut off, thus turning the 
supply off to IF IC Q506. 
						

							6881096C38March, 2006
UHF (435-480 MHz) Band Information: Block Diagrams 8-9
8.4 Block Diagrams
8.4.1 Complete
Figure 8-2.  
SAVE 5VRX 5V
DAC
RX
Key
Pad
Power
Input
TX 5V
BATTERY
5VDAC RXDAC TX
35
DTMF IN
RC
NETWORK
9
RC
NETWORK
3
MIC
M101CN701 CN101
27
31
4
15
16
22
25 2522 15
163 4 319 35 27
DAC
TX+ SW B
5VSPK SP701
(1/2)
DTMF
IN Detect
Detect 13 13
ANT
ANT
Switch
Q409,410
RF
AMP
Q404
Mixer
Q407Local
Buffer
Q416
2-Pole
Crystal
Filter
F402
Buffer
AMP
Q414
Pre Driver
Q413
Power
Control
Q419
Power
SW
SW201
5V
REG
Q204SAVE
SW
Q210
TX
REG/SW
Q201
Q202
Over
Voltage
Protect
Q707-710
TX/RX
SW
Q208
Q209
VCO
Buffer
Q308
Loop
Filter
Q314-316
Pin15
   16CN701
Pin37
   38
   39 Pin11
   10
    9 Pin1
   2
TCXO
14.4 MHz
X301
Q334Sub Audio
Modulator
Q322
6 Pole
Ceramic
Filter
F501
IF
AMP
Q408
De-emphasis
Q502ASub Audio
LPF
Q505
HPF
Q502Audio
Power
AMP
Q702EXT Audio
Jack
J701
6 Pole
Ceramic
Filter
F502
PLL
Q323
EEPROM
Q114
CPU
Q101
PTT
S102
Mon
S101
LCD
LC101
Shift
Q102
X,tal
8.38 MHz
X101Restart
Q133-Q138
Reset
Q105DA
Converter
Q121
CPU
Pin87
DIODE
Q126
CPU
Pin21CPU Pin22
CPU Pin36
LPF
(DTMF)
Q610A
Limitter
AMP
Q602A
MIC
AMP
Q602BATT
Q608
Q609
N/W
SW
Q601LPF
Q602C,DDeviation
Adj
RV601
EXT MIC
Jack
J701(1/2)
DC
AMP
Q125
IF IC  Q506
(2nd Mix,2nd Local,IF AMP,DISC,Noise AMP)
2nd Local
44.654MHz
X501
RX
SW
Q211
DC/DC
Converter
Q333
Volume
SW201
(VR)
Final
AMP
Q411
PA
Q412
2-Pole
Band Pass
Filter
Q401,402
2-Pole
Band Pass
Filter
Q405
Hamonics Filter
C440-445L415, L416
Matching
Network
C491-493,
C435-437
L410,419
Coupler
R445
RX
VCO
Q311
Q302TX
VCO
Q303
Q922
TX/RX
SW
Q317
Q916
Ripple 
Filter
Q318
Audio
Modulator
Q921
LPF
(Sub Audio)
Q610A
VOX
AMP
Q610D 
						

							March, 20066881096C38
8-10UHF (435-480 MHz) Band Information: Block Diagrams
8.4.2 Controller
Figure 8-3.  
8.4.3 VCO
Figure 8-4.  
Key
Pad
35
RC
NETWORK
9
RC
NETWORK3
MIC
M10127
31
4
15
16
22
25 13
EEPROM
Q114
CPU
Q101
PTT
S102Mon
S101LCD
LC101Shift
Q102Xtal
8.38MHz
X101
Restart
Q133-Q138 
Reset
Q105
DA
Converter
Q121
CPU
Pin87
DIODE
Q126
CPU
Pin21CPU Pin22
CPU Pin36
DC
AMP
Q125
CN101
RX Local
Buffer
TX
BufferDATA
Audio
Sub Audio TX/RXSW CONTLRipple 
Filter
Q318
5V VCO
Buffer
Q308RX
VCO
Q311
Q302
TX/RX
SW
Q317
Q916
Audio
Modulator
Q921Sub Audio
ModulatorQ322 TCXO
14.4MHz
X301
Q334 Loop
Filter
Q314
Q315
Q316PLLQ323CN701
Pin37
   38
   39 Pin11
   10
    9 Pin15
   16
Pin 1
    2
TX
VCO
Q303
Q922 Power
Regulator
DC/DC
Converter
Q333 
						

							6881096C38March, 2006
UHF (435-480 MHz) Band Information: Block Diagrams 8-11
8.4.4 Transmitter
Figure 8-5.  
8.4.5 Receiver
Figure 8-6.  
ANTTo Receiver
TX +B
+B
TX 5V DAC
RX
Power
Control
Q419ANT
Switch
Q409,410
Buffer
AMP
Q414 Pre Driver
Q413P in
VCO Final
AMP
Q411PA
Q412 Hamonics
Filter
C440-445,
L415, 416
Matching Network
C491-493,C435-437
L418,419
Coupler
R445
DAC
TX
DAC
RX
From
VCOFrom ANT
Switch
2-Pole
Crystal
Filter
F402
2nd Local
44.654MHz
X5016 Pole
Ceramic
Filter
F5016 Pole
Ceramic
Filter
F502
Mixer
Q407RF
AMP
Q404
Local
Buffer
Q416
IF
AMP
Q408IF IC  Q506
(2nd Mix,2nd Local,IF AMP,DISC,Noise AMP)2-Pole
Band Pass
Filter
Q401,4022-Pole
Band Pass
Filter
Q405,406 
						

							March, 20066881096C38
8-12UHF (435-480 MHz) Band Information: Troubleshooting Charts
8.5 Troubleshooting Charts
Figure 8-7.  
Troubleshooting Flow Chart for Receiver
Start
Very low or no 12
 dB SINAD
Noise at spkr
when radio is
unsqu’d?
Is 1st LO at
C431 >2
dBm?
Inject on channel
signal at RF port,
C429
12 dB SINAD
-105 dBm?
Inject a 45.1
MHz signal at 
R467
12 dB SINAD
1Check IFIC
Q506 (see
below)
Noise at pin 9
of IFIC Q506?
Check
VCO/Synth
Inject on
channel signal
at C402
Check 
harmonic
filter and
antenna path
Check external
components
connected to IFIC. If
OK, replace Q506
Check mixer,
Q407Is 12 dB SINAD
dBm? Check IFIC
Is Q404 biased
properly?
RF Front & Rear
Check +5VRX and
Q404 bias circuitry 1
Is 2nd LO on
freq?
Check VDC of
all IFIC pins
Are VDC of pin
1(4.79V),2(4.17V) and
4(4.88V) of IFIC
OK?
Are voltages on
pins OK?Check 2nd LO
XTAL and
components
Check IFIC
(see below)
Check external
components
connected to IFIC
NO
NO YES
YES
NOYES
YES
NO
YESYESNO
YES NO
YESYESNO
YES
YES
NO
NONO
NO
2 pole filters 
Check XTAL filter
F402, L411
 -110 dBm? -116
Is 12 dB SINAD
 -115 dBm?Is
Inject 45.1
MHz signal at
R413, L411Is 
						

							6881096C38March, 2006
UHF (435-480 MHz) Band Information: Troubleshooting Charts 8-13
Figure 8-8.  
Troubleshooting Flow Chart for Transmitter
Start
No
Power
+5VTX and TXB+
OK?
Is
current
OK?
Is
DAC TX High
or Low?
Is 
Pin
OK?
Check
Q201, Q202,Q206
&
Q209
Check
Voltages in
Power Control
Circuit
Check
Vo l t a g e s  i n
PA Line-upTroubleshoot
VCO
DoneIs
Power
OK?
1. Check Pin Diodes
2. Check Harmonic Filter
Inspect/Repair
TX Output
Network
NO
NO
LOW
HIGH
YES NO NO
YESYESYESIs
Check Pin to
Q419 Pin 1 
						

							March, 20066881096C38
8-14UHF (435-480 MHz) Band Information: Troubleshooting Charts
Figure 8-9.  
Is information
from µP Q101
correct?
Is Q330 corrector 
AT4.65 VDC?
 Is Q314 Emitter 
AT=13VDC
Is Q310 Pin 2
4.3 VDC in TX?
Troubleshooting Flow Chart for Synthesizer
Start
Vi s u a l  
check of the 
Board OK?Correct
Problem
Check 5V
Regulator
+5VQ323 at 
Pins
3, 4Is 14.4MHz
Signal at
Q323 Pin 1?Check
X301,C337,C338,C336
Are signals
at Pin’s 8 of 
Q323 ?
Check Q301,
L303,C303,R301,
C304 & R302Fix
Connection
Is Connection
between Q310
Pin 2 & CN701
Pin 35 OK?
Replace CN701
Replace
Q201
Replace or
resolder
necessary
components
Is RF level at
Q324
between -10 &
+5 dBm?
Are Q308, L301
C308, C310, C309
Replace Q308
See VCO
Troubleshooting Chart
Are Waveforms
at Pins 8 of Q323
Do
Pins 9,10 & 11
of Q323toggle
when channel is
changed?
Check programming
lines between Q323
Pins 9,10 & 11
Replace Q323
Check µP Q101
Troubleshooting
Chart
NO
YES
NO
NO
NO
NO
YESYES
NO
YES
YES NOYESNO
YES YES YESNO
NO
NO
YES
NO
YES YES
NO
Check
R358, C312
C313 YES