Motorola Gtx2000 Lcs2000 68p02945c70 O Manual
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7-16 Theory of Operationrouted to two attenuators, which are tuned in the factory or the Þeld to set the proper amount of FM deviation. The TX audio emerges from the ASFIC at U0201-H8 MOD IN, and is routed to the RF section. Transmit Signalling CircuitsSee Figure 7-4 for reference for the following sections. From a hardware point of view, there are three types of signalling: ¥Sub-audible data (PL / DPL / Connect Tone) that gets summed with transmit voice or signalling, ¥DTMF data for telephone communication in trunked and conventional systems, and ¥Audible signalling including Select 5, MPT-1327, MDC, High speed Trunking. Note:The hardware supports all three types while the radio soft- ware determines which signalling type is available. Figure 7-4 Transmit Signalling Paths Sub-audible Data (PL/DPL)Sub-audible data implies signalling whose bandwidth is below 300Hz. PL and DPL waveforms are used for conventional operation and connect tones for trunked voice channel operation. The trunking connect tone is simply a PL tone at a higher deviation level than PL in a conventional system. Although it is referred to as Òsub-audible data,Ó the actual frequency spectrum of these waveforms may be as high as 250 Hz, which is audible to the human ear. However, the radio receiver Þlters out any audio below 300Hz, so these tones are never heard in the actual system. Only one type of sub-audible data can be generated by U0201 (ASFIC) at any one time. The process is as follows, using the SPI BUS, themP programs the ASFIC to set up the proper low-speed data deviation and select the PL or DPL Þlters. The mP then generates a square wave which strobes the ASFIC PL / DPL encode input PL CLK U0201-C3 at twelve times the desired data rate. For example, for a PL frequency of 103 Hz, the frequency of the square wave would be 1236 Hz. G1 C3 G2 H8 MOD IN TO RF SECTION 6 75HIGH SPEED CLOCK IN LOW SPEED CLOCK DTMF CLOCK ASFIC U0201 MICRO U0101HS 5-3-2 STATE DTMFSPLATTER PLLS ATTENUATOR CONTROLLERFILTER SUMMER SUMMER ENCODER ENCODER ENCODER (SYNTHESIZER)
Theory of Operation 7-17 This drives a tone generator inside U0201 which generates a staircase approximation to a PL sine wave or DPL data pattern. This internal waveform is then low-pass Þltered and summed with voice or data. The resulting summed waveform then appears on U0201-H8 (MOD IN), where it is sent to the RF board as previously described for transmit audio. A trunking connect tone would be generated in the same manner as a PL tone. High Speed DataHigh speed data refers to the 3600 baud data waveforms, known as Inbound Signalling Words (ISWs) used in a trunking system for high speed communication between the central controller and the radio. To generate an ISW, themP Þrst programs the ASFIC (U0201) to the proper Þlter and gain settings. It then begins strobing U0201-G1 (TRK CLK IN) with a pulse when the data is supposed to change states. U0201Õs 5-3-2 State Encoder (which is in a 2-state mode) is then fed to the post-limiter summer block and then the splatter Þlter. From that point it is routed through the modulation attenuators and then out of the ASFIC to the RF board. MPT 1327 and MDC are generated in much the same way as Trunking ISW. However, in some cases these signals may also pass through a data pre-emphasis block in the ASFIC. Also these signalling schemes are based on sending a combination of 1200 Hz and 1800 Hz tones only. Microphone audio is muted during High Speed Data signalling. Dual Tone Multiple Frequency (DTMF) DataDTMF data is a dual tone waveform used during phone interconnect operation. It is the same type of tones which are heard when using a ÒTouch ToneÓ telephone. There are seven frequencies, with four in the low group (697, 770, 852, 941Hz) and three in the high group (1209, 1336, 1477Hz). The high-group tone is generated by themP (U0101-5) strobing U0201-G1 at six times the tone frequency for tones less than 1440Hz or twice the frequency for tones greater than 1440Hz. The low group tone is generated by themP (U0101-7) strobing U0201-G2 (DTMF CLCK) at six times the tone frequency. Inside U0201 the low-group and high-group tones are summed (with the amplitude of the high group tone being approximately 2 dB greater than that of the low group tone) and then pre-emphasized before being routed to the summer and splatter Þlter. The DTMF waveform then follows the same path as was described for high-speed data.
7-18 Theory of Operation Receive Audio CircuitsRefer to the following sections. Figure 7-5 Receive Audio Paths Squelch DetectThe radioÕs RF circuits are constantly producing an output at the discriminator (U5201-28). This signal (DET AUDIO) is routed to the ASFICÕs squelch detect circuitry input SQ IN (U0201-H7). All of the squelch detect circuitry is contained within the ASFIC. Therefore from a userÕs point of view, DET AUDIO enters the ASFIC, and the ASFIC produces two CMOS logic outputs based on the result. They are CH ACT (U0201-H2) and SQ DET (U0201-H1). The squelch signal entering the ASFIC is ampliÞed, Þltered, attenuated, and rectiÞed. It is then sent to a comparator to produce an active high signal on CH ACT. A squelch tail circuit is used to produce SQ DET (U0201-H1) from CH J040011 16 1FLAT RX AUDIO EXTERNAL INTERNAL ACCESSORY CONNECTOR CONTROL HEAD CONNECTOR HANDSET 141 2 J0101 INT SPKR+ SPKR- 1 9 ATTEN. H6 J7 J6 DET AUDIO H7J4 B2 INT 4 6 RX IN PL INAUX RX IN SQ IN ASFIC U0201 AUDIO VOLUME FILTER & H1 MICRO 10 FROM LIMITER, RECTIFIER SQ DET UNAT RX OUT SQUELCH H2 PL FILTER CH ACT EXP AUDIO INJ5 A4 PL H5 UNIV IORX AUD OUT 25 68 SPEAKER SPEAKER AUDIO DEEMPHASISATTEN. RF SECTION (IFIC) (DISCRIMINATOR AUDIO)FILTER, COMPARATORCIRCUIT CONTROLLER U0101 LIMITER SPKR+SPKR- PA U0401 LIM
Theory of Operation 7-19 ACT. The state of CH ACT and SQ DET is high (logic 1) when carrier is detected, otherwise low (logic 0). CH ACT is routed to themP pin 25 while SQ DET adds up with LOCK DET, weighted by resistors R0113, R0114, and is routed to one of themP«s ADC input U0101-43. From the voltage weighted by the resistors themP determines whether SQ DET, LOCK DET or both are active. SQ DET is used to determine all audio mute / unmute decisions except for Conventional Scan. In this case CH ACT is a pre-indicator as it occurs slightly faster than SQ DET. Audio Processing and Digital Volume ControlThe receiver audio signal enters the controller section from the IF IC (U5201-28) on DET AUDIO and passes through RC Þlter R0203 and C0208 which Þlters out IF noise. The signal is AC coupled by C0207 and enters the ASFIC via the PL IN pin U0201-J7. Inside the ASFIC, the signal goes through two paths in parallel, the audio path and the PL/DPL path. The audio path has a programmable ampliÞer, whose setting is based on the channel bandwidth being received, then a LPF Þlter to remove any frequency components above 3000Hz and then an HPF to strip off any sub-audible data below 300Hz. Next, the recovered audio passes through a de-emphasis Þlter if it is enabled (to compensate for Pre-emphasis which is used to reduce the effects of FM noise). The IC then passes the audio through the 8-bit programmable attenuator whose level is set depending on the value of the volume control. Finally the Þltered audio signal passes through an output buffer within the ASFIC. The audio signal exits the ASFIC at RX AUDIO (U0201-J4). ThemP programs the attenuator, using the SPI BUS, based on the volume setting. The minimum /maximum settings of the attenuator are set by codeplug parameters. Since sub-audible signalling is summed with voice information on transmit, it must be separated from the voice information before processing. Any sub-audible signalling enters the ASFIC from the IF IC at PL IN U0201-J7. Once inside it goes through the PL/DPL path. The signal Þrst passes through one of 2 low pass Þlters, either PL low pass Þlter or DPL/LST low pass Þlter. Either signal is then Þltered and goes through a limiter and exits the ASFIC at PL LIM (U0201-A4). At this point the signal will appear as a square wave version of the sub-audible signal which the radio received. The microprocessor (U0101-10) will decode the signal directly to determine if it is the tone / code which is currently active on that mode. Audio AmpliÞcation Speaker (+) Speaker (-)The ASFICÕs received audio signal output, U0201-J4, is routed through a voltage divider formed by R0401 and R0402 to set the correct input level to the audio PA (U0401). This is necessary because the gain of the audio PA is 46 dB, and the ASFIC output is capable of overdriving the PA unless the maximum volume is limited. The audio then passes through C0401 which provides AC coupling and low frequency roll-off. C0402 provides high frequency roll-off as the audio signal is routed to pins 1 and 9 of the audio power ampliÞer U0401.
7-20 Theory of OperationThe outputs of the Audio PA (EXT-SPKR+, INT/EXT SPKR-) are routed to the external speaker through the accessory connector. The INT/EXT SPKR- is directly connected to the INT-SPKR(-). The EXT-SPKR+ can be connected to the internal speaker(+) in two ways: 1) internal connection via R456 (0 Ohm); 2) Externally, via a jumper between pin 16 and pin 13 of the accessory connector. The audio power ampliÞer has one inverted and one non-inverted output that produces the differential audio output SPK+ / SPK- (U0401-4/6). The inputs for each of these ampliÞers are pins 1 and 9 respectively; these inputs are both tied to the received audio. The audio PAÕs DC biases are not activated until the audio PA is enabled at pin 8. The audio PA is enabled via AUDIO PA ENABLE signal from the ASFIC (U0201-B5). When the base of Q0401 is low, the transistor is off and U0401-8 is high, using pull up resistor R0406, and the Audio PA is ON. The U0401-8 must be above 8.5VDC to properly enable the device. If the voltage is between 3.3 and 6.4V, the device will be active but has its input (U0401-1/9) off. This is a mute condition which is not employed in this radio design. R0404 ensures that the base of Q0401 is high on power up. Otherwise there may be an audio pop due to R0406 pulling U0401-8 high before the software can switch on Q0401. The SPK+ and SPK- outputs of the audio PA have a DC bias which varies proportionately with FLT A+ (U0401-7). FLT A+ of 11V yields DC offset of 5V, and FLT A+ of 17V yields a DC offset of 8.5V. If either of these lines is shorted to ground, it is possible that the audio PA will be damaged. SPK+ and SPK- are routed to the accessory connector (J400-16 and 1) and to the control head (connector J0101-1 and 2). Handset AudioCertain hand-held accessories have a speaker within them which require a different voltage level than that provided by U0401. For those devices HANDSET AUDIO is available at J0101-14. The received audio from the output of the ASFICÕs digital volume attenuator is also routed to U0202-4 pin 9 where it is ampliÞed 15 dB; this is set by the 10k/68k combination of R0233 and R0232. This signal is routed from the output of the op amp U202-4 pin 8 to J0101-14. The control head sends this signal directly out to the microphone jack. The maximum value of this output is 6.6Vp-p. Filtered AudioThe ASFIC has an audio whose output at U0201-B2 has been Þltered and de- emphasized, but has not gone through the digital volume attenuator. From ASFIC U0201-B2 the signal is AC coupled to U0202-2 by capacitor C0230. R0224 and R0225 being equal value set up the op-amp as a unity gain device, i.e. a buffer. Note:Any volume adjustment of the signal on this path must be done by the accessory. Discriminator Audio (UnÞltered)Note:Discriminator audio DET AUDIO from the IF IC U5201, in addition to being routed to the ASFIC, is also routed to the option connector J0103-5. (See Secure Rx description blocks for further information.)
Theory of Operation 7-21 Receive Signalling CircuitsRefer to the following sections. Figure 7-6 Receive Signalling Path. Sub-audible Data (PL/DPL) and High Speed Data DecoderThe ASFIC (U0201) is used to Þlter and limit all received data. The data enters the ASFIC at U0201-J7. Inside U0201 the data is Þltered according to data type (HS or LS), then it is limited to a 0-5V digital level. The MDC and trunking high speed data appear at U0201-G4, where it connects to themP U0101-11. The low speed limited data output (PL, DPL, and trunking LS) appears at U0201- A4, where it connects to themP U0101-10. While receiving low speed data, the mP may output a sampling waveform depending on the sampling technique to U0201-C3 between 1 and 2 kHz. The low speed data is read by themP at twice the frequency of the sampling waveform; a latch conÞguration in the ASFIC stores one bit every clock cycle. The external capacitors C0226, C0225, and C0223 set the low frequency pole for a zero crossings detector in the limiters for PL and HS data. The hysteresis of these limiters is programmed based on the type of received data. Note:During HS data, themP may generate a sampling waveform seen at U0201-G1. Alert Tone CircuitsWhen the software determines that it needs to give the operator an audible feedback (for a good key press, or for a bad key press), or radio status (trunked system busy, phone call, circuit failures), it sends an alert tone to the speaker. It does so by sending SPI BUS data to U0201 which sets up the audio path to the speaker for alert tones. The alert tone itself can be generated in one of two ways: internally by the ASFIC, or externally using themP and the ASFIC. DET AUDIOG4 A4 C5J3 G1C3 J7 11 1065 LOW SPEED PL IN RX LIMPL RX LOW SPEED HIGH SPEED DATA FILTER LIMITER FILTERLIMITER ASFIC U0201 MICRO U0101 DISCRIMINATOR AUDIO FROM RF SECTION (IFIC)CLOCKCLOCK & DEEMPHASIS CONTROLLER LIM CAP LIM CAPLIM OUT
7-22 Theory of OperationThe allowable internal alert tones are 304, 608, 911, and 1823Hz. In this case a code contained within the SPI BUS load to the ASFIC sets up the path and determines the tone frequency, and at what volume level to generate the tone. (It does not have to be related to the voice volume setting). For external alert tones, themP can generate any tone within the 100-3000Hz audio band. This is accomplished by themP generating a square wave which enters the ASFIC at U0201-C3. Inside the ASFIC, this signal is routed to the alert tone generator; the output of the generator is summed into the audio chain just after the RX audio de-emphasis block. Inside U0201 the tone is ampliÞed and Þltered, then passed through the 8- bit digital volume attenuator, which is typically loaded with a special value for alert tone audio. The tone exits at U0201-J4 and is routed to the audio PA like receive audio.
Troubleshooting 8-1 8 Troubleshooting Overview This section contains three troubleshooting tables for the following GTX/ LCS 2000 components: • Receiver • Synthesizer • Power Amplifier • Controller • Control Head Troubleshooting Charts Refer to following pages.
8-2 Troubleshooting Start Is K9.1 at Is AUDIO_DET Check Check RX_INJ -50dBmCheck Check Check Check LO_INJ0dBmCheck Check IF-35dBm Is
Troubleshooting 8-3 Troubleshooting Flow Chart for Receiver (cont.) Check RF level Check RF &>-18DBM >-18DBMStart Check DC at 9.3VCheck DC Check ADAPTCheck Check DC at 5VCheck >1V