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Kenwood Ts-2000x All Mode Multi-band Transceiver Service Manual
Kenwood Ts-2000x All Mode Multi-band Transceiver Service Manual
Here you can view all the pages of manual Kenwood Ts-2000x All Mode Multi-band Transceiver Service Manual. The Kenwood manuals for Communications receiver are available online for free. You can easily download all the documents as PDF.
Page 41
41 TS-2000/X Serial-Parallel : BU2099FV (Final unit IC205, Control unit IC530, Display unit IC4, TX-RX 1 unit IC5,16,17, TX-RX 2 unit IC2) Block diagram LPF 1 2 3 4 5 6 7 8 9 10 1112 13 14 15 16 17 18 19 20VDD Control circuitOE SO Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 LCK CLOCKD ATANC VSS Output buffer (Open drain) 12 bit storage register 12 bit shift register D flip-flop : TC7WH74FU (Filter unit IC2) Logic diagram Q S C D RQ (5) (3) PR CK D CLR(7) (1) (2) (6) Truth table Input Output Function CLR PR...
Page 42
42 TS-2000/X Flash ROM for DSP : 29LV800B (Control unit IC504,508) Block diagram RY/BY buffer Control circuit (Commandregister) Y decoder X decoderY gate 8,388,608 cell matrix STB Low Vcc detectionSTB Data latch DQ0~DQ15RY/BY Erase circuit Write circuit Vcc Vss WE BYTE RESET CE OE A0~A18 A-1 Write/Erase pulse timer Address latch Chip enable output enable circuitInput/output buffer No. Name Description 24 OE Output enable. 25 Vss Ground. 26 CE Chip enable. 27 A0 Address input. 28 DQ0 Data...
Page 43
43 TS-2000/X DSP : 320VC5402PGE (Control unit IC515,516) Pin description Pin name Type* Description Data signal A19~A0 O/Z Parallel address bus A19 (MSB) to A0 (LSB). The low-order 16 bits (A0 to A15) of the address pin are multiplexed to address to external memory (data, program) or I/O. The high-order 4 bits (A16 to A19) are used to address to external program space. These pins are high impedance when in hold mode or when OFF is low. D15~D0 I/O/Z Parallel data bus D15 (MSB) to D0 (LSB). D15 to D0...
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44 TS-2000/X Pin name Type* Description IOSTRB O/Z I/O strobe signal. It is always at high level (read mode) except when accessing an I/O device through an external bus. In hold mode, it becomes high impedance when the OFF signal is at low level. HOLD I Hold input signal. Address, data, or control signal control input signal. When this signal is accepted, the address, data, or control signal becomes high impedance. HOLDA O/Z Hold response signal. It notifies the external circuits that the processor...
Page 45
45 TS-2000/X Pin name Type* Description Host port interface (HPI) signal HD0~ I/O/Z Parallel bi-directional data bus. The HPI data bus is used by the host device bus to exchange data with the HPI register. HD7It becomes high impedance when data is not output or OFF is low. The HPI data bus has a bus holder to reduce power consumption of unused pins. When the DSP does not drive the HPI data bus, the bus holder retains the preceding logic level. The HPI data bus holder is disabled on reset, and can be...
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46 TS-2000/X CODEC (24 bit) : AK4524 (Control unit IC518) Block diagram Control Register I/F DATT SMUTE HPF DATT Audio I/F Controller ADC DAC 3 2 26 1 11 25 28 27 171615 12 13 14 20 4 6 5 23 22 24 19 Clock Gen. & Divider 18218910 AINL AINR VCOM AOUTL+ AOUTL– AOUTR+ AOUTR–VD VT DGND PD LRCK BICK SDTO SDTI M/S VREF VA AGND CS CCLK CDTI CIF CLKO XTO XTI XTALE Pin function No. Name I/O Function 1 VCOM O Common voltage output pin, VA/2. Bias voltage os ADC inputs and DAC outputs. 2 AINR I Rch analog input...
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47 TS-2000/X CODEC (16 bit) : AK4518 (Control unit IC522,523) Block diagram ∆∑ Modulator Decimation FilterClock Divider Serial I/O Interface Common Voltage 8x Interpolator ∆∑ Modulator Decimation Filter ∆∑ ModulatorLPF 8x Interpolator ∆∑ ModulatorLPF 6 5 3 4 2 1 21 19 20 2422231413 15 12 11 10 18 17 8 7 16 9 AINL VCML AINR VCMR VRAD VRDA VCOM AOUTL AOUTRMCLK CMODE LRCK SCLK SDTO SDTI PWAD PWDA DEM1 DEM0 VA AGND VB VD DGND No. Name I/O Function 17 DEM1 I De-emphasis frequency select pin. 18 DEM0 I...
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48 TS-2000/X DAC : M62363FP (TX-RX 1 unit IC14) Block diagram 8-bit latch8-bit latch D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 Address decoder 12-bit shift register 7 19 5 6 178 D-A converterD-A converter 23242120 18 DI CLK RESET VDD GND VIN1 VOUT1 VIN8 VOUT8 VDAref LD DO Pin function No. Symbol Function 8 DI Serial data input terminal. 17 DO Serial data output terminal. 7 CLK Serial clock input terminal. 6 LD LD terminal input high level then latch circuit data load. 19 RESET Reset terminal. 2 VOUT1...
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49 TS-2000/X PLL : LMX2306TMX (TX-RX 2 unit IC401,409~412,414) PLL : LMX2316TMX (TX-RX 2 unit IC402, TX-RX 3 unit IC5) Block diagram 14-bit R counter 21-bit Data Register18-bit Function LatchPhase Comp. Lock DetectFast Lock FoLD MUX 18-bit N counterPrescaler OSC Charge Pump OSCIN fIN CLOCK LE D ATACPo FLo FoLD Pin description No. Name I/O Description 1 FLo O FastLock output. For connection of parallel resistor to the loop filter. 2 CPo O Charge pump output. For connection to a loop filter for driving...
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50 TS-2000/X DDS : AD9851BRS (TX-RX 3 unit IC4) Block diagram 6 x REFCLK MultiplierHigh Speed DDS10-bit DAC 32-bit Tuning WordPhase and Control Words Frequency/Phase Data Register Data Input Register Parallel Load Ref Clock in Master Reset Frequency Update/Data Register Reset Word Load Clock Serial LoadDAC RSET Analog out Analog in Clock out Clock out Comparator+ – GND +Vs 1 bit x 40 Loads8 bits x 5 Loads Frequency, Phase and Control Data Input Pin function No. Name Function 1~4 D3~D0 8-bit data input....