Hughes Jvc 200 Projector Service Manual

							Chapter 2---System Description 
I 8 V_RED_EDGE_CONTROL Data for adjustment of red vertical edge 
linearity 
I 8 V_GRN_EDGE_CONTROL Data for adjustment of green vertical 
edge linearity  
I 8 V_BLU_EDGE_CONTROL Data for adjustment of blue vertical edge 
linearity 
I 8 L/R_KEY_CONTROL Data for adjustment of left / right 
keystone correction 
I 8 L/R_PIN_CONTROL Data for adjustment of left / right 
pincushion correction 
I 8 WIDTH_CONTROL Data for adjustment of screen width 
I 8 H_RED_CENT_CONTROL Data for adjustment of red horizontal 
centering  
I 8 H_GRN_CENT_CONTROL Data for adjustment of green horizontal 
centering  
I 8 H_BLU_CENT_CONTROL Data for adjustment of blue horizontal 
centering  
I 8 V_RED_CENT_CONTROL The data for adjustment of red vertical 
centering 
I 8 V_GRN_CENT_CONTROL The data for adjustment of green vertical 
centering 
I 8 V_BLU_CENT_CONTROL The data for adjustment of blue 
centering 
O 1 FRONT/REAR Front or rear projection status line  front 
= low and rear = high 
O 1 FLOOR/CEIL Floor or ceiling projection status line 
floor = low and ceiling = high 
O 1 /DEFL_OK Deflection status. Low = operational 
HVD board, High = Nonoperational HVD 
board. 
O 2 HVD_MODEL Revision of HVD board 
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							  Chapter 2---System Description 
Horizontal/Vertical Deflection Board I/O  
This section provides a description of the inputs to and outputs 
from the HVD Board. The I/O descriptions are arranged by the 
source/destination of the signal. The assembly communicated with 
is used as the primary heading of each group of signals. Those 
signals are subdivided into inputs and outputs. Input refers to an 
Input to the HVD Board, output refers to an output from the HVD 
Board. 
Table 2-11.  Horizontal/Vertical Deflection I/O signals 
System Controller Board
INPUTS DESCRIPTION 
IIC_CLK IIC clock line. Unidirectional clock line for control of synchronous 
data transfer over the IIC bus interface. 
IIC_DATA IIC data line. Bidirectional serial line for synchronous data transfer 
between the System Controller Board and the HVD Board. 
OUTPUTS DESCRIPTION 
/IIC_SINT IIC interrupt line. This is not used by HVD Board. 
Video Processor Board 
OUTPUTS DESCRIPTION 
/SWEEPOK Low = good scan. High = no scan. Signal is dependent on two 
inputs; DEFL_OK (from SRB) and /H_ENABLE (from RTG). 
Scan Reversal Board 
INPUTS DESCRIPTION 
FRONT/REAR Front or rear projection status line. Front = low. Rear = high. 
FLOOR/CEIL Floor or ceiling projection status line. Floor = low. Ceiling = high. 
DEFL_OK Deflection OK signal. High = good (about 2 v). Low = no scan. 
H_CUR_ 
FDBK 
Horizontal current feed back. A DC voltage proportional to the output 
current. 
H_LOCK- Horizontal interlock for yoke connectors. It should be 5 V when 
closed or 0V when open. 
V_RED- Current feedback of red vertical amplifier 
V_GRN- Current feedback of green vertical amplifier 
V_BLU- Current feedback of blue vertical amplifier 
OUTPUTS DESCRIPTION 
H_OUT_ 
FLYBACK 
Horizontal output flyback pulse, about 800 VPP 
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							Chapter 2---System Description 
H_LOCK+ Horizontal interlock for yoke connectors. This should be about 5 V 
when closed  or 15 V when open. 
H_RED+ Output of horiz. red centering (also top of the red horiz. yoke). Abou\
t 
+ 5 VDC. 
H_GRN+ Output of horz. green centering (top of green horz. yoke). About + 5 
VDC  
H_BLU+ Output of horiz. blue centering (top of blue horiz. yoke). About + 5 
VDC. 
V_RED+ Output of red vertical amplifier. About 40 VPP.  
V_GRN+ Output of green vertical amplifier. About 40 VPP. 
V_BLU+ Output of blue vertical amplifier. About 40 VPP. 
+15 V +15 V supply for use by Scan Reversal Board 
-15 V -15 V supply for use by Scan Reversal Board 
+5 V  +5 V supply for use by Scan Reversal Board 
Convergence/Deflection Board 
INPUTS DESCRIPTION 
V_RAMP Vertical ramp waveform. About 4 VPP. 
V_PARAB Vertical parabola waveform. About 4 VPP. 
OUTPUTS DESCRIPTION 
WIDTH_CTRL A DC waveform for controlling width of picture. About 4 V max. 
Raster Timing Generator (RTG board) 
INPUTS DESCRIPTION 
/H_ENABLE A low on this line enables horizontal deflection. A high disables the 
horizontal amplifier.  
H_BAND:0 
H_BAND:1 
H_BAND:2 
Horizontal frequency band line. 000 = band A, 001 = band B, 011 = 
band C and 111 = band D. 
HF_2V Horizontal frequency to voltage converter. a DC signal proportional 
to horiz. frequency. About 4.2 V at 90 kHz. 
H_DRIVE Horiz. drive pulse, 50 % duty cycle HCT level signal  
System Power Supply 
INPUTS DESCRIPTION 
+5 V + 5 V supply for use by HVD and Scan Reversal Boards 
+15 V + 15 V supply for use by HVD and Scan Reversal Boards 
-15 V  - 15 V supply for use by HVD and Scan Reversal Board 
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							  Chapter 2---System Description 
+80 V + 80 V supply for use by the switching supply of horizontal deflection 
amplifier 
 
Interlocks and protection: 
Input 
None 
Outputs 
H_LOCK + and H_LOCK-: Used to shut down the switching power 
supply of the horizontal deflection amplifier in the event of a loose 
yoke or loose scan reverse connector. This prevents the power 
supply section of the Horizontal/Vertical Deflection Board from 
operating when 1 or more yoke connectors are disconnected. 
/SWEEP_OK: Shuts down the video amplifiers in the event of 
deflection failure (if DEFL_OK or /H_ENABLE are not present). 
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							Chapter 2---System Description 
2.3.9   Convergence/Deflection PCB 
The Convergence/Deflection Board is located on the bottom side 
of the card cage under the Horizontal/Vertical Deflection Board. 
This board drives the convergence coils of the projectors.  
The following functions are provided by C/D Board: 
• Generation of various waveforms for the horizontal and vertical 
axes 
• Height control  
• Generation of waveforms for dynamic focus 
• Various geometry correction functions for the horizontal and 
vertical axes 
• Convergence output amplifiers for all colors and both 
horizontal and vertical axes 
• Convergence enable and raster fill function 
• ILA® assembly driver circuitry with temperature compensation  
• Phase locked loop for ILA® assembly drivers  
• IIC serial bus interface  
The Convergence/Deflection Input/Output diagram (Figure 2-15) 
and the list of inputs and outputs (Tables 2-12 and 2-13) provide 
information for the technician to perform module level 
troubleshooting. 
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							  Chapter 2---System Description 
IIC_CLK
IIC_DATA
/IIC_SINT
X_RED_CONV
X_GRN_CONV
X_BLU_CONV
Y_RED_CONV
Y_GRN_CONV
Y_BLU_CONV
V_DRIVE
CORR_SYNC
WIDTH_CONTROL
RED_ILA+
RED_ILA-
GRN_ILA+
GRN_ILA-
BLU_ILA+
BLU_ILA-
X_RED-
X_GRN+X_GRN-
X_BLU+
X_BLU-
X_RED+
Y_RED-Y_GRN+
Y_GRN-
Y_BLU+
Y_BLU-
Y_RED+
H_PARABOLA
V_PARABOLA
V_RAMP
V_PARAB
2
3
4
2
4
6
810
12
17
18
5
J33
J31
J32
5+5.1V66ND7+15V9GND11-15V13GND
J32
1415
J3313
J31
J4012
3
4
5
6
J3912
3
4
5
6
J381
2
4
5
7
8
1GND
13GND
2GND
1GND
GND16
FROMSCB
FROM RTG
FROMLVPS
TOHVPS
FROMHVDB
TO/FROMSRB
TO/FROMSRB
TOILAs
FROM HVDB
CONVERGENCE/
DEFLECTION
BOARD
FROMSCB
 
Figure 2-15.   Convergence/Deflection Board I/O diagram. 
IIC interface 
Adjustments for this board are performed by the System Controller 
via the IIC serial bus interface. This three wire bus interface 
consists of a clock line, a data line and an interrupt line. The C/D 
Board does not create any IIC interrupt. The following table lists all 
adjustments performed via the IIC bus interface (I = Input to C/D 
Board, O = Output from C/D Board): 
 
Table 2-12.  Convergence/Deflection IIC communication 
Input/ 
Output 
No. of 
bits Information Description 
I 1 ILA_FREQ_N1 Data for selection of frequency of ILA bias circuit  
I 1 ILA_FREQ_N2 Data for selection of frequency of ILA bias circuit  
I 1 ILA_FREQ_N3 Data for selection of frequency of ILA bias circuit  
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							Chapter 2---System Description 
I 1 ILA_FREQ_N4 Data for selection of frequency of ILA bias circuit  
I 1 ILA_FREQ_N5 Data for selection of frequency of ILA bias circuit  
I 1 ILA_FREQ_N6 Data for selection of frequency of ILA bias circuit  
I 1 ILA_FREQ_N7 Data for selection of frequency of ILA bias circuit  
I 1 ILA_FREQ_N8 Data for selection of frequency of ILA bias circuit  
I 8 ILA_RED_BIAS Data for adjustment of red ILA bias 
I 8 ILA_GRN_BIAS Data for adjustment of green ILA bias 
I 8 ILA_BLU_BIAS Data for adjustment of  blue ILA bias 
I 1 ILA_FREQ_M1 Data for selection of frequency of ILA bias circuit 
(pre-scale counter) 
I 1 ILA_FREQ_M2 Data for selection of frequency of ILA bias circuit 
(pre-scale counter) 
I 8 LR_RED_SKEW Data for adjustment of red left/right skew 
I 8 LR_GRN_SKEW Data for adjustment of green left/right skew 
I 8 LR_BLU_SKEW Data for adjustment of blue left/right skew 
I 8 LR_BOW Data for adjustment of left/right bow 
I 8 HEIGHT Data for adjustment of height for all colors 
I 8 LR_KEY_BAL Data for adjustment of left/right keystone balance
I 8 LR_PIN_BAL Data for adjustment of left/right pincushion 
balance 
I 8 H_RED_LIN Data for red horizontal overall linearity correction 
I 8 H_GRN_LIN Data for green horizontal overall linearity 
correction 
I 8 H_BLU_LIN Data for blue horizontal overall linearity 
correction 
I 8 H_RED_ 
EDGE_LIN 
Data for red horizontal edge linearity correction 
I 8 H_GRN 
_EDGE_LIN 
Data for green horizontal edge linearity correction
I 8 H_BLU 
_EDGE_LIN 
Data for blue horizontal edge linearity correction 
I 8 TP_RED_SKEW Data for adjustment of red top/bottom skew 
I 8 TP_GRN_SKEW Data for adjustment of green top/bottom skew 
I 8 TP_BLU_SKEW Data for adjustment of blue top/bottom skew 
I 8 TP_BOW Data for adjustment of top/bottom bow 
I 8 TP_PIN Data for adjustment of top/bottom pincushion 
I 8 TP_PIN_BAL Data for adjustment of top/bottom pincushion 
balance 
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							  Chapter 2---System Description 
I 8 TP_KEY Data for adjustment of top/bottom keystone 
I 8 TP_KEY_BAL Data for adjustment of top/bottom keystone 
balance 
I 1 /RASTER_FIL Control line for the raster fill option, low = raster 
fill is active 
I 1 /CONV_ENABLE Convergence enable line low = enabled 
convergence 
O 1 ILA_LOCKED Status line for the lock indication of the PLL of the 
ILA section with high = locked PLL 
O 1 /CD_OK Convergence board status line. Low = 
operational C/D Board, High = Nonoperational 
C/D Board. 
O 2 CD_MODEL Revision of C/D Board 
 
The Convergence/Deflection Board I/O  
This section describes the inputs to and outputs from the C/D 
Board. The I/O descriptions are arranged by the source and 
destination of the signal. The assembly communicated with is the 
primary heading of each group of signals. Those signals are 
subdivided into inputs and outputs. Input refers to an Input to the 
C/D Board, output refers to an output from the C/D Board. 
Table 2-13.  Convergence Deflection I/O signals 
System Controller Board
INPUTS DESCRIPTION 
IIC_CLK IIC clock line. Unidirectional clock line for control of synchronous 
data transfer over the IIC bus interface. 
IIC_DATA IIC data line. Bidirectional serial line for synchronous data transfer 
between the System Controller Board and the C/D Board. 
X_RED_ 
CONV 
Red X convergence waveform. The amplitude for full scale 
correction is about 1 VPP. 
X_GRN_ 
CONV 
Green X convergence waveform. The amplitude for full scale 
correction is about 1 VPP. 
X_BLU_ 
CONV 
Blue X convergence waveform. The amplitude for full scale 
correction is about 1 VPP. 
Y_RED_ 
CONV 
Red Y convergence waveform. The amplitude for full scale correction 
is about 1 VPP. 
Y_GRN_ 
CONV 
Green Y convergence waveform. The amplitude for full scale 
correction is about 1 VPP. 
Y_BLU_ 
CONV 
Blue Y convergence waveform. The amplitude for full scale 
correction is about 1 VPP. 
CORR_ 
SYNC Square wave HCT level synchronization signal for horizontal axis 
OUTPUTS DESCRIPTION 
/IIC_SINT IIC interrupt line. Convergence board does not initiate any IIC 
interrupt. 
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							Chapter 2---System Description 
ILAs  
OUTPUTS DESCRIPTION 
RED_ILA+ The positive output of red ILA driver circuitry, about ± 12 VPP 
RED_ILA- The negative output of red ILA driver circuitry, about ± 12 VPP 
GRN_ILA+ The positive output of green ILA driver circuitry, about ± 12 VPP 
GRN_ILA- The negative output of green ILA driver circuitry, about ± 12 VPP 
BLU_ILA+ The positive output of blue ILA driver circuitry, about ± 12 VPP 
BLU_ILA- The negative output of blue ILA driver circuitry, about ± 12 VPP 
ILA_THERM+ The positive side of the ILA temperature sense line 
ILA_THERM- The negative side of the ILA temperature sense line 
Scan Reversal Board 
INPUTS DESCRIPTION 
X_RED- Current feedback of red horizontal (X) convergence amplifier 
X_GRN- Current feedback of green horizontal (X) convergence amplifier 
X_BLU- Current feedback of blue horizontal (X) convergence amplifier 
Y_RED- Current feedback of red vertical (Y) convergence amplifier 
Y_GRN- Current feedback of green vertical (Y) convergence amplifier 
Y_BLU- Current feedback of blue vertical (Y) convergence amplifier 
OUTPUTS DESCRIPTION 
X_RED+ Output of red horizontal (X) convergence amplifier 
X_GRN+ Output of green horizontal (X) convergence amplifier 
X_BLU+ Output of blue horizontal (X) convergence amplifier 
Y_RED+ Output of red vertical (Y) convergence amplifier 
Y_GRN+ Output of green vertical (Y) convergence amplifier 
Y_BLU+ Output of blue vertical (Y) convergence amplifier 
Horizontal/Vertical Deflection Board 
INPUTS DESCRIPTION 
WIDTH_ 
CONTROL 
A DC wave form for controlling width of picture. About 4 V max. 
OUTPUTS DESCRIPTION 
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							  Chapter 2---System Description 
V_PARAB Vertical parabola wave form. About 4 VPP. 
V_RAMP Vertical ramp wave form. About  4 VPP. 
Raster Timing Generator Board  
INPUTS DESCRIPTION 
V_DRIVE Square wave HCT level synchronized to vertical sync with 4H duty 
cycle. 
High Voltage Power Supply 
OUTPUTS DESCRIPTION 
H_ 
PARABOLA 
Horizontal parabola for dynamic focus section of High Voltage Power 
Supply 
V_ 
PARABOLA 
Vertical parabola for dynamic focus section of High v\Voltage Power 
Supply 
Low Voltage Power Supply 
INPUTS DESCRIPTION 
+5.1 V + 5 V supply for use by convergence board. 
+15 V + 15 V supply for use by convergence board. 
-15 V - 15 V supply for use by convergence board. 
 
Interlocks and protection 
None 
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