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Hughes Jvc 200 Projector Service Manual

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Page 61

Chapter 2---System Description 
I 8 V_RED_EDGE_CONTROL Data for adjustment of red vertical edge 
linearity 
I 8 V_GRN_EDGE_CONTROL Data for adjustment of green vertical 
edge linearity  
I 8 V_BLU_EDGE_CONTROL Data for adjustment of blue vertical edge 
linearity 
I 8 L/R_KEY_CONTROL Data for adjustment of left / right 
keystone correction 
I 8 L/R_PIN_CONTROL Data for adjustment of left / right 
pincushion correction 
I 8 WIDTH_CONTROL Data for adjustment of screen width 
I 8 H_RED_CENT_CONTROL Data for...

Page 62

  Chapter 2---System Description 
Horizontal/Vertical Deflection Board I/O  
This section provides a description of the inputs to and outputs 
from the HVD Board. The I/O descriptions are arranged by the 
source/destination of the signal. The assembly communicated with 
is used as the primary heading of each group of signals. Those 
signals are subdivided into inputs and outputs. Input refers to an 
Input to the HVD Board, output refers to an output from the HVD 
Board. 
Table 2-11.  Horizontal/Vertical...

Page 63

Chapter 2---System Description 
H_LOCK+ Horizontal interlock for yoke connectors. This should be about 5 V 
when closed  or 15 V when open. 
H_RED+ Output of horiz. red centering (also top of the red horiz. yoke). Abou\
t 
+ 5 VDC. 
H_GRN+ Output of horz. green centering (top of green horz. yoke). About + 5 
VDC  
H_BLU+ Output of horiz. blue centering (top of blue horiz. yoke). About + 5 
VDC. 
V_RED+ Output of red vertical amplifier. About 40 VPP.  
V_GRN+ Output of green vertical amplifier. About 40...

Page 64

  Chapter 2---System Description 
+80 V + 80 V supply for use by the switching supply of horizontal deflection 
amplifier 
 
Interlocks and protection: 
Input 
None 
Outputs 
H_LOCK + and H_LOCK-: Used to shut down the switching power 
supply of the horizontal deflection amplifier in the event of a loose 
yoke or loose scan reverse connector. This prevents the power 
supply section of the Horizontal/Vertical Deflection Board from 
operating when 1 or more yoke connectors are disconnected. 
/SWEEP_OK:...

Page 65

Chapter 2---System Description 
2.3.9   Convergence/Deflection PCB 
The Convergence/Deflection Board is located on the bottom side 
of the card cage under the Horizontal/Vertical Deflection Board. 
This board drives the convergence coils of the projectors.  
The following functions are provided by C/D Board: 
• Generation of various waveforms for the horizontal and vertical 
axes 
• Height control  
• Generation of waveforms for dynamic focus 
• Various geometry correction functions for the horizontal...

Page 66

  Chapter 2---System Description 
IIC_CLK
IIC_DATA
/IIC_SINT
X_RED_CONV
X_GRN_CONV
X_BLU_CONV
Y_RED_CONV
Y_GRN_CONV
Y_BLU_CONV
V_DRIVE
CORR_SYNC
WIDTH_CONTROL
RED_ILA+
RED_ILA-
GRN_ILA+
GRN_ILA-
BLU_ILA+
BLU_ILA-
X_RED-
X_GRN+X_GRN-
X_BLU+
X_BLU-
X_RED+
Y_RED-Y_GRN+
Y_GRN-
Y_BLU+
Y_BLU-
Y_RED+
H_PARABOLA
V_PARABOLA
V_RAMP
V_PARAB
2
3
4
2
4
6
810
12
17
18
5
J33
J31
J32
5+5.1V66ND7+15V9GND11-15V13GND
J32
1415
J3313
J31
J4012
3
4
5
6
J3912
3
4
5
6
J381
2
4
5
7
8
1GND
13GND
2GND
1GND
GND16
FROMSCB
FROM RTG...

Page 67

Chapter 2---System Description 
I 1 ILA_FREQ_N4 Data for selection of frequency of ILA bias circuit  
I 1 ILA_FREQ_N5 Data for selection of frequency of ILA bias circuit  
I 1 ILA_FREQ_N6 Data for selection of frequency of ILA bias circuit  
I 1 ILA_FREQ_N7 Data for selection of frequency of ILA bias circuit  
I 1 ILA_FREQ_N8 Data for selection of frequency of ILA bias circuit  
I 8 ILA_RED_BIAS Data for adjustment of red ILA bias 
I 8 ILA_GRN_BIAS Data for adjustment of green ILA bias 
I 8 ILA_BLU_BIAS...

Page 68

  Chapter 2---System Description 
I 8 TP_KEY Data for adjustment of top/bottom keystone 
I 8 TP_KEY_BAL Data for adjustment of top/bottom keystone 
balance 
I 1 /RASTER_FIL Control line for the raster fill option, low = raster 
fill is active 
I 1 /CONV_ENABLE Convergence enable line low = enabled 
convergence 
O 1 ILA_LOCKED Status line for the lock indication of the PLL of the 
ILA section with high = locked PLL 
O 1 /CD_OK Convergence board status line. Low = 
operational C/D Board, High =...

Page 69

Chapter 2---System Description 
ILAs  
OUTPUTS DESCRIPTION 
RED_ILA+ The positive output of red ILA driver circuitry, about ± 12 VPP 
RED_ILA- The negative output of red ILA driver circuitry, about ± 12 VPP 
GRN_ILA+ The positive output of green ILA driver circuitry, about ± 12 VPP 
GRN_ILA- The negative output of green ILA driver circuitry, about ± 12 VPP 
BLU_ILA+ The positive output of blue ILA driver circuitry, about ± 12 VPP 
BLU_ILA- The negative output of blue ILA driver circuitry, about ± 12 VPP...

Page 70

  Chapter 2---System Description 
V_PARAB Vertical parabola wave form. About 4 VPP. 
V_RAMP Vertical ramp wave form. About  4 VPP. 
Raster Timing Generator Board  
INPUTS DESCRIPTION 
V_DRIVE Square wave HCT level synchronized to vertical sync with 4H duty 
cycle. 
High Voltage Power Supply 
OUTPUTS DESCRIPTION 
H_ 
PARABOLA 
Horizontal parabola for dynamic focus section of High Voltage Power 
Supply 
V_ 
PARABOLA 
Vertical parabola for dynamic focus section of High v\Voltage Power 
Supply 
Low Voltage...
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