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Casio Qt 6100 Service Manual

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    — 59 —
    8-9. SDRAM (IC12: HY5V52ALFP-H-C)
    DQ26
    1
    A
    B
    C
    D
    E
    F
    G
    H
    J
    K
    L
    M
    N
    P
    R
    2 3 4 5 6 7 8 9
    DQ28
    VSSQ
    VSSQ
    VDDQ
    VSSA4
    A7
    CL
    K DQ2
    4
    VDDQ DQ2
    7
    DQ2
    9
    DQ3
    1
    DQM3
    A5
    A8
    CKE VSS
    VSSQ DQ2
    5
    DQ3
    0
    NC
    A3
    A6
    NC A9 VDD
    VDDQ DQ2
    2
    DQ1
    7
    NC A2
    A1
    0
    NC
    BA0 DQ23
    VSSQ DQ20
    DQ18
    DQ16
    DQM2 A0
    BA1
    /CS DQ2
    1
    DQ1
    9
    VDDQ
    VDDQ VSSQ
    VDD A1
    A1
    1
    /RAS
    (Top view)
    DQM1 NCNC /CAS/WEDQM0
    VDDQ DQ8VSS VDDDQ7VSSQ
    VSSQ DQ10 DQ9 DQ6DQ5VDDQ
    VSSQ DQ12DQ14 DQ1DQ3VDDQ
    DQ11 VDDQ VSSQ VDDQVSSQ DQ4
    DQ13DQ15 VSS VDDDQ0DQ2
    90-ball FBGA 
    						
    							
    — 60 —
    8-10. DISPLAY CONTROLLER (IC45: SM712)
    8-10-1. Pin Assignment
    MD3MD4MD5MD7MD31MD17MD28MD20MD25MD22AD0AD4AD7AD9AD12AD14PAR
    MD44
    MD45
    ~DQM4FPFPENCKINAVDDAVSS2
    MD0MD11MD9MD8MD30MD18MD27MD21MD24AD1AD5~BE0AD10AD 13~BE1
    MD1MD13MD10MD6~DQ M2MD16MD29MD19MD26MD23AD3AD6AD8AD11AD15AD17
    ~DQM1MD14VDDVSSMV DDN/CMVDDVSSVSSAD2HVDDVSSHV DDVDDVSSHVDDAD19AD20
    MD46
    MD34
    MD47LPDECR TH
    SYNCRVDDIR EF
    BLUE
    P15
    MD42
    MD41
    MD33~DQ M5FPSC LKCVDDRVSS
    RED
    USR1TEST0
    MD38
    MD39
    MD43MVDDN/CFDA22N/CFPVDDN/CN/CFPVDDN/CCV SSAVSS1USR0TEST1P13
        1 2          3         4   5         6          7          8          9         1 0       11        12      13        14       15      16         17       18        19     20
        1 2          3         4   5           6         7         8          9         10        11        12         13       14       1
    5       16        17       18        19      20
    A
    B
    C
    D
    E
    F
    G
    H
    J
    K
    L
    M
    N
    P
    R
    T
    U
    V
    W
    Y
    A
    B
    C
    D
    E
    F
    G
    H
    J
    K
    L
    M
    N
    P
    R
    T
    U
    V
    W
    Y
    MD12
    MD35
    MD36
    MD37
    MD40
    ~CS0
    MD15
    MD2
    ~BE2
    USR3
    USR2
    P14
    P11
    AD21
    AD18
    AD16
    P9
    P6
    P2
    PCLK
    BLANK
    ~EXCKEN
    REFC LK
    CLK
    AD31
    AD28
    AD25
    IDSEL
    MD63
    MD49
    MD60
    MD52
    MD57
    MD55
    N/C
    SDCKEN
    MA1
    MA7
    MA5
    ~WE
    ~D QM6
    MD62
    MD50
    MD59
    MD53
    MD56
    ~RO MEN
    SDCK
    MA8
    MA3
    ~CAS
    BA
    MD48
    MD61
    MD51
    MD58
    MD54
    DSF
    MA9
    MA2
    MA4
    ~RAS
    ~D QM0
    VSS
    ~DQM7
    MVDD
    VSS
    VDD
    VSSA
    N/C
    MA0
    MA6
    VSS
    MVDD
    VSS
    P10
    P7
    P3
    P0
    HREF
    ~INTA
    ~G NT
    AD 30
    AD27
    AD24
    AD23
    P12
    P8
    P5
    P1
    VREF
    ~RST
    ~REQ
    AD 29
    AD26
    ~BE3
    AD22
    N/C
    N/C
    P4
    PALCLK
    VSS
    HVDD
    VSS
    VDD
    HVDD
    VSS
    ~DQ M3
    ~DEVSEL
    MCKIN
    VPVDD
    ~TRDY
    ~IRDY
    ~PDO WN
    GREEN
    ~FRA ME
    ~STOP
    ~CL KRUN
    FDA23
    FDA21
    FDA20
    FDA19
    FDA18
    FDA17
    FDA16
    FDA15
    FDA14
    FDA13
    FDA12
    FDA11
    FDA8
    FDA9
    FDA10
    FDA5
    FDA6
    FDA 7
    FDA2
    FDA4
    FDA3
    FPVDDEN
    VBIASEN
    FDA0
    FDA1CR TV
    SYNCMD32
    SM712
    TOP VIEW
     N/C
      
     N /C 
    						
    							— 61 —
    PIN NAME I/O DESCRIPTION
    AD [31:0]
    C/
    ~BE [3:0]
    PAR
    ~FRAME
    ~TRDY
    ~IRDY
    ~STOP
    ~DEVSEL
    IDSEL
    CLK
    ~RST
    ~REQ
    ~GNT
    ~INTA
    I/O
    I/O
    I/O
    I/O
    I/O
    I/O
    I/O
    I/O
    I
    I
    I
    O
    I
    OPCI multiplexed Address and Data Bus. A bus transaction consists of an address cycle followed by one or
    more data cycles.
    PCI Bus Command and Byte Enables. These signals carry the bus command during the address cycle and
    byte enable during data cycles.
    Parity. LynxEM+ asserts this signal to verify even parity across AD [31:0] and C/~BE [3:0].
    Cycle Frame. LynxEM+ asserts this signal to indicate the beginning and duration of a bus transaction. It is
    de-asserted during the final data cycle of a bus transaction.
    Target Ready. A bus data cycle is completed when both ~IRDY and ~TRDY are asserted on the same
    cycle.
    Initiator Ready. A bus data cycle is completed when both ~IRDY and ~TRDY are asserted on the same
    cycle.
    Stop. LynxEM+ asserts this signal to indicate that the current target is requesting the master to stop current
    transaction.
    Device Select. LynxEM+ asserts this signal when it decodes its addresses as the target of the current
    transaction.
    ID Select. This input is used during PCI configuration read/write cycles.
    PCI System Clock, 33 MHz.
    PCI System Reset. LynxEM+ asserts this signal to force registers and state machines to initial default
    values
    PCI Bus Request (bus master mode)
    PCI Bus Grant (bus master mode)
    PCI Interrupt
    Host Interface
    Power Down Interface
    ~PDOWN
    ~CLKRUN/
    ACTIVITYI
    OPower down mode enable
    ~CLKRUN or LynxEM+ Memory and I/O activity detection depending on SCR18 [7]
    0 = select ~CLKRUN
    1 = select ACTIVITY
    Clock Interface
    REFCLK
    CKIN
    MCKIN/
    LVDSCLK
    ~EXCKENI
    I
    I/O
    I32 KHz refresh clock source for power down or PALCLK for PALTV
    14.318 MHz clock (~EXCKEN = 1) or Video Clock (~EXCKEN = 0)
    Memory Clock In (~EXCKEN = 0) or LVDSCLK Out (~ESCKEN = 1), LVDSCLK is a free running clock
    which can be used to drive LVDS transmitter for DSTN panels.
    External Clock Enable. Select external VCLK form CKIN and MCLK from MCKIN.
    8-10-2. Pin Function 
    						
    							
    — 62 —
      PIN NAME  I/O DESCRIPTION
    MA [9:0]
    MD [63:0]
    ~WE
    ~RAS
    ~CAS
    ~CS0
    ~DQM[7:0]
    DSF
    BA
    SDCK
    SDCKEN
    ~ROMEN
    O
    I/O
    O
    O
    O
    O
    O
    O
    O
    I/O
    I/O
    O
    External Memory Address Bus. The video memory row and column addresses are multiplexed on these lines.
    External Memory Data Bus
    External Memory Write Strobe
    External Memory SDRAM Row Address Select
    External SGRAM Column Address Select
    External SGRAM Chip Select 0, select 1st 1MB within the 2MB memory, or select 1st 2MB within the 4MB memory
    External SGRAM I/O mask [7:0]. DQM [7:0] are byte specific. DQM0 masks MD [7:0], DQM1 masks MD [15:8],…,and DQM7 masks MD [63:58].
    External SGRAM Block write
    External SGRAM Bank Select. SDRAM has dual internal banks. Bank address defi nes to which bank the current command is being applied.
    External SGRAM clock. SDCK is driven by the memory clock. All SDRAM input signals are sampled on the positive edge of SDCK.
    External SGRAM clock enable. SDCKEN activates (HIGH) and deactivates (LOW) the SDCLK signal.Deactivating the SDCK provides POWER-DOWN and SELF-REFRESH mode.
    ROM Enable
    External Display Memory Interface
    Flat Panel Interface
    FDATA [23:0]
    LP/FHSYNC
    FP/FVSYNC
    M/DE
    FPSCLK
    FPEN
    FPVDDEN
    VBIASEN
    O
    O
    O
    O
    O
    O
    O
    O
    Flat Panel Data bit 23 to bit 0. Note: For SM712, the upper 12 bits [25:24] are multiplexed with ZV port, and the upper 12 bits [23:11] are dedicated for flat panel data
    DSTN LCD: Line PulseTFT LCD: LCD Horizontal Sync
    DSTN LCD: Frame PulseTFT LCD: LCD vertical sync
    M-signal or Display Enable. This signal is used to indicate the active horizontal display time.FPR3E [7] is used to select1 = M-signal0 = Display Enable
    Flat Panel Shift Clock. This is the pixel clock for Flat Panel Data.
    Flat Panel Enable. This signal needs to become active after all panel voltages, clocks, and data are sup-plied. This signal also needs to become inactive before any panel voltages or control signals are removed. FPEN is part of the VESA FPDI-1B specification.
    Flat Panel VDD Enable. This signal is used to control LCD logic power.
    Flat Panel Voltage Bias Enable. This signal is used to control LCD Bias power. 
    						
    							
    — 63 —
      PIN NAME  I/O DESCRIPTION
    RED
    GREEN
    BLUE
    IREF
    CRTVSYN-CC
    CRTH-
    O
    O
    O
    I
    O
    O
    Analog Red Current Output
    Analog Green Current Output
    Analog Blue Current Output
    Current Reference Input
    CRT Vertical Sync
    CRT Horizontal Sync or Composite Sync depending on CCR65 [0]0 = CRT Horizontal Sync1 = Composite Sync
    CRT Interface
    Video Port Interface
    P [15:0]
    PCLK
    VREF
    HREF
    BLANK/TVCLK
    I/O
    I/O
    I/O
    I/O
    I/O
    RGB or YUV input/ RGB digital output
    Pixel Clock
    VSYNC input from PC Card or video decoder
    HSYNC input from PC Card or video decoder
    Blank output or TVCLK output depending on CCR69 bit 7.0 = BLANK output1 = TVCLK outputTVCLK output is used to drive external NTSC/PAL TV encoder. To select NTSC or PAL TV, please refer to CCR65 register
    General Purpose Registers / I2C
    USR3
    USR2
    USR1 / SDA
    USR0 / SCL
    I/O
    I/O
    I/O
    I/O
    General Purpose register. It is recommended to use USR3 to control TV On/Off.0 = TV display is OFF1 = TV display is ON
    General Purpose register. It is recommended to use USR2 to select NTSC/PAL TV settings.0 = PALTVCLK1 = NTSCTVCLK or REFCLK
    General Purpose register. USR1/ DDC2/ I2C Data. Can be used to select different test modes.
    General Purpose register. USR0/ DDC2/ I2C Clock. Can be used to select different test modes.
    Tes t Mode Pi ns
    TEST [1:0]ITest mode selects 
    						
    							
    — 64 —
      PIN NAME  I/O DESCRIPTION
    HVDD
    MVDD
    FPVDD
    VPVDD
    CVDD
    AVDD
    RVDD
    CVSS
    AVSS1
    AVSS2
    RVSS
    VDD
    VSS
    Host Interface VDD on I/O Ring, 3.3V
    Display Memory Interface VDD on I/O Ring, 3.3V
    Flat Panel Interface VDD on I/O Ring, 3.3V
    VPVDD VPort Interface VDD on I/O Ring 3.3V
    Clock (PLL) Analog Power, 3.3V
    DAC Analog Power, 3.3V
    RAM Filtered Palette Power, 3.3V
    PLL Analog Ground
    DAC Analog Ground
    DAC Analog Ground
    RAM Filtered Palette Ground
    Digital 3.3V Core Power SupplyDigital 3.3V Internal Memory Power Supply
    Digital Ground
    VCC and GROUND Pins 
    						
    							
    — 65 —
    8-11. ETHERNET CONTROLLER (IC28: LAN91C113)
    8-11-1. Pin Assignment
    8-11-2. Block Diagram 
    						
    							
    — 66 —
    Perform proper operation.
    Return the mode to its original setting.
    Input correct check number or assign the 
    proper clerk.
    Reallocate memory.
    Close cash drawer.
    Replace journal paper.
    Replace receipt paper.
    Check the internal R/J printer.
    Switch to another mode and then back to 
    the REF/REG– mode again.
    Input a check number.
    Input a table number.
    Enter the number of customers.
    Input a seat number.
    Perform stock maintenance.
    Perform stock maintenance.
    Re-enter the PLU code.
    Finalize the transaction.
    Press ST key.
    Enter tendered amount.
    Enter amount tendered again.
    Perform pickup operation.
    Enter correct unit price/amount.
    Perform money declaration.
    Issue a guest receipt.
    Perform validation operation.
    Perform check print operation.
    Perform check endorsement operation.
    Finalize the transaction.
    Allocate sufficient buffer.
    Perform slip printing operation.
    Insert new slip paper.
    Finalize and close the check number cur-
    rently used.
    Finalize and close the check number 
    currently used.
    Operation error
    Check tracking (Open mode error)
    Error clerk/Error clerk in check tracking
    Memory allocation over
    Drawer compulsory
    Journal paper end
    Receipt paper end
    Internal R/J printer error
    Prohibit plural operation in REF/REG– 
    mode
    Check number compulsory
    Table number compulsory
    Cover compulsory
    Seat number compulsory
    Alarm when any item drops below its 
    programmed minimum stock quantity 
    during registration.
    Error when actual stock value for a reg-
    istration items is a negative value.
    Scanning PLU is not found or OBR code 
    is mismatched.
    Attempted registration whilst partial ten-
    der operation is being done.
    ST compulsory
    Amount tender compulsory
    Change amount exceeds the limit.
    Contents of the drawer exceed the pro-
    grammed limit — Sentinel function.
    H.D.L., H.A.L., L.D.L. error
    Money declaration compulsory
    Guest receipt compulsory
    Validation compulsory
    Check print compulsory
    Check endorsement compulsory
    Registration buffer full
    Slip compulsory
    Alarm when no paper is inserted in the 
    Slip.
    Check tracking index full/near end
    Check tracking memory full/near end
    9. ERROR CODE LIST
    9-1  Error messages
    When an error occurs on a QT-6100 terminal, a buzzer sounds and the appropriate error
    message appears on the main display, indicating what action to take.
    The following table lists the error messages and describes the action to take.
      Operator mistake.
    E001  Wrong mode.
    E003  Wrong operator.
    E005  Insufficient memory.
    E011  Close the drawer.
    E012  Journal paper end.
    E014  Receipt paper end.
    E015  Check R/J printer.
    E016  Change back to REG 
    mode.
    E017 Enter Check/TBL number.
    E018  Enter Table number.
    E019  Enter Number of covers.
    E020  Enter Seat number.
    E023  Stock running short.
    E024  No stock is available.
    E028  Not found PLU or C/D is 
    mismatch.
    E029  No registration is pos-
    sible while you are in the 
    tender operation.
    E031  Press ST key before 
    Finalization.
    E033  Enter tendered amount.
    E035  Change amount exceeds 
    the limit.
    E036  Remove money from the 
    drawer.
    E037  Digit or Amount Limita-
    tion Over.
    E038  Perform Money Declara-
    tion
    E040  Issue Guest Receipt.
    E041  Print Validation.
    E044  Print Cheque.
    E045  Print Check-Endorse-
    ment.
    E046  REG Buffer Full. Please 
    Finalize or NB.
    E047  Print bill.
    E048  Insert Slip Paper and 
    retry.
    E049  CHECK memory full.
    E050  Detail memory full.
    ActionMeaningPrompt message 
    						
    							
    — 67 —
    ActionMeaningPrompt message
    E051  CHK/TBL No. is occu-
    pied.
    E052  CHK/TBL No. is Busy.
    E053  CHK/TBL No. is not 
    opened.
    E054  Out of CHK/TBL No. 
    Range.
    E056  Store range full.
    E057  No item exists in detail.
    E058  Enter post entry item.
    E059  Press Eat-in or Take-out 
    key.
    **********
    E060  Printer offline.
    **********
    E061  Printer error
    **********
    E061  Printer error.
      YES:Retry to print.
      NO :Backup to R/J printer.
      ESC:Discard data.
    **********
    E062  Printer paper end.
    **********
    E062  Printer paper end.
      YES:Retry to print.
      NO :Backup to R/J printer.
      ESC:Discard data.
    E064  Printer buffer full.
      YES:Retry to print.
      NO :Backup to R/J printer.
      ESC:Discard data.
    **********
    E070  Terminal out of action.
      Cannot print.
    **********
    E071  Target terminal printer 
    BF full.
      YES:Retry to print.
      NO :Backup to R/J printer.
      ESC:Discard data.
    **********
    E072  Target printer terminal is 
    busy.
    Attempt is made to use the  key to open a new check us-
    ing a number that is already used for an 
    existing check tracking memory.
    Attempt to use the same check number 
    whilst the specified number is being 
    used in the other terminal.
    Check number not found
    Check number range over
    All check number are occupied in range.
    Round repeat cannot be found in detail.
    Post entry item exists in detail.
    Press eat-in or take-out key.
    Printer offline. “****” means ECR logical 
    ID and printer number.
    Printer downed. “****” means ECR logi-
    cal ID and printer number.
    Printer downed. “****” means ECR logi-
    cal ID and printer number.
    Paper near-end/end “****” means ECR 
    logical ID and printer number.
    Paper near-end/end “****” means ECR 
    logical ID and printer number.
    Print buffer full at sender side
    Down at target ECR which has printer 
    “****” means ECR logical ID and printer 
    number.
    Printer buffer full at target ECR which 
    has printer
    “****” means ECR logical ID and printer 
    number.
    Busy at target ECR which has printer 
    “****” means ECR logical ID and printer 
    number.
    Finalize and close the check that is currently 
    under the number that you want to use or 
    use a different check number.
    Use another check number or close the 
    check at that terminal.
    Use the correct check number (if you want 
    to reopen a check that already exists in 
    the check tracking memory) or use  to open a new check.
    Enter correct number.
    Recall the stored data.
    Enter Post entry item.
    Press Eat-in or Takeout key.
    The contents are printed on the backup 
    printer.
    Follow the prompt message.
    The contents are printed on the backup 
    printer.
    Follow the prompt message.
    Follow the prompt message.
    Follow the prompt message. 
    						
    							
    — 68 —
    ActionMeaningPrompt message
    **********
    E073  Your receipt/order may 
    not be issued.
      YES:Retry to print.
      NO :Backup to R/J printer.
      ESC:Discard data.
    E075  Negative Balance, can-
    not be finalized.
    E080  Electronic Journal Full 
    Please clear E-Journal.
    E082  ***** Illegal Data *****
    E083  Cannot create E-Journal. 
    Check Flash memory.
    **********
    E105  Check/TBL tracking 
    Master down. Please 
    call Manager!!
      YES:Retry for connection.
      NO :Remove it from system.
    **********
    E106  Check/TBL tracking 
    Backup master down. 
    Please call Manager!!
      YES:Retry for connection.
      NO :Remove it from system.
    **********
    E107  Both Master&Backup 
    master down. CHK/TBL 
    tracking or Clerk inter-
    rupt is not available.
    **********
    E108  CHK/TBL Master is 
    removed from system.
    **********
    E109  CHK/TBL Backup 
    master is removed from 
    system.
    E110  CHK data mismatch 
    between Master and 
    Backup master.
    E130  Middle of Pick up or 
    Loan Press Cancel Key.
    E131  Middle of  
    Press Cancel Key.
    E133  Middle of  Press Cancel 
    Key.
    E134  Middle of Clerk Transfer 
    Press ESC Key.
    E136  Middle of Separate 
    Check Press ESC key.
    E139  Not allowed to be 
    negative by Minus/
    Coupon key.
    Time out at ECR which has printer
     “****” means ECR logical ID and printer 
    number.
    Attempted finalization when balance is 
    less than zero.
    Electronic journal full
    Illegal Electronic journal data
    Electronic journal file cannot be created.
    CHK master down
    “****” means ECR logical ID.
    CHK BM down
    “****” means ECR logical ID.
    CHK M/BM down
    “****” means ECR logical ID.
    Master down then take it off from system 
    “****” means ECR logical ID.
    Backup master down then take it off 
    from system
    “****” means ECR logical ID.
    Data mismatch has occurred.
    During picking up
    During bill copy
    During media change
    During clerk transfer
    During separate check
    Credit balance error
    Follow the prompt message.
    Register item(s) until the balance becomes 
    positive amount.
    Reset the electronic journal memory.
    Check flash memory.
    Follow the prompt message.
    Follow the prompt message.
    Follow the prompt message.
    Follow the prompt message.
    Follow the prompt message.
    Follow the prompt message.
    Follow the prompt message.
    Enter proper minus/coupon amount. 
    						
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