Analog Devices Blackfin AV EZExtender Manual Rev 21
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Blackfin A-V EZ-Extender Manual 2-7 A-V EZ-Extender Hardware Reference Jumpers Before using the Blackfin A-V EZ-Extender, follow the procedure in “A-V EZ-Extender Setup” on page 1-2. Figure 2-2 shows the jumper header locations. The jumper headers are divided to show each jumpers placement and rotation. The jumpers are described by the pins of the header on which the jumpers can be placed. Figure 2-2. Jumper Locations
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Jumpers 2-8 Blackfin A-V EZ-Extender ManualFor example, JP3.4/6/8 refers to a single jumper that can be placed across pins 4 and6 (or pins6 and8) of JP3. The dark pin indicates pin1 of each header. Video Test Loopback Jumpers (JP1.1/2, JP1.3/4, JP1.5/6) For test purposes only, the video test jumpers loop-back the video encoder’s output signals to the video decoder’s input signals. By default, none of the video test loopback jumpers are installed. Connector Voltage Selection Jumper (JP2) The...
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Blackfin A-V EZ-Extender Manual 2-9 A-V EZ-Extender Hardware Reference PDWN Connect Jumper (JP3.9/10) Depending on the application, the PDWN pin of the OmniVision and Kodak cameras can be left floating or controlled by a flag pin (seeTable 2-4). Decoder HSYNC Disconnect Jumper (JP3.11/12) To connect the horizontal sync signal of the video decoder to the PPI0 frame sync signal of the processor, install jumper JP3.11/12; otherwise, the decoder’s horizontal sync is disconnected. Decoder VSYNC Connect...
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Jumpers 2-10 Blackfin A-V EZ-Extender Manual Encoder HREF Connect Jumper (JP3.15/16) To connect the horizontal sync signal of the video encoder to the PPI0 frame sync signal of the processor, install jumper JP3.15/16; otherwise, the encoder’s horizontal reference is disconnected. Encoder VSYNC Connect Jumper (JP3.17/18) To connect the vertical sync signal of the video encoder to the PPI0 frame sync signal of the processor, install jumper JP3.17/18; otherwise, the encoder’s vertical sync is...
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Blackfin A-V EZ-Extender Manual 2-11 A-V EZ-Extender Hardware Reference PPI Clock Setup Jumpers (JP4.1/2, JP4.3/4, JP4.5/6, JP4.7/8) The PPI_CLK signals of PPI0 and PPI1 are configured by the clock setup jumpers (see Table 2-5). For more information, refer to Figure 2-1 on page 2-4. PPI0 D8–15 Enable Jumper (JP5.1/2) The JP5.1/2 jumper, when is not installed, disables the upper eight bits of the PPI0 data bus. This allows the signals connected to the upper eight bits of the PPI data bus of the...
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Jumpers 2-12 Blackfin A-V EZ-Extender Manual VID_OUT Data Bus Control Jumpers (JP5.3/4, JP5.5/6) The JP5.3/4 and JP5.5/6 jumpers are used together to set up the direc- tion of and enable/disable the VID_OUT data bus drivers. Table 2-6 shows different combinations of JP5.3/4 and JP5.5/6. PPI0_SYNC1 Direction Setup Jumper (JP6.1/3/5) The direction of the PPI0_SYNC1 signal can be either fixed or programmed, depending on the state of a general-purpose flag. Table 2-7 shows how to set up the PPI0_SYNC1...
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Blackfin A-V EZ-Extender Manual 2-13 A-V EZ-Extender Hardware Reference PPI0_SYNC2 Direction Setup Jumper (JP6.2/4/6) The direction of the PPI0_SYNC2 signal can be either fixed or programmed, depending on the state of a general-purpose flag. Table 2-8 shows how to set the PPI0_SYNC2 direction. I2S Enable Jumper (JP7.1/2) When JP7.1/2 is installed, the SPORT signals are routed for I2S SPORT communication protocol mode. To accomplish this, the receive and trans- mit clocks of the processor are driven...
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Jumpers 2-14 Blackfin A-V EZ-Extender Manual VID_OUT Bus SYNC Source Select Jumpers (JP8.1/3/5, JP8.2/4/6) The source of the PPI frame sync signals depends on the PPI port driving the VID_OUT bus. When using PPI0, place the jumpers at JP8.1/3 and JP8.2/4. When using PPI1, place the jumpers at JP8.3/5 and JP8.4/6. VID_OUT Bus SYNC Enable Jumper (JP8.7/8) To enable the VID_OUT frame sync signals, install JP8.7/8. AV_RESET Source Jumper (JP9.1/3/5) The source of ICs reset on the Blackfin A-V...
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Blackfin A-V EZ-Extender Manual 2-15 A-V EZ-Extender Hardware Reference PPI0_D Direction Setup Jumper (JP9.2/4/6) The direction of the PPI0_D[15:0] signals can be a fixed direction or can be programmed, depending on the state of a general-purpose flag. Table 2-10 shows how to set up the PPI0_D[15:0] direction. Audio Loopback Jumpers (JP10.1/2, JP10.3/4) The JP10.1/2 and JP10.3/4 jumpers loop-back audio input to output for test purposes and should not be installed. Table 2-10. Setting Direction of...