Sony Scd-1 Service Manual

							41
¥ IC Block Diagrams
Ð AUDIO Board Ð
IC101, 201 CXA8042AS
IC302 CXD8594Q
123456789
10
11
121314
28272625242322212019
1817
1615
SWITCHING
CIRCUIT
CONSTANT
CURRENT
CIRCUITREFERENCE
VOLTAGE
CIRCUIT
CONTROL
CIRCUIT
I01+IN2–
IN2+
NC
IN1+
IN1–
NC
C4
C3
GND2
VEE2
VEE1
C6
C5
CIREF I02–
NC
I01–
I02+
NC
VCC2
C2
C1
VCC1
VREF
VCNT
GND1
RIREF
CLOCK
BUFFERSYNC
NC
52
IFSEL
53
NC54
DVSS55
64
51
MUTE
50
DVDD
43
DVDD
42
VSS2
63 VSS2
62 L1(+)61 VSS60 L1(-)59 VDD58 VDD257 SUB(C)56 SUB(D)
1024Fs CLOCK BUFFER
XVDD
XOUT
XIN
XVSS
XVSS
109811127
VSUB(A)L
6
VDD2
5
VDD
4
L2(-)
3
VSS
2
L2(+)
1
NC
20VSS2
21 VSS2
22 R1(+)23 VSS24 R1(-)25 VDD26 VDD227 SUB(C)28 SUB(D)29 DVSS30 NC31 DRPOL
32 LVCKO2
13
VSUB(A)R
14
VDD2
15
VDD
16
R2(-)
17
VSS
8
R2(+)
19
NC
PLM-R2 PLM-R1
CLOCK
GENERATOR
LVCKO1
33
CKVDD
34
256FSO
35
NSDIR4
36
NSDIR3
37
NSDIR2
38
NSDIR1
39
NSDIL1
46
NSDIL2
47
NSDIL3
48
NSDIL4
49
64FSO
40
CKSEL1
41
BUFFER
CKSEL2
44
CKSEL3
45
PLM-L2 PLM-L1
REGISTER
NSDATA(L/Rch)MUTE
SYNC 
						

							42
Ð MAIN Board Ð
IC503, 505 BA5912AFP-YE2
IC713, 714, 715 TLC2932IPW-E20 IC1501 MC14053BDTR2
+
–+
–+
–+
–
+ –
+
–
+
–
+ –
GND
MUTE1
REF1
POW VCC1
OUT1–
OUT1+
GND
OUT2+
OUT2–
POW VCC2
PRE VCC
REF2
MUTE2OP2-IN+ OP2-IN– OP2-OUT IN1 IN1’
BIAS
GND
OP1-IN+
OP1-IN–
OP1-OUT
IN2’ IN2
125 24 23 22 21 20 19 18 17 16 15 14
2REF1
SWITCHLEVEL SHIFT
VREF2 VREF1LEVEL SHIFTCH2
MUTE
REF2
SWITCH CH1
MUTE
345 6 7 8 910111213
1234567
141312111098
PFD 1/2 DIVIDER
VCO
LOGIC
VDDSELECTVCO
OUTFIN-A FIN-BPFD
OUTLOGIC
GND
VCO
VDDR BIAS VCO
INVCO
GNDVCO
INHIBITPFD
INHIBITNC
1
2
3
4
5
6
7
8 B1
B0
C.COM
CO
INH
VEE
VSSVDD
B.COM
A.COM
A1
A0
A
B
C C19
10
11
12
13
14
15
16
OPEN
OPEN
OPEN 
						

							43
7-24. IC  PIN  FUNCTION  DESCRIPTION
· MAIN BOARD  IC701  HD6413002F16 (CPU)
Pin No. Pin Name I/O Description
1 VCC —
Power supply terminal (+5V)
2 SSSD I/O
Two-way data bus with the SACD/CD RF AMP (IC001)
3 SSI CLK O
Serial data transfer clock signal output to the SACD/CD RF AMP (IC001)
4 PWM O
PWM signal output to the loading motor drive (IC515)
5 JIG CTR I/O
Two-way data bus with the RS-232C (for check)
6 DF LT O
Latch signal output to the digital filter (IC301)
7 DCMF LT O
Not used (open)
8 DATA O
Serial data output to the digital filter (IC301)
9 SHIFT O
SHIFT signal output to the digital filter (IC301)
10 X RES0 O
Not used (open)
11 VSS —
Ground terminal
12 SOUT0 O
Serial data output to the RS-232C (for check)
13 SOUT1 O
Serial data output to the DSD decoder (IC703)
14 SIN0 I
Serial data input from the RS-232C (for check)
15 SIN1 I
Serial data input from the DSD decoder (IC703)
16 SCK0 O
Serial data output to the RS-232C (for check)
17 SCK1 O
Serial data output to the DSD decoder (IC703)
18 D0 I/O
19 D1 I/O
20 D2 I/O
21 D3 I/O
22 VSS —
Ground terminal
23 D4 I/O
24 D5 I/O
25 D6 I/O
26 D7 I/O
27 D8 I/O
28 D9 I/O
29 D10 I/O
30 D11 I/O
Two-way data bus with the servo digital signal processor (IC512), ARP (IC702), expander
31 D12 I/O
(IC711), flash memory (IC716) and S-RAM (IC717)
32 D13 I/O
33 D14 I/O
34 D15 I/O
35 VCC —
Power supply terminal (+5V)
36 A0 O
Address signal output to the ARP (IC702)
37 A1 OAddress signal output to the servo digital signal processor (IC512), ARP (IC702), expander
(IC711, 712), flash memory (IC716) and S-RAM (IC717, 718)
38 A2 O
Address signal output to the ARP (IC702), expander  (IC711, 712), flash memory (IC716) and
39 A3 O
S-RAM (IC717, 718)
40 A4 O
41 A5 O
42 A6 O
43 A7 O
44 VSS —
Ground terminal
Two-way data bus with the expander (IC712) , flash memory (IC716) and S-RAM (IC718)
Two-way data bus with the expander (IC712) , flash memory (IC716) and S-RAM (IC718)Two-way data bus with the expander (IC712) , flash memory (IC716) and S-RAM (IC718)
Two-way data bus with the expander (IC712) , flash memory (IC716) and S-RAM (IC718)Address signal output to the ARP (IC702), flash memory (IC716) and S-RAM (IC717, 718) 
						

							44
Pin No. Pin Name I/O Description
45 A8 O
46 A9 O
47 A10 O
48 A11 O
49 A12 O
50 A13 O
51 A14 O
52 A15 O
53 A16 O
54 A17 O
55 A18 O
Address signal output to the flash memory (IC716)
56 A19 O
Address signal output terminal     Not used (open)
57 VSS —
Ground terminal
58 WAIT I
Wait signal input from the ARP (IC702)
59 EEP SIO I/O
Two-way data bus with the EEPROM (IC735)
60 EEP SCL O
clock signal output to the EEPROM (IC735)
61 CLK O
System clock output terminal    Not used (open)
62 STBY I
Hardware standby signal input terminal (fixed at “H”)
63 RES ISystem reset signal input from the ARP (IC702) and reset signal generator (IC734)   “L”: reset
For several hundreds msec. after the power supply rises, “L” is input, then it changes to “H”
64 NMI I
NMI signal input terminal    Not used (pull up)
65 VSS —
Ground terminal
66 EXTAL I
System clock input terminal (16 MHz)
67 XTAL I
System clock input terminal (16 MHz)
68 VCC —
Power supply terminal (+5V)
69 AS O
Address strobe signal output terminal    Not used (open)
70 RD OStrobe signal output for data reading to the servo digital signal processor (IC512), ARP  (IC702),
expander (IC711, 712), flash memory (IC716) and S-RAM (IC717, 718)
71 HWR OStrobe signal output for data writing to the servo digital signal processor (IC512), ARP  (IC702),
expander (IC712), flash memory (IC716) and upper byte data writing strobe signal output to the
S-RAM (IC717)
72 LWR OStrobe signal output for data writing to the expander (IC711) and lower byte data writing strobe
signal output to the S-RAM (IC716)
73 MD0 I
Input terminal for setting microcomputer operation mode (fixed at “L”)
74 MD1 I
Input terminal for setting microcomputer operation mode (fixed at “L”)
75 MD2 I
Input terminal for setting microcomputer operation mode (fixed at “H”)
76 AVCC —
Power supply terminal (+5V)
77 VREF I
Reference voltage input terminal (+5V)
78 AN0 I
Serial data input from the RS-232C (for check)
79 BUSY2 I
BUSY signal input from the servo digital signal processor (IC512)
80 ADS RDY I
Ready signal input terminal (fixed at “H”)
81 IFBSY I
BUSY signal input from the FL controller (IC1001)
82 PLIN I
PL signal input from the servo digital signal processor (IC512)
83 AK0 I
Monitor signal input from the expander (IC711)
84 AK1 O
85 AK2 O
86 AVSS —
Ground terminal
Address signal output to the flash memory (IC716) and S-RAM (IC717, 718)
Two-way data bus with the expander (IC712) , flash memory (IC716) and S-RAM (IC718)Two-way data bus with the expander (IC712) , flash memory (IC716) and S-RAM (IC718)Two-way data bus with the expander (IC712) , flash memory (IC716) and S-RAM (IC718)Monitor signal output terminal (fixed at “L”) 
						

							45
Pin No. Pin Name I/O Description
87 ARPINT I
Interrupt signal input from the ARP (IC702)
88 SDSCS O
Chip enable signal output to the servo digital signal processor (IC512)
89 SDSACK I
Chip enable signal input from the servo digital signal processor (IC512)
90 CS1 O
Chip enable signal output to the S-RAM (IC717, 718)
91 CS0 O
Chip enable signal output to the flash memory (IC716)
92 VSS —
Ground terminal
93 SHR RDY I
Ready signal Input from the DSD decoder (IC703)
94 IFREQ O
Request signal output to the FL controller (IC1001)
95 RST OUT O
System reset signal output to the servo digital signal processor (IC512) and expander (IC711,712)
96 TKC I
Sled FG signal input from the position sensor (IC008)
97 HFG I
HFG signal input from the spindle motor drive (IC501)
98 A22 O
99 A21 O
Address signal output to the ARP (IC702) and expander (IC711,712)
100 A20 O 
						

							46
· MAIN BOARD  IC711  CXD1095R (EXPANDER)
Pin No. Pin Name I/O Description
1 AK1 O
2 AK2 O
3 MON3 O
4 MON4 O
Monitor signal output terminal    Not used (open)
5 MON5 O
6 MON6 O
7 MON7 O
8 VSS —
Ground terminal
9 WADCE O
Watermark signal output to the RF AD (IC708)
10 TEST O
Test signal output to the DSD decoder (IC703)     “H”:active
11 WMGC0 O
RF gain control for watermark signal output to the RF AD (IC708)
12 WMGC1 O
RF gain control for watermark signal output to the RF AD (IC708)
13 SHR RST O
Reset signal output to the DSD decoder (IC703)
14 SHR MUTE O
Mute signal output to the DSD decoder (IC703)
15 SHR LT O
Latch pulse signal output to the DSD decoder (IC703)
16 — O
Not used (open)
17 NC —
Not used (open)
18 FWON O
FWON signal output to the ARP (IC702)
19 MD2 O
CD-TX mute signal output to the ARP (IC702)
20 MUTE O
CD-DA mute signal output to the ARP (IC702)
21 ARP RST O
Reset signal output to the ARP (IC702)
22 DFCT I
DFCT signal input from the ARP (IC702)
23 VSS —
Ground terminal
24 VDD —
Power supply terminal (+5V)
25 NORF I
NORF signal input from the ARP (IC702)
26 LOCK I
Lock signal input from the ARP (IC702)
27 FIL SET IFilter select signal input from the STANDARD/CUSTOM switch (S173)    “L”:CUSTOM    “H”
:STANDARD
28 D0 I/O
29 D1 I/O
Two-way data bus with the CPU (IC701)
30 D2 I/O
31 NC —
Not used (open)
32 NC —
Not used (open)
33 D3 I/O
34 D4 I/O
35 D5 I/O
Two-way data bus with the CPU (IC701)
36 D6 I/O
37 D7 I/O
38 XCLR I
Clear signal input terminal (pull up)
39 XDIS I
Reset signal input from the ARP (IC702)
40 VSS —
Ground terminal
41 XWR I
Strobe signal input from the CPU (IC701)
42 XRD I
Strobe signal input from the CPU (IC701)
43 XCS I
Chip enable signal input from the CPU (IC701) 
						

							47
Pin No. Pin Name I/O Description
44 A0 I
45 A1 I
Address signal input from the CPU (IC701)
46 A2 I
47 REM CODE O
Remote category signal output terminal    “L”:CD2    “H”:CD1
48 — I
Not used (open)
49 NC —
Not used (open)
50 — I
Not used (open)
51 — O
Not used (open)
52 DF INIT O
Initial signal output to the digital filter (IC301)
53 MODE O
SACD/CD mode signal output to the digital filter (IC301)
54 A FILE O
Filter signal output terminal
55 VSS —
Ground terminal
56 VDD —
Power supply terminal (+5V)
57 A MUTE O
Audio mute signal output terminal    “L”:mute
58 XLR ON O
Balance signal output terminal
59 ADS LT O
Not used (open)
60 DCMF INIT O
Not used (open)
61 DOCTRL O
Digital control signal output to the select switch (IC732)
62 AK0 O
Monitor signal output to the CPU (IC701)
63 NC —
Not used (open)
64 NC —
Not used (open) 
						

							48
· MAIN BOARD  IC712  CXD1095R (EXPANDER)
Pin No. Pin Name I/O Description
1 STBL DTC I
Stabilizer detect signal input from the stabilizer detect sensor (IC009)
2—I
Not used (open)
3—I
Not used (open)
4 LD SW1 I
Loading panel close signal input from the close switch (S004)
5 LD SW0 I
Loading panel open signal input from the open switch (S003)
6 SLD SW1 I
Sled motor (out) signal input from the out switch (S001)
7 SLD SW0 I
Sled motor (in) signal input from the in switch (S001)
8 VSS —
Ground terminal
9 LOAD O
Load signal output to the loading motor drive (IC515)
10 UNLOAD O
Unload signal output to the loading motor drive (IC515)
11 STBL DRV O
Stabilizer drive signal output terminal
12 SPCTL1 O
Spindle motor control signal output to spindle motor drive (IC501)
13 SPCTL0 O
Spindle motor control signal output terminal    Not used (open)
14 SPGC2 O
Spindle motor control signal output to spindle motor drive (IC501)
15 SPGC1 O
Spindle motor control signal output to spindle motor drive (IC501)
16 PIHG O
PIHG signal output terminal    Not used (open)
17 NC —
Not used (open)
18 SRVRST O
Servo reset signal output to the servo digital signal processor (IC512)
19 PISEL O
PI select signal output terminal
20 TEAGC0 O
Tracking error signal output terminal
21 TEAGC1 O
Tracking error signal output terminal
22 ERROR I
Error signal input from the servo digital signal processor (IC512)
23 VSS —
Ground terminal
24 VDD —
Power supply terminal (+5V)
25 FON I
FON signal input from the servo digital signal processor (IC512)
26 TIUNLK I
Tilt motor control signal input from the tilt motor drive (IC505)
27 — I
Not used (open)
28 D0 I/O
29 D1 I/O
Two-way data bus with the CPU (IC701)
30 D2 I/O
31 NC —
Not used (open)
32 NC —
Not used (open)
33 D3 I/O
34 D4 I/O
35 D5 I/O
Two-way data bus with the CPU (IC701)
36 D6 I/O
37 D7 I/O
38 XCLR I
Clear signal input terminal (pull up)
39 XDIS I
Reset signal input from the ARP (IC702)
40 VSS —
Ground terminal
41 XWR I
Strobe signal input from the CPU (IC701)
42 XRD I
Strobe signal input from the CPU (IC701)
43 XCS I
Chip enable signal input from the CPU (IC701)
44 A0 I
45 A1 I
Address signal input from the CPU (IC701)
46 A2 I 
						

							49
Pin No. Pin Name I/O Description
47 — I
Not used (open)
48 — I
Not used (open)
49 NC —
Not used (open)
50 FCSDWN I/O
Two-way data bus with the SACD/CD RF AMP (IC001)
51 SDPREK O
SDPREK signal output to the sled motor drive (IC503)
52 SACDLDON O
Load signal output to the SACD/CD RF AMP (IC001)
53 TILT OUT O
Tilt out signal output to the tilt motor drive (IC505)
54 A ERR O
Not used (open)
55 VSS —
Ground terminal
56 VDD —
Power supply terminal (+5V)
57 TILT/H O
Tilt error signal output to the tilt error AMP (IC004)
58 SLDDLY O
SLDDLY signal output to the sled motor drive (IC503)
59 SDEN O
SDEN signal output to the SACD/CD RF AMP (IC001)
60 SL MUTE O
Mute signal output to the sled motor drive (IC503)
61 LM MUTE O
Mute signal output terminal    Not used (open)
62 CHUCK I
Not used (open)
63 NC —
Not used (open)
64 NC —
Not used (open) 
						

							50
(1) GENERAL  (SCD-1)
SECTION  8
EXPLODED  VIEWS
Les composants identifiŽs par une
marque 0 sont critiquens pour la
sŽcuritŽ.

portant le numŽro spŽcifiŽ. The components identified by
mark 0 or dotted line with mark
0 are critical for safety.
Replace only with part number
specified. ¥ Items marked Ò*Ó are not stocked since they
are seldom required for routine service. Some
delay should be anticipated when ordering
these items.
¥ The mechanical parts with no reference num-
ber in the exploded views are not supplied.
¥ Hardware (# mark) list and accessories and
packing materials are given in the last of the
electrical parts list. NOTE:
¥ -XX and -X mean standardized parts, so they
may have some difference from the original
one.
¥ Color Indication of Appearance Parts
Example:
KNOB, BALANCE (WHITE) . . . (RED)
­­
Parts Color Cabinets Color
Ref. No.Part No.DescriptionRemarkRef. No.Part No.DescriptionRemark
1 4-215-794-01 PLATE (L), SIDE
2 X-4951-357-1 PANEL (LOADING) ASSY
3 4-218-606-01 CUSHION (LD)
4 4-216-860-01 EMBLEM (SACD)
5 4-216-431-01 BOLT (M5X10), HEXAGON SOCKET6 4-216-429-01 BOLT (M4X8), HEXAGON SOCKET
7 4-215-795-01 PLATE (R), SIDE
*8 2-127-516-01 TAPE (TV LOCK HANDLE)
9 4-968-977-11 SCREW (3X10), +BVTP
10 4-218-606-11 CUSHION (LD)
5
46
3
2106
1
8
897
#2#2
#2
#1
#1not supplied not supplied
not
supplied not
supplied
front panel section
#2#2#2 loading assy section