Nintendo 8 Bit Manual

 
 
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5 - Input Devices 
 
5.1 Control Pad 
 
The 6502 used memory mapped I/O (input/output). This means that the same instructions 
and bus are used to communicate with I/O devices as with memory, that writing to a specific 
memory location writes to the appropriate device. In the NES, the I/O ports for input devices 
were $4016 and $4017 (see Appendix B). 
 
The original NES used a rectangular control pad as shown in figure 5-1. The pad featured 
four buttons, A, B, Start and Select as well as a...

 
 
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Figure 5-2. Original NES Zapper light-gun [45]. 
 
“The Zapper works by receiving the light from the screen. The contrast and 
brightness controls of the TV must be adjusted properly or the shots may not 
register. (The characters should be as bright as possible while the background 
areas should be as dark as possible.)” 
 
The above description of how the Zapper works is taken from the light-guns manual as 
quoted in [44]. Essentially, the Zapper works by measuring the intensity of the light...

 
 
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Appendix A 
Arithmetic And Logic 
 
A.1 Numbering Systems 
 
The hexadecimal number system uses base 16 with digits 0-9 and A-F, where A represents 
10 and F represents 15. The hexadecimal system is used frequently throughout this 
document and any numbers written in this format will be indicated by use of the prefixes $ 
and 0x (used interchangeably). For example, $2F = (2 * 16) + 15 = 47. 
 
The binary number system uses base 2 with digits 0 and 1. This system is also frequently 
used and any...

 
 
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Appendix B 
NES I/O Registers 
 
The following information is based on [7]: 
 
Address Access Level Description 
$2000  Write  PPU Control Register 1: 
 
•  Bits 0-1 - Name table address, changes between the four 
name tables at $2000 (0), $2400 (1), $2800 (2) and $2C00 
(3). 
•  Bit 2 - Specifies amount to increment address by, either 1 if 
this is 0 or 32 if this is 1. 
•  Bit 3 - Identifies which pattern table sprites are stored in, 
either $0000 (0) or $1000 (1). 
•  Bit 4 - Identifies which...

 
 
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$2006  Write  VRAM Address Register 2. 
$2007  Read / Write  VRAM I/O Register: 
 
Reads or writes a byte from VRAM at the current address. 
$4000  Write  pAPU Pulse 1 Control Register. 
$4001  Write  pAPU Pulse 1 Ramp Control Register. 
$4002  Write  pAPU Pulse 1 Fine Tune (FT) Register. 
$4003  Write  pAPU Pulse 1 Coarse Tune (CT) Register. 
$4004  Write  pAPU Pulse 2 Control Register. 
$4005  Write  pAPU Pulse 2 Ramp Control Register. 
$4006  Write  pAPU Pulse 2 Fine Tune Register. 
$4007...

 
 
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Appendix C 
iNES Mapper Numbers 
 
The following mapper numbers are based on [9]: 
 
iNES Mapper Number  Mapper Name 
0 NROM, no mapper 
1 Nintendo MMC1 
2 UNROM switch 
3 CNROM switch 
4 Nintendo MMC3 
5 Nintendo MMC5 
6 FFE F4xxx 
7 AOROM switch 
8 FFE F3xxx 
9 Nintendo MMC2 
10 Nintendo MMC4 
11 ColorDreams chip 
12 FFE F6xxx 
15 100-in-1 switch 
16 Bandai chip 
17 FFE F8xxx 
18 Jaleco SS8806 chip 
19  Namcot 106 chip 
20 Nintendo DiskSystem 
21 Konami VRC4a 
22 Konami VRC2a 
23 Konami VRC2a...

 
 
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Appendix D 
Memory Mapper Functions 
 
The information in this section is based on [6] with additional information about MMC1 from 
[46]. 
 
D.1 UNROM Switch 
 
Address Data 
$8000-$FFFF  16 KB PRG-ROM bank number to load into $8000. 
 
On reset, the first PRG-ROM bank is loaded into $8000 and the last PRG-ROM bank is 
loaded into $C000. Switching is only allowed for the bank at $8000, the one at $C000 is 
permanently assigned to that location. Since this mapper has no support for VROM, games...

 
 
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•  Bit 7 - Set to 1 to reset register. 
$C000-$DFFF Register 2: 
 
•  Bits 0-3 - VROM bank number to load into PPU $1000. If bit 4 of 
register 0 is set, this will be 4 KB banks n and (n + 1) where n is the 
value of bits 0-3, otherwise it is ignored. 
•  Bit 4 - 256 KB selection register 1. Stores the high bit of 256 KB PRG-
ROM selection in 1024 KB cartridges. 
•  Bit 7 - Set to 1 to reset register. 
$E000-$FFFF Register 3: 
 
•  Bits 0-3 - PRG-ROM bank number to load into memory. If bit 3 of...

 
 
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Appendix E 
6502 Addressing Modes 
 
E.1 Zero Page 
 
Zero page addressing uses a single operand which serves as a pointer to an address in zero 
page ($0000-$00FF) where the data to be operated on can be found. By using zero page 
addressing, only one byte is needed for the operand, so the instruction is shorter and, 
therefore, faster to execute than with addressing modes which take two operands. An 
example of a zero page instruction is AND $12. 
 
 
 
Figure E-1. Zero page addressing.  
 
E.2...

 
 
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Figure E-2. Indexed zero page addressing. 
 
E.3 Absolute 
 
In absolute addressing, the address of the data to operate on is specified by the two 
operands supplied, least significant byte first. An example of an absolute instruction is AND 
$1234. 
 
 
 
Figure E-3. Absolute addressing.