Motorola Gp328 Gp338 Detailed 6804110j64 F Manual
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Transmitter6E-53.1.2 Antenna SwitchThe antenna switch circuit consists of two pin diodes (D100 and D101), a RF network (C147 and L103), and a DC feed network (L104, C144 and current limiting resistor R101). In the transmit mode, PCIC (U102) pin 32 goes high supplying current via the feed network to bias the diodes “on”. The shunt diode (D101) shorts out the receiver port and L103 is connected from the RF path to ground. L103 and the input capacitance of the lowpass filter form a parallel resonant circuit, effectively disconnecting the receiver port from the antenna while not loading the transmit path. In the receive mode, pin 32 goes low and the.the diodes are off. D100 looks like a high impedance disconnecting the transmitter from the antenna while L103 and C147 form a series resonant circuit to connect the receiver to the antenna.3.1.3 Harmonic FilterThe harmonic filter consists of components C103, C106, C107,C110, C111, C114, C115 and 3 inductors which are a part of the SH100 assembly. The harmonic filter for lowband is pole zero design which give greater attenuation lower in frequency where the harmonic energy of the transmitter is the greatest and less attenuation high in frequency where there is less harmonic energy. The harmonic filter insertion loss is typically less than 0.8 dB3.1.4 Antenna Matching NetworkThe antenna matching network (T100) matches the antennas impedance with the harmonic filter to optimize the performance of the transmitter and receiver.3.1.5 Power Control Integrated Circuit (PCIC)The transmitter uses the PCIC (U102) to regulate the power output of the radio. To accomplish this, the voltage across R102 is sensed. This voltage drop is directly proportional to the current drawn in the final stage of the transmitter. This voltage is compared to a programmable reference inside the PCIC and the voltage on PCIC pin 4 adjusted. Pin 4 connects to the PA driver IC (U101) pin 1 via resistor R100 and varies RF output power of the driver. This controls the current drain of the final stage and sets the output power.3.1.6 Temperature Cut Back CircuitTemperature sensor VR101 and associated components are part of a temperature cut back circuit. This circuit senses the printed circuit board temperature around the transmitter circuits and outputs a DC voltage to the PCIC. If the DC voltage produced exceeds the set threshold of the PCIC, the transmitter output power decreases to reduce the transmitter temperature.
6E-6Receiver4.0 Receiver4.1 Receiver Front-EndThe RF signal received by the antenna is routed through the transmitter lowpass filter and antenna switch. These circuits are described in the transmitter section.The signal next passes through a highpass filter consisting of L501, L502, C538, C533 and C504. This filter serves to reject below band signals and has a 3 dB corner frequency of 27 MHz. The output of the highpass filter is connected to an RF amp consisting of Q509 and associated biasing components. This is a BJT amplifier powered off 5 volts and has 13 dB of gain. The amplifier drives a lowpass filter consisting of L503, L504 L507, C534, C535, C536, C537 and C515. This filter is a pole zero design that filters off harmonic components from the RF amp. The 3 dB corner of this filter is at 56 MHz. The output of the lowpass filter is connected to the passive double balanced mixer consisting of components T501, T502, and D501. After mixing with the first local oscillator up-converted to a 109.65 MHz IF signal. The IF signal coming out of the mixer is transferred to the crystal filter (FL301) through a resistor pad (R507, R508 and R509) and a diplexer (C516 and L508). Matching to the input of the crystal filter is provided by L301, L302, C301 and C302. The 3 pole crystal filter provides the necessary selectivity and intermodulation protection.Figure 6-2: Lowband Receiver Block DiagramDemodulator SynthesizerCrystal Filter Mixer Lowpass Filter RF Amp Highpass Filter Antenna Switch RF Antenna First LO from FGU Recovered Audio Squelch RSSI SPI Bus 17.0 MHz Reference Clock Second LO VCOJackLowpass FilterIF AmpAGC ProcessingIF IC U303
Receiver6E-74.2 Receiver Back-EndThe output of crystal filter FL301 is connected to the input of IF amplifier transistor U301. Components L303 and C348 and R301 form the termination for the crystal filter and the signal is coupled to one gate of U301 by C303. The IF amplifier is a dual gate MOSFET powered off of the 5 volt supply. The first gate receives the IF signal as indicated previously. The second gate receives a DC voltage from U302 which serves as an AGC control signal. This signal reduces the gain of the IF amplifier to prevent overload of the IF IC, U303. The gain can be varied from a maximum of 13 dB to an attenuation of 55 dB. The output IF signal from U301 is coupled into U303 (pin 3) via C306, R304 and L304 which provides matching for the IF amplifier and U303. The IF signal applied to pin 3 of U303 is amplified, down-converted, filtered, and demodulated, to produce recovered audio at pin 27 of U303. This IF IC is electronically programmable, and the amount of filtering, which is dependent on the radio channel spacing, is controlled by the microprocessor. Additional filtering, once externally provided by the conventional ceramic filters, is replaced by internal filters in IF IC U303. The IF IC uses a type of direct conversion process, whereby the externally generated second LO frequency is divided by two in U303 so that it is very close to the first IF frequency. The IF IC (U303) synthesizes the second LO and phase-locks the VCO to track the first IF frequency. The second LO is designed to oscillate at twice the first IF frequency because of the divide-by-two function in the IF IC. In the absence of an IF signal, the VCO searches for a frequency, or its frequency will vary close to twice the IF frequency. When an IF signal is received, the VCO locks onto the IF signal. The second LO/VCO is a Colpitts oscillator built around transistor Q301. The VCO has a varactor diode, CR301, to adjust the VCO frequency. The control signal for the varactor is derived from a loop filter consisting of components C308, C309, and R310. The IF IC (U303) also performs several other functions. It provides a received signal-strength indicator (RSSI) and a squelch output. The RSSI voltage is also used to control the automatic gain control (AGC) circuit at the back end. The demodulated signal on pin 27 of U303 is also used for squelch control. The signal is routed to U404 (ASFIC) where squelch signal shaping and detection takes place. The demodulated audio signal is also routed to U404 for processing before going to the audio amplifier for amplification.4.3 Automatic Gain Control CircuitThe automatic gain control circuit provides automatic reduction of gain to prevent overloading of backend circuits. This is achieved by lowering the voltage on one gate of U301 which will reduce the drain current in that part and lower its gain. The Radio Signal Strength Indicator (RSS I) voltage signal for the IF IC (U303) is used to drive the AGC processing circuitry consisting of R306, R307, R308, R309 C307 and U302. As the received signal gets stronger, the RSSI line will rise. When the RSSI line passes a certain threshold, the voltage at the output of U302 will begin to drop. This voltage is connected to one gate of IF amplifier U301 through resistor R305. As this voltage decreases, it will lower the drain current in U301 and reduce the gain of the stage. This will limit the power incident on the IF IC, U303.
6E-8Frequency Generation Circuitry5.0 Frequency Generation CircuitryThe frequency generation circuit, shown in Figure 6-3 , is composed of Low Voltage Fractional-N synthesizer U205 and discrete RX VCO, TX VCO.and buffers as well other supporting circuitry. The synthesizer block diagram illustrates the interconnect and support circuitry used in the region. Refer to the schematic for the reference designators. The synthesizer is powered by regulated 5V and 3.3V. The 5 volt signal to the synthesizer as well as the rest of the radio is provided by U204. The 3.3 v signal is provided from U400 in the controller. The 5V signal goes to pins 13 and 30 while the 3.3V signal goes to pins 5, 20, 34 and 36 of U201. The synthesizer in turn generates a superfiltered 4.3V which powers the VCOs and buffers. In addition to the VCO, the synthesizer also interfaces with the logic and ASFIC circuitry. Programming for the synthesizer is accomplished through the data, clock and chip select lines (pins 7, 8 and 9) from the microprocessor, U409. A 3.3V dc signal from pin 4 indicates to the microprocessor that the synthesizer is locked. Transmit modulation from the ASFIC is supplied to pin10 of U205. Internally the audio is digitized by the Fractional-N and applied to the loop divider to provide the low-port modulation. The audio runs through an internal attenuator for modulation balancing purposes before going out at pin 41 to the VCO.Figure 6-3: Lowband Frequency Generation Unit Block DiagramVoltage MultiplierSynthesizer U205Loop FilterTo Mixer To PA DriverVCPAux2 Aux3 MOD Out Modulating Signal Indmult 17.0 MHz Ref. Osc.Switching NetworkVSFPrescalar inputTX VCO RX VCO Buffer
Frequency Generation Circuitry6E-95.1 SynthesizerThe Fractional-N synthesizer, shown in Figure 6-4, uses a 17.0 MHz crystal (Y201) to provide a reference for the system. Along with being used in the LVFracN, the 17.0 MHz signal is provided at pin19ofU205forusebytheASFICandLVZIF. The LVFractN IC (U205) further divides this by 8 internally to give 2.125 MHz to be used as the reference frequency in the frequency synthesis. While UHF and VHF can use other references, (divide by 7 or divide by 7/8), only the divide by 8 function is valid for lowband. The internal oscillator device in the LVFracN together with C236, C237, C242, R219, CR211and Y201 comprise the reference oscillator. This oscillator is temperature compensated is capable of 2.5 ppm stability over temperatures of -30 to 85°C. There is temperature compensation information that is unique to each crystal contained on Y201 that is programmed into the radio when built. The loop filter consists of components C256, C257, C259, R224, R225 and R228. This circuit provides the necessary dc steering voltage for the VCO and determines the amount of noise and spur passing through. To achieve fast locking for the synthesizer, an internal adapt charge pump provides higher current at pin 45 of U205 to put the synthesizer within lock range. The required frequency is then locked by normal mode charge pump at pin 43. Both the normal and adapt charge pumps get their supply from the inductive voltage multiplier made up of C240, C246, C247, C249, D201, and L223. This circuit provides 13.3V at pin 47 of U205.Figure 6-4: Lowband Synthesizer Block DiagramDATA CLK CEX MODIN VCC,DC5V XTAL1 XTAL2 WARP PREIN VCPREFERENCE OSCILLATORVOLTAGE MULTIPLIERVOLTAGE CONTROLLED OSCILLATORS2-POLE LOOP FILTERDATA (U409 PIN 100) CLOCK (U409 PIN 1) CSX (U409 PIN 2) MOD IN (U404 PIN 40) +5V (U204 PIN 4)7 8 9 10 13, 30 23 24 25 32 47 INDMULTBIAS1 SFOUTAUX3 AUX2 IADAPTIOUTGND FREFOUTLOCK4 19 6, 17, 22, 29, 31, 33, 44 43 45 1 2 28 1640FILTERED 4.3VSTEERING LINE LOCK (U409 PIN 56) PRESCALER INLO RF INJECTION TX RF INJECTION (FIRST STAGE OF PA) FREF (U303 PIN 21 & U404 PIN 34)39 BIAS241SWITCHING NETWORK 5, 20, 34, 36 (U400 PIN 1) VDD,3.3VMODOUT U205 LOW VOLTAGE FRACTIONAL-N SYNTHESIZER
6E-10Frequency Generation Circuitry5.2 VCO - Voltage Controlled Oscillator 5.2.1 Receive VCOThe receive VCO is a Colpitts type design and using two active devices in parallel, Q202 and Q204. The oscillator is powered off of the 4.3 volt super filter supply when the AUX3 line goes low. The oscillator operates from 139 to 160 MHz, and the frequency is tuned by varactor diodes CR201 and CR202.5.2.2 Transmit VCOThe transmit VCO is a Hartley type design with active devices Q203. The oscillator is powered off of the 4.3 volt super filter supply when the AUX2 line goes low. The oscillator operates from 29.7 to 42 MHz for Range 1 and 35 to 50 MHz for Range 2. The frequency is tuned by varactor diodes in U203. Note that the values of the inductive tap, L208 and L209, and the capacitor C215 which couples the varactor to the oscillator tank vary between the ranges.5.2.3 BufferBoth the receive and transmit VCO are fed to a buffer amplifier Q201. This is a BJT amplifier that boosts the signal levels to +4 dBm and provides reverse isolation to the oscillators. The amplifier is powered off the 4.3 volt super filter supply and the feed network is combined with the transmit filter.5.2.4 Diplexer and Output FiltersThe output of the buffer drives a pair of parallel filters. One filter is a lowpass filter in the TX pass that passes 29.7 - 50 MHz signals for the transmitter into the power amplifier while rejecting the receive LO injection signals at 139 - 160 MHz. This filter is comprised of L204, L211, L212, C230 and C231. The other filter is a highpass filter which passes 139 - 160 MHz signals for the receive LO into the mixer while rejecting the transmit injection signals at 29.7 -50 MHz. This filter is comprised of C228,C229,C235 and L215.5.2.5 Prescalar FeedbackThe prescalar input signal for receive and transmit is tapped off of the outputs of each filter by resistors R234 and R238. This signal is routed to U205 pin 32. After frequency comparison in the synthesizer, current is transferred in the loop filter and a control voltage is generated at the output of the loop filter to adjust the frequency of the VCO. This voltage is a DC voltage between 3.5V and 9.5V when the PLL is locked on frequency.
Notes For All Schematics and Circuit Boards 6E-116.0 Notes For All Schematics and Circuit Boards* Component is frequency sensitive. Refer to the Electrical Parts List for value and usage. 1.Unless otherwise stated, resistances are in Ohms (k = 1000), and capacitances are in picofarads (pF) or microfarads (µF). 2.DC voltages are measured from point indicated to chassis ground using a Motorola DC multime- ter or equivalent. Transmitter measurements should be made with a 1.2 µH choke in series with the voltage probe to prevent circuit loading. 3.Reference Designators are assigned in the following manner: 100 Series = Transmitter 200 Series = Frequency Generation 300 Series = Receiver 400/500 Series = Controller 600 Series = Keypad Board 4.Interconnect Tie Point Legend: UNSWB+ = Unswitch Battery Voltage (7.5V) SWB+ = Switch Battery Voltage (7.5V) R5 = Receiver Five Volts CLK = Clock Vdda = Regulated 3.3 Volts (for analog) Vddd = Regulated 3.3 Volts (for digital) CSX = Chip Select Line (not for LVZIF) SYN = Synthesizer DACRX = Digital to Analog Voltage (For Receiver Front End Filter) VSF = Voltage Super Filtered (5 volts) VR = Voltage Regulator 6-LAYER CIRCUIT BOARD DETAIL VIEWING COPPER STEPS IN PROPER LAYER SEQUENCELAYER 1 (L1) LAYER 2 (L2) LAYER 3 (L3) LAYER 4 (L4) LAYER 5 (L5) LAYER 6 (L6)INNER LAYERS SIDE 1 SIDE 2
Circuit Board/Schematic Diagrams and Parts List6E-137.0 Circuit Board/Schematic Diagrams and Parts List B503B504 C103 C106 C107 C110 C111 C114C115C118C119 C120 C121C122 C123 C130C136 C144 C145C147 C148 C149 C201C202C203C206 C218 C219C220 C223 C224 C228 C229 C232C233 C234 C235C237 C247 C249C260 C263 C283 C284C285 C286 C287 C301C302 C303 C304 C305 C306 C308 C309 C310 C311 C312 C313C314 C315C316 C317C348 C400 C401 C402 C403 C404 C406C423 C424 C425 C426 C427C428C429 C432 C438 C440 C441 C443 C444 C467 C471 C472 C473 C480C482 C490 C491 C492 C493C494 C495C496C497 C500 C502 C505 C511C512C513 C514 C515 C516 C522 C534 C535 C536 C537 CR201 CR202CR211 CR301 CR412 CR413 CR440 CR502 4 3 2 CR503 D100 D101 D210 D211 D501 E407 E408 E409 5 64 3 2 1 FL301 1 40 J40022201 21J403 L100 L101 L102 L103 L104 L105 L106 L107 L110 L201 L202 L203L210 L226L301 L302 L303 L304L306L308 L400L401 L503 L504L507 L508PB501 PB502 PB503 PB504 PB505 12 3Q100 Q201Q202 Q204 Q288 Q301 Q400 Q403 43 Q405 4 3 Q411 4 3 Q417 Q510 R104 R105 R106 R112 R203 R227 R229 R230R233R235 R237 R285 R286R287 R288R289 R301 R302 R303 R304R305 R310 R312R314 R315 R316 R317 R401 R402 R403R405 R406 R407R408 R410R416R418 R421R427R428 R429 R435 R436 R437 R446 R447 R448 R450 R476 R477R478 R481 R492 R499R501 R502 R507 R508 R509 R510 R514 R515 RT400 SH100 SH200 SH203SH301 SH302 SH303 SH400 SH401SH501 SH502 2 1 54 3 T100 64 3T501 64 3T502 TP201 TP401 TP402 TP405TP406 TP410 TP415TP500TR201 1 168 9 U101 U204 U301 4 58 U400 2221 8 7 1 U405 32 17 16 1 U406 VIEWED FROM SIDE 1 1 4 5 8 U407 VR102 VR434VR447VR449 VR450VR500 VR501 VR502 64 3 1 Y201 FL0830474O Lowband 29-42/35-50MHz Main Board Top Side PCB No. 8486291A02 http://www.myradio168.name
6E-14Circuit Board/Schematic Diagrams and Parts List C108 C117 C124 C125 C126 C127 C128 C129 C131 C132 C133 C134 C135 C137 C138 C139 C140 C141C142 C143C146 C204 C205 C214 C215 C216 C221 C222 C225 C226 C227 C230 C231 C236C242 C255 C256 C257 C258C259C261C280 C281C297 C298 C299 C307 C319 C320 C321 C323 C324 C325 C326 C327 C328 C330 C331 C332 C333 C334 C335 C336C337 C339 C340 C341 C342C343 C405 C407 C408 C409 C410 C411 C412 C414 C415 C416 C419 C420 C421 C422 C430 C431 C433C434 C435C436 C437 C442 C445 C447C448 C449 C450 C451 C452 C453 C456 C458 C459C463C466 C475 C476 C479 C481 C503 C504 C506 C507 C533 C538 CR200 CR203 CR204 CR411 D502 E100E400 E401 E402 E403 E404E405 E406 F13 FL401 3 2 1 J1 1 2 3 4 J1014 J102 L108 L109 L200 L204 L207 L208 L209 L211 L212L215 L225 L305L307 L410 L411 L501L502 M100 M101 M202 M300M301 M400 M401 Q203 43 Q410 Q416 Q509 R101 R102 R103 R107R108 R109 R110 R111 R113 R114 R115 R116 R117 R118R119 R204 R206R219 R222 R223 R224 R225 R228 R231 R232 R234R236 R238R239 R306R307R308 R309 R318 R400R409 R411 R413R414 R415 R419 R420 R423 R424 R425 R426 R431 R432 R434R445 R449 R457 R460 R461R462R463 R471 R472 R473 R475 R503 R504 R505 R512 R513 2 C8 C 4 S501 4 5 32 S502 VIEWED FROM SIDE 2 SH201 SH202 SH300 SH402 SH403 SH500 TP100 TP200 1 17 925 U102U200 5 8 1 4 U203 13 1224 25 3736 48 1 U205 U207 U302 13 12 24 25 37 36 481 U303 13 1224 25 3736 48 1 U404 1 76 5126 U409 U410 11 1 20 10 U420 VR101 VR200VR201 VR202 VR203 VR432 VR433 VR445 VR446 VR448FL0830475O Lowband 29-42/35-50MHz Main Board Bottom Side PCB No. 8486291A02 http://www.myradio168.name