Motorola Cdm And Pro Series Detailed 68p81091c63 O Manual

Theory of Operation2-17
2.3.6.3  Voice Storage Option
The Voice Storage (VS) option can be used to store audio signals coming from the receiver or from 
the microphone. Any stored audio signal can be played back over the radio’s speaker or sent out via 
the radio’s transmitter.
The Voice Storage option can by placed on the controller section or on an additional option board 
which resides on option board connector J0551. Voice Storage IC U0301 provides all required 
functionality and is powered from 3.3...

2-18Theory of Operation
Figure 2-7.   UHF Receiver Block Diagram
The 2-pole 44.85 MHz crystal filters in the 1st IF section and two pairs of 455 kHz ceramic filters in 
the 2nd IF section provide the required adjacent channel selectivity. The correct pair of ceramic filters 
for 12.5 or 25 kHz channel spacing is selected via control line BWSELECT. The 2nd IF at 455 kHz is 
mixed, amplified, and demodulated in the IF IC. The processing of the demodulated audio signal is 
performed by an audio processing...

Theory of Operation2-19
2.4.1 Front-End Band-Pass Filters and Pre-Amplifier
The received signal from the radio’s antenna connector is first routed through the harmonic filter and 
antenna switch, which are par t of the RF power amplifier circuits, before being applied to the receiver 
pre-selector filter (C4001, C4002, D4001 and associated components). The 2-pole pre-selector filter 
tuned by the varactor diodes D4001 and D4002 pre-selects the incoming signal (RXIN) from the 
antenna switch to reduce...

2-20Theory of Operation
2.5 Transmitter Power Amplifier (PA) 40 W
The radio’s 40W power amplifier (PA) is a four stage amplifier used to amplify the output from the 
VCOBIC to the radio transmit level. It consists of the following four stages in the line-up. The first 
stage is a LDMOS predriver (U4401) that is controlled by pin 4 of PCIC (U4501) via Q4473 
(CNTLVLTG). It is followed by another LDMOS stage (Q4421), an LDMOS stage (Q4431), and a 
bipolar final stage (Q4441).
Figure 2-8.   UHF Transmitter...

Theory of Operation2-21
2.5.3 Driver Stage
The following stage is an enhancement-mode N-Channel MOSFET device (Q4431) providing a gain 
of 10dB. This device also requires a positive gate bias and a quiescent current flow for proper 
operation. The voltage of the line Bias_2_UHF_PA_1 is set in transmit mode by the ASFIC and fed to 
the gate of Q4431 via the resistive network R4630, R4631, and R4632. This bias voltage is also 
tuned in the factory. If the transistor is replaced, the bias voltage must be...

2-22Theory of Operation
The PCIC provides a dc output voltage at pin 4 (INT) and applied as CNTLVLTG to the power-adjust 
input pin of the first transmitter stage U4401. This adjusts the transmitter power output to the 
intended value. Variations in forward or reflected transmitter power cause the dc voltage at pin 1 to 
change, and the PCIC adjusts the control voltage above or below its nominal value to raise or lower 
output power.
Capacitors C4502-4, in conjunction with resistors and integrators...

Theory of Operation2-23
Figure 2-9.   UHF Synthesizer Block Diagram
Output LOCK (U4201-4) provides information about the lock status of the synthesizer loop. A high 
level at this output indicates a stable loop. IC U4201 provides the 16.8 MHz reference frequency at 
pin 19.
The serial interface (SRL) is connected to the µP via the data line DATA (U4201-7), clock line CLK 
(U4201-8), and chip enable line CSX (U4201-9).
2.6.3 Voltage Controlled Oscillator (VCO)
The Voltage Controlled Oscillator (VCO)...

2-24Theory of Operation
A steering line voltage (VCTRL) between 3.0V and 10.0V at varactor diode CR4311 will tune the full 
TX frequency range (TXINJ) from 403 MHz to 470 MHz, and at varactor diodes CR4301, CR4302 
and CR4303 will tune the full RX frequency range (RXINJ) from 358 MHz to 425 MHz. The tank 
circuits uses the Hartley configuration for wider bandwidth. For the RX tank circuit, an external 
transistor Q4301 is used in conjunction with the internal transistor for better side-band noise.
Figure...

Theory of Operation2-25
2.6.4 Synthesizer Operation
The complete synthesizer subsystem comprises mainly of a low voltage FRAC-N (LVFRACN) IC, 
Reference Oscillator (crystal oscillator with temperature compensation), charge pump circuits, loop 
filter circuits, and dc supply. The output signal (PRESC_OUT) of the VCOBIC (U4301, pin12) is fed 
to of U4201, pin 32 (PREIN) via a low pass filter (C4229,L4225,C4226) which attenuates harmonics 
and provides correct level to close the synthesizer loop.
The...

2-26Theory of Operation
2.7 VHF (136-174MHz) Receiver Front-End
The receiver is able to cover the VHF range from 136 to 174 MHz. It consists of four major blocks: 
front-end bandpass filters and pre-amplifier, first mixer, 1st IF, 2nd IF, and receiver back-end. Two 
varactor-tuned bandpass filters perform antenna signal pre-selection. A cross over quad diode mixer 
conver ts the signal to the first IF of 44.85 MHz. High-side injection is used.
Figure 2-11.   VHF Receiver Block Diagram
There are two...