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Motorola Astro Digitalport Saber Detailed 68p81076c10 A Manual

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    							4-6
    Notes 
    						
    							5-1
    VHF/UHF Transceiver Board 
    Detailed Theory of Operation
    5
    IntroductionThis section of the manual provides a detailed circuit description of an 
    ASTRO Digital SABER VHF and UHF Transceiver Board. When reading 
    the theory of operation, refer to your appropriate schematic and 
    component location diagrams located in the back section of this 
    manual. This detailed theory of operation will help isolate the 
    problem to a particular component. However, first use the ASTRO 
    Digital SABER Portable Radios Basic Service Manual to troubleshoot 
    the problem to a particular board.
    Frequency 
    Generation Unit 
    (FGU)The frequency generation unit (FGU) consists of three major sections: 
    the high stability reference oscillator (U203), the fractional-N 
    synthesizer (U204,) and the VCO buffer (U201). A 5V regulator (U202), 
    supplies power to the FGU. The synthesizer receives the 5V REG at 
    U204, and applies it to a filtering circuit within the module and 
    capacitor C253. The well-filtered 5-volt output at U204 pin 19 is 
    distributed to the TX and RX VCOs and the VCO buffer IC. The mixer 
    LO injection signal and transmit frequency are generated by the RX 
    VCO and TX VCO respectively. The RX VCO uses an external active 
    device (Q202), whereas the VHF TX VCO active device is a transistor 
    inside the VCO buffer. The UHF TX VCO uses two active devices, one 
    external (Q203) and the other internal to the VCO buffer. The base and 
    emitter connections of this internal transistor are pins 11 and 12 of 
    U201.
    The RX VCO is a Colpitts-type oscillator, with capacitors C235 and 
    C236 providing feedback. The RX VCO transistor (Q202) is turned on 
    when pin 38 of U204 switches from high to low. The RX VCO signal is 
    received by the VCO buffer at U201 pin 9, where it is amplified by a 
    buffer inside the IC. The amplified signal at pin 2 is routed through a 
    low-pass filter (L201 and associated capacitors) and injected as the first 
    LO signal into the mixer (U2 pin 8). In the VCO buffer, the RX VCO 
    signal (or the TX VCO signal during transmit) is also routed to an 
    internal prescaler buffer. The buffered output at U201 pin 16 is applied 
    to a low-pass filter (L205 and associated capacitors). After filtering, the 
    signal is routed to a prescaler divider in the synthesizer at U204 pin 21.
    The divide ratios for the prescaler circuits are determined from 
    information stored in a codeplug, which is part of the microcontrol 
    unit (U204 on the VOCON board). The microprocessor extracts data 
    for the division ratio as determined by the position of the channel-
    select switch (S902), and busses the signal to a comparator in the 
    synthesizer. A 16.8MHz reference oscillator, U203, applies the 
    16.8MHz signal to the synthesizer at U204 pin 14. The oscillator signal  
    						
    							5-2
    is divided into one of three pre-determined frequencies. A time-based 
    algorithm is used to generate the fractional-N ratio.
    If the two frequencies in the synthesizer’s comparator differ, a control 
    (error) voltage is produced. The phase detector error voltage (V 
    control) at pin 31 and 33 of U204, is applied to the loop filter 
    consisting of resistors R211, R212, and R213, and capacitors C244, 
    C246, C247 and C275. The filtered voltage alters the VCO frequency 
    until the correct frequency is synthesized. The phase detector gain is 
    set by components connected to U204 pins 28 and 29.
    In the TX mode, U204 pin 38 goes high and U201 pin 14 goes low, 
    which turns off transistor Q202 and turns on the internal TX VCO 
    transistor in U204 and the external TX VCO buffer Q203 on the UHF 
    circuit. The TX VCO feedback capacitors are C219 and C220. Varactor 
    diode CR203 sets the TX frequency while varactor CR202 is the TX 
    modulation varactor. The modulation of the carrier is achieved by 
    using a 2-port modulation technique. The modulation of low 
    frequency tones such as DPL/TPL is achieved by injecting the tones 
    into the A/D section of the fractional-N synthesizer. The digitized 
    signal is modulated by the fractional-N divider, generating the 
    required deviation. Modulation of the high frequency audio signals is 
    achieved by modulating the varactor (CR203) through a frequency 
    compensation network. Resistors R207 and R208 form a potential 
    divider for the higher frequency audio signals. 
     In order to cover the very wide bandwidths, positive and negative V-
    control voltages are used. High control voltages are achieved using 
    positive and negative multipliers. The positive voltage multiplier 
    circuit consists of components CR204, C256, C257 and reservoir 
    capacitor C258.The negative multiplier circuit consists of components 
    CR205, CR206, C266, C267 and reservoir capacitor C254 in VHF and 
    UHF radios. Out-of-phase clocks for the positive multiplier appear at 
    U204 pins 9 and 10. Out-of-phase clocks for the negative multiplier 
    appear at U204 pins 7 and 8, and only when the negative V-control is 
    required (i.e., when the VCO frequency exceeds the crossover 
    frequency). When the negative V-control is not required, transistor 
    Q201 is turned on, and capacitor C259 discharges. The 13V supply 
    generated by the positive multiplier is used to power-up the phase 
    detector circuitry. The negative V-control is applied to the anodes of 
    the VCO varactors. 
    The TX VCO signal is amplified by an internal buffer in U201, routed 
    through a low pass filter and routed to the TX PA module, U105 pin 1. 
    The TX and RX VCOs and buffers are activated via a control signal 
    from U204 pin 38. 
    The reference oscillator supplies a 16.8MHz clock to the synthesizer 
    where it is divided down to a 2.1MHz clock. This divided-down clock 
    is fed to the ABACUS IC (U401), where it is further processed for 
    internal use.  
    						
    							5-3
    Antenna SwitchTwo antenna switches are part of the radio circuitry. One of the 
    switches which is located in the radio casting is mechanical. It 
    switches between the radio antenna and a remote antenna. Switching 
    is accomplished by a plunger located on the accessory connector. With 
    a remote antenna installed, continuity between the radio antenna and 
    the RF input line is broken; continuity is made from the remote 
    antenna to the radio RF line. The second switch is a current device. It 
    is a pair of diodes (CR108/CR109) that electronically steer RF between 
    the receiver and the transmitter. In the transmit mode, RF is routed 
    through transmit switching diode CR108, and sent to the antenna. In 
    the receive mode, RF is received from the antenna, routed through 
    receive switching diode CR109, and applied to the RF amplifier, U1 
    (UHF), Q1 (VHF). In transmit, bias current, sourced from U101 pin 21, 
    is routed through L105, U104, CR108, and L122 in VHF and L105, 
    CR108, and L122 in UHF. Sinking of the bias current is through the 
    transmit ALC module, U101 pin 19. In the receive mode, bias current, 
    sourced from SB+, is routed through Q107 (pin 3 to pin 2), L123 (UHF), 
    L121, CR109, and L122. Sinking of the bias current is through the 5-
    volt regulator, U106 pin 8.
    Receiver Front EndThe RF signal is received by the antenna and coupled through the 
    external RF switch. The UHF board applies the RF signal to a low-pass 
    filter comprised of: L126, L127, L128, C149, C150, and C151. The VHF 
    board bypasses the lowpass filter. The filtered RF signal is passed 
    through the antenna switch (CR109) and applied to a bandpass filter 
    comprised of: VHF; L11 through L14, CR1 through CR9, C4, C2, and 
    C3, or UHF; L30, L31, L32, L34, L35, CR6 through CR9, C1, C2, and 
    C3. The bandpass filter is tuned by applying a control voltage to the 
    varactor diodes in the filter. (CR1-CR9 in VHF and CR6-CR9 in UHF.)
    The bandpass filter is electronically tuned by the D/A IC (U102) which 
    is controlled by the microcomputer.The D/A output range is extended 
    through the use of a current mirror, transistor Q108 and associated 
    resistors R115 and R116. When Q108 is turned on via R115, the D/A 
    output is reduced due to the voltage drop across R116. Depending on 
    the carrier frequency the microcomputer will turn on or off Q108. 
    Wideband operation of the filter is achieved by retuning the bandpass 
    filter across the band. 
    The output of the bandpass filter is applied to a wideband GaAs RF 
    amplifier IC, U1 (RF AMP) on the UHF transceiver board. The VHF 
    board uses an active device for RF amplification (Q1). After being 
    amplified by the RF AMP, the RF signal is further filtered by a 
    second broad-band, fixed-tuned, bandpass filter consisting of C6, C7, 
    C8, C80, C86, C87, C88, C97, C99, L3, L4, L5, and L30 (VHF); or C4 
    through C7, C88 through C94, C99, and L11 through L15 (UHF) to 
    improve the spurious rejection.
    Via a broadband 50-ohm transformer, T1, the filtered RF signal is 
    routed to the input of a broadband mixer/buffer (U2). Mixer U2 uses 
    GaAs FETs, in a double-balanced Gilbert Cell configuration. The RF 
    signal is applied to the mixer at U2 pins 1 and 15. An injection signal 
    (1st LO) of about -10dBm, supplied by the FGU, is applied to U2 pin 8. 
    Mixing of the RF and the 1st LO results in an output signal which is  
    						
    							5-4
    the first IF frequency. The first IF frequency of VHF and UHF bands are 
    45.15MHz and 73.35MHz respectively. The 1st LO signal for VHF is 
    45.15MHz higher than the carrier frequency while that for the UHF is 
    73.35MHz lower than the carrier frequency. The 1st IF signal output, 
    at U2 pins 4 and 6, is routed through transformer T2 and impedance 
    matching components, and applied to a 2-pole crystal filter (FL1), 
    which is the final stage of the receiver front end. The 2-pole crystal 
    filter removes unwanted mixer products. Impedance matching 
    between the output of the transformer (T2) and the input of the filter 
    (FL1) is accomplished by capacitor C605 and inductor L605 (VHF); or 
    C611, C614 and L605 (UHF).
    Receiver Back EndThe output of crystal filter FL1 is matched to the input of IF buffer 
    amplifier transistor Q601 by components C610 and L604 (VHF) and 
    C609, C610, and L600 (UHF). Transistor Q601 is biased by the 5V 
    regulator (U202). The IF frequency on the collector of Q601 is applied 
    to a second crystal filter through a matching circuit. The second crystal 
    filter (FL2) input is matched by C604, C603, and L601 (VHF); or C604, 
    L601, and L602 (UHF). The filter supplies further attenuation at the IF 
    sidebands to increase the radios selectivity. The output of FL2 routed 
    to pin 32 of U401 through a matching circuit which consists of L603, 
    L606, and C608 (VHF); or L603, C606, and C605 (UHF).
    In the ABACUS IC, (U401) the first IF frequency is amplified and then 
    down converted to 450kHz, the second IF frequency. At this point, the 
    analog signal is converted into two digital bit streams via a sigma-delta 
    A/D converter. The bit streams are then digitally filtered and mixed 
    down to baseband and filtered again. The differential output data 
    stream is then sent to the ADSIC (U406) on the VOCON board where 
    it is decoded to produce the recovered audio.
    The ABACUS IC (U401) is electronically programmable, and the 
    amount of filtering which is dependent on the radio channel spacing 
    and signal type is controlled by the microcomputer. Additional 
    filtering, which used to be provided externally by a conventional 
    ceramic filter, is replaced by internal digital filters in the ABACUS IC. 
    The ABACUS IC contains a feedback AGC circuit to expand the 
    dynamic range of the sigma-delta converter. The differential output 
    data contains the quadrature (I and Q) information in 16-bit words, 
    the AGC information in a 9-bit word, imbedded word sync 
    information and fill bits dependent on sampling speed. A fractional-n 
    synthesizer is also incorporated on the ABACUS IC for 2nd LO 
    generation.
    The 2nd LO/VCO is a Colpitts oscillator built around transistor Q401 
    (VHF) and Q1 (UHF). The VCO has a varactor diode, VR401 (VHF) and 
    CR5 (UHF), to adjust the VCO frequency. The control signal for the 
    varactor is derived from a loop filter consisting of C426, C428, and 
    R413.  
    						
    							5-5
    TransmitterThe transmitter consists of three major sections:
    •Harmonic Filter
    •RF Power Amplifier Module
    •ALC Circuits
    Harmonic FilterRF from the power amplifier (PA) module (U105) is routed through the 
    coupler (U104), passed through the transmit antenna switch (CR108), 
    and applied to a harmonic filtering network in UHF. In the case of a 
    VHF transceiver board, RF from the PA module (U105) is routed also 
    through the coupler (U104), then through the harmonic filtering 
    network, and on to the antenna switch (CR108). The harmonic 
    filtering circuit is comprised of the following components: L126, L127, 
    L128, C149, C150, and C151 (for VHF models); or L126, L127, L128,  
    C149, C150, and C151 (for UHF models). Resistor R128 (UHF) or R117 
    (VHF) provides a current limited 5V to J2 for mobile ASTRO vehicular 
    adapter (AVA) applications.
    RF Power Amplifier 
    ModuleThe RF power amplifier module (U105) is a wide-band multi-stage 
    amplifier (3 stages for the VHF models and 4 stages for the UHF 
    models). Nominal input and output impedance of U105 is 50 ohms. 
    The dc bias for U105 is on pins 2, 4, 5. In the transmit mode, the 
    voltage on U105 pins 2 and 4 (close to the B+ level) is obtained via 
    switching transistor Q101. Transistor Q101 receives its control base 
    signal as follows:
    •the microcomputer keys the D/A IC to produce a ready signal at 
    U102 pin 3
    •the ready signal at U102 pin 3 is applied to the TX ALC IC at U101 
    pin 14 (5V)
    •the synthesizer sends a LOC signal to the TX ALC IC (U204 pin 40 
    to U101 pin 16)
    When the LOC signal and the ready signal are both received, the TX 
    ALC IC (pin 13) sends a control signal to turn on transistor Q101.
    ALC CircuitsCoupler module U104 samples the forward power and the reverse 
    power of the PA output voltage. Reverse power is present when there 
    is other than 50 ohms impedance at the antenna port. Sampling is 
    achieved by coupling some of the forward and/or reverse power, and 
    apply it to CR102(VHF) or CR101(UHF) and CR103 for rectification 
    and summing. The resultant dc signal is then applied to the TX ALC 
    IC (U101 pin 2) as RFDET to be used as an RF strength indicator. 
    The transmit ALC circuit, built around U101, is the heart of the power 
    control loop. Circuits in the TX ALC module compare the signals at 
    U101 pins 2 and 7. The resultant signal, C BIAS, at U101 pin 4 is 
    applied to the base of transistor Q110. In response to the base drive, 
    transistor Q110 varies the dc control voltages applied to the RF PA at 
    U105 pin 3, thus controlling the RF power of module (U105).
    Thermistor RT101 senses the temperature of the TX ALC IC. If an 
    abnormal operating condition exists, which causes the PA slab 
    temperature to rise to an unacceptable level, the thermistor forces the 
    ALC to reduce the set power. 
    						
    							5-6
    Notes 
    						
    							6-1
    800MHz Transceiver Board 
    Detailed Theory of Operation
    6
    IntroductionThis section of the manual provides a detailed circuit description of an 
    ASTRO Digital SABER 800MHz Transceiver Board. When reading the 
    theory of operation, refer to your appropriate schematic and 
    component location diagrams located in the back section of this 
    manual. This detailed theory of operation will help isolate the 
    problem to a particular component. However, first use the ASTRO 
    Digital SABER Portable Radios Basic Service Manual to troubleshooting 
    the problem to a particular board.
    Frequency Synthesis The complete synthesizer subsystem consists of the reference oscillator 
    (U304), the voltage controlled oscillator (VCO), U307, a buffer IC 
    (U303), and the synthesizer (U302).
    The reference oscillator contains a temperature-compensated 
    16.8MHz crystal. This oscillator is digitally tuned and contains a 
    temperature-referenced 5-bit analog-to-digital (A/D) converter. The 
    output of the oscillator (pin 10 on U304) is applied to pin 14 (XTAL1) 
    on U302 via capacitor C309 and resistor R306.
    Module U307 is the voltage controlled oscillator, which is varactor 
    tuned. That is, as the voltage (2-11V) being applied to pins 1 and 7 of 
    the VCO varies, so does the varactor’s capacitance, thereby changing 
    the VCO’s output frequency. The 800MHz VCO is a dual-range 
    oscillator that covers the 806-825MHz and the 851-870MHz frequency 
    bands. The low-band VCO (777-825MHz) provides the first LO 
    injection frequencies (777-797MHz) that will be 73.35MHz below the 
    carrier frequency. In addition, when the radio is operated through a 
    repeater, the low-band VCO will generate the transmit frequencies 
    (806-825MHz) that will be 45MHz below the receiver frequencies. The 
    low-band VCO is selected by pulling pin 3 high and pin 8 low on 
    U307. When radio-to-radio or talk-around operation is necessary, the 
    high band VCO (851-870MHz) is selected. This is accomplished by 
    pulling pin 3 low and pin 8 high on U307.
    The buffer IC (U303) includes a TX, RX, and prescaler buffer whose 
    main purpose is to individually maintain a constant output and 
    provide isolation.The TX buffer is chosen by setting pin 7 of U303 
    high; the RX buffer is chosen by setting pin 7 of U303 low. The 
    prescaler buffer will always be on. In order to select the proper 
    combination of VCO and buffer, the following conditions must be true 
    at pin 6 of U303 (or pin 38 of U302) and pin 7 of U303 (or pin 39 of 
    U302). For the first LO injection frequencies 777-797MHz, pins 6 and 
    7 must both be low; for the TX repeater frequencies 806-825MHz pins  
    						
    							6-2
    6 and 7 must both be high. For talkaround TX frequencies 851-
    870MHz, pin 6 must be low while pin 7 must be high.
    The synthesizer IC (U303) consists of a prescaler, a programmable loop 
    divider, a divider control logic, a phase detector, a charge pump, an 
    A/D converter for low-frequency digital modulation, a balance 
    attenuator to balance the high frequency analog modulation to the 
    low frequency digital modulation, a 13V positive-voltage multiplier, a 
    serial interface for control, and finally a filter for the regulated five 
    volts. This filtered five volts is present at pin 19 of U302, pin 9 of U307, 
    and pins 2, 3, 4, and 15 of U303. It is also applied directly to resistors 
    R309, R315, and R311. Additionally, the 13V, being generated by the 
    positive voltage multiplier circuitry, should be present at pin 35 of 
    U302. The serial interface (SRL) is connected to the microprocessor via 
    the data line (pin 2 of U302), clock line (pin 3 of U302), and chip 
    enable line (pin 4 of U302). 
    The complete synthesizer subsystem works as follows. The output of 
    the VCO, pin 4 on U307, is fed into the RF input port (pin 9) of U303. 
    In the TX mode, the RF signal will be present at pin 4 of U303. On the 
    other hand, in the RX mode, the RF signal will be present at pin 3 of 
    U303. The output of the prescaler buffer, pin 15 on U303, is applied to 
    the PREIN port (pin 21) of U302. The prescaler in U302 is a dual-
    modulus type with selectable divider ratios. This divider ratio is 
    controlled by the loop divider, which in turn receives its inputs via the 
    SRL. The loop divider adds or subtracts phase to the prescaler divider 
    by changing the divide ratio via the modulus control line. The output 
    of the prescaler is then applied to the loop divider. The output of the 
    loop divider is then applied to the phase detector. The phase detector 
    will then compare the loop divider’s output signal with the signal from 
    U304 (that is divided down after it is applied to pin 14 of U302). The 
    result of the signal comparison is a pulsed dc signal which is applied 
    to the charge pump. The charge pump outputs a current that will be 
    present at pin 32 of U302. The loop filter (which consists of capacitors 
    C322, C317, C318, C329, C324, and C315, and resistors R307, R305, 
    and R314) will transform this current into a voltage that will be 
    applied to pins 1 and 7 of U307, and alter the VCO’s output frequency.
    In order to modulate the PLL, the two-port modulation method is 
    utilized. The analog modulating signal is applied to the A/D converter 
    as well as the balance attenuator, via U302 pin 5. The A/D converter 
    converts the low-frequency analog modulating signal into a digital 
    code that is applied to the loop divider, thereby causing the carrier to 
    deviate. The balance attenuator is used to adjust the VCO’s deviation 
    sensitivity to high-frequency modulating signals.
    Antenna SwitchSwitching between the standard and external antenna ports is 
    accomplished with the external mechanical switch which is actuated 
    by a plunger located on the accessory connector.
    An electronic PIN diode switch steers RF between the receiver and 
    transmitter. The common node of the switch is at capacitor C101. In 
    the transmit mode, RF is routed to the anode of diode CR104. In 
    receive mode, RF is routed to pin 1 of U201. In transmit, bias current 
    sourced from U504 pin 21, is routed through PIN diodes CR104 and  
    						
    							6-3
    CR102, biasing them to a low-impedance state. Bias current returns to 
    ground through U504 pin 20. In receive, U504 pin 21 is pulled down 
    to ground and pin 20 is pulled up to B+, reverse biasing diodes CR104 
    and CR102 to a high impedance.
    Receiver Front EndFor the purposes of this discussion, the receiver front end is defined to 
    be the circuitry from the antenna switch to the output of the IF crystal 
    filter. The 800MHz front end is designed to convert the received RF 
    signal to the 1st IF frequency of 73.35MHz, while at the same time 
    providing for spurious immunity and adjacent channel selectivity. A 
    review of the interstage components of the front end will now be 
    presented with emphasis on troubleshooting considerations.
    The received RF signal is passed through the antenna switch input 
    matching components C101, L105, and C114 tank components C106 
    and L103 (which are anti-resonant at the radios transmitter 
    frequencies), and output matching components C103 and L104. Both 
    pin diodes CR102 and CR104 must be back biased to properly route 
    the received signal. 
    The stage following the antenna switch is a 50-ohm, inter-digitated, 3-
    pole, stripline preselector (U201). The preselector is positioned after 
    the antenna switch to provide the receiver preamp some protection to 
    strong signal, out-of-band signals.
    After the preselector (U201), the received signal is processed through 
    the receiver preamp, U202. The preamp is a dual-gate GaAs MESFET 
    transistor which has been internally biased for optimum IM, NF, and 
    gain performance. Components L201 and L202 match the input (gate 
    1) of the amp to the first preselector, while at the same time 
    connecting gate 1 to ground potential. The output (drain) of the amp 
    is pin 3 and is matched to the subsequent receiver stage via 
    components L204, C205 and C222. A supply voltage of 5Vdc is 
    provided to pin 3 via an RF choke L203 and bypass C204. The 5 volt 
    supply is also present at pin 4 which connects to a voltage divider 
    network that biases gate 2 (pin 5) to a predefined quiescent voltage of 
    1.2Vdc. Resistor R202 and capacitor C203 are connected to pin 5 to 
    provide amp stability. The FET source (pin 7) is internally biased at 
    0.55 to 0.7Vdc for proper operation with bypass capacitors C201 and 
    C202 connected to the same node.
    The output of the amp is matched to a second 3-pole preselector 
    (U203) of the type previously discussed. The subsequent stage in the 
    receiver chain is the 1st mixer U205, which uses low-side injection to 
    convert the RF carrier to an intermediate frequency (IF) of 73.35MHz. 
    Since low-side injection is used, the LO frequency is offset below the 
    RF carrier by 73.35MHz, or Flo = Frf - 73.35MHz. The mixer utilizes 
    GaAs FETs in a double balanced Gilbert Cell configuration. The LO 
    port (pin 8) incorporates an internal buffer and a phase shift network 
    to eliminate the need for a LO transformer. The LO buffer bypass 
    capacitors (C208, C221, and C216) are connected to pin 10 of U205, 
    and should exhibit a nominal dc voltage of 1.2 to 1.4Vdc. Pin 11 of 
    U205 is LO buffer Vdd (5Vdc) with associated bypass capacitors C226 
    and C209 connected to the same node. An internal voltage divider 
    network within the LO buffer is bypassed to virtual ground at pin 12  
    						
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