LG Nexus 5 Service Manual

							5. BLOCK DIAGRAM 
- 211 -Copyright © 2013 LG Electronics. Inc. All right reserved.Only for training and service purposesLGE Internal Use Only
• LTE B7  
•  GPS  
Ant. 4   
WTR1605L -1  
( MIMO)  
(GNSS)  
 
DRX_B2  
DRX_B3  
DRX_B5  
DRX_B8  
DRX_B1
 
D
RX_LB1 
D
RX_MB 
3. D821(SKU2)_RF LTE MIMO DRX
•
 LTE MIMO   
   - B1/3/5/6/8/20  
•  CDMA BC0/10/1  
Ant. 3  
B1/3 
B5/B6/B8  
GPS 
DRX_B7
 
D
RX_HB 
DRX_B20 DRX_LB2 
B20
 
G
NSS_INP 
G
NSS_INM 
LNA 
B7  
DP6T 
D
P4T   
DP4T  B7  SPDT 
[D821] RF LTE MIMO/CDMA DRX  
						

							5. BLOCK DIAGRAM
- 212 -Copyright © 2013 LG Electronics. Inc. All right reserved.Only for training and service purposesLGE Internal Use Only
[D821] WiFi/BT I/F
4 / 10  
4. WiFi/BT I/F  
XTAL
37.4MHz
BT_UART_RXD
GPIO[53]
SLEEP_CLK
BT_RESET
BT_PCM_CLK
BT_PCM_SYNC
AUDIO_PCM_CLK_GPIO[79]
AUDIO_PCM_SINK_GPIO[80]
SDIO_CMD
SDIO_CLK
WLAN_SDIO[0]
BT/ WLAN Ant.
WLAN_POWER_ON
SDC2_CMD
SDC2_CLK
LPO_IN
MSM 
8
974 
Wi -Fi / BT 
BCM4339  
COB  
WLAN_CMD
WLAN_CLK
GPIO[26] BT_REG_ON
BT_PCM_CLK BT_PCM_SYNC WRF_XTAL_OUT
BT_UART_TXD
BT_UART_RXD BT_UART_RTS
BT_UART_CTS
CLK
WLAN_HOST_WAKEUP
GPIO[74]
BT_PCM_DIN
BT_PCM_DOUT
AUDIO_PCM_DIN_GPIO[81]
AUDIO_PCM_DOUT_GPIO[82] BT_PCM_OUT
BT_PCM_IN
SDC2_DATA[0]
SDC2_DATA[1]
SDC2_DATA[2]
SDC2_DATA[3]
PM8941 
SDIO_DATA_0
XO_IN
XO_OUT WRF_RFIN_2G
WRF_XTAL_IN BT_UART_TXD
BT_UART_RTS_N
BT_UART_CTS_NSDIO_DATA_1
SDIO_DATA_2
SDIO_DATA_3
WL_REG_ON
WLAN_SDIO[1]
WLAN_SDIO[2]
WLAN_SDIO[3]
WL_GPIO_0
BT_HOST_WAKEUPBT_WAKEUP BT_HOST_WAKEUP
BT_DEV_WAKE
Diplexer 
WRF_RFOUT_2G
SW_2G_RX
WRF_RFIN_5G
WRF_RFIN_5G
RF_SW_CTRL_0
SW_2G_LNA_ENSW_2G_TXRF_SW_CTRL_1
RF_SW_CTRL_8
RF_SW_CTRL_2
RF_SW_CTRL_3
FEM 
R
F5521 
ANT
FEM 
R
F5540 
ANT
RX
TX
LNA_EN
SAW 
WLAN_RX_5G
WLAN_TX_5G
SW_5G_LNA_EN
GPIO[54]
GPIO[56]
GPIO[55]
GPIO[42]
GPIO[62] GPIO[41] WLAN_TX_2G WLAN_RX_2GRX
TX
C_RX
C_TX LNA_EN
C_RX
SW_5G_TX
SW_BT_TXRF_SW_CTRL_7
C_BT
BT_TX
BT_Rf_TX BT   
						

							5. BLOCK DIAGRAM 
- 213 -Copyright © 2013 LG Electronics. Inc. All right reserved.Only for training and service purposesLGE Internal Use Only
[D821] NFC I/F
5 / 10  
5. NFC I/F  
  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
BCM 
20793M  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  
  
 
 
 
 
 
 
 
 
 
 
 
 
 
MSM 
8974  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  
UART_CTS_N  
NFC_WAKE  
REG_PU  
UART_TXD 
UART_RTS_N  
TX2
 
TX1  NFC_IRQ 
NFC_WAKE_BCM  
NFC_VEN  
SWPIO_0  
+3V0_USIM_NFC  
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
PM  
8941   
 
 
 
 
 
 
 
 
VDD_IO  
VBAT  
+1V8_VREG_S3A
 
UIM1_VREG_L9
  COMMON_I2C_SDA
 
COMMON_I2C_SCL  
CLK_REQ 
NFC_PMIC_XO_EN  
XO_OUT_D1 
XO_OUT_D1 
VDD_SWP_IN  
SPI_INT 
NFC_VPWR  
VDDSWP_OUT0  
Secure 
Element  
SWPIO_1  
VDDSWP_OUT 
GPIO[84] 
GPIO[83]
 
GPIO[59]  
GPIO[92]  
GPIO[94]  
NFC 
13.56MHz     
						

							5. BLOCK DIAGRAM
- 214 -Copyright © 2013 LG Electronics. Inc. All right reserved.Only for training and service purposesLGE Internal Use Only
[D821] PM8941 Output Power Management6. PM8941 Output Power Management
 
LDO(3.3V)  
+1V8_VREG_LVS1(300mA)  
+1V8_VREG_L12(300mA) 
+1V2_VREG_L1(1.2A)
 
+2V95_VREG_L13(150mA)  
PM8941 
VREG_L1 
VREG_L13 VDD_DDR_CORE_1P2  
VDD_DDR_CORE_1P8 VDD_P3/P6/P7  
TOUCH 
 
4.95” LCD  
   
Accel, GYRO/Compass,   
Prox, ALS,RGB/Pressure  MSM8974 
NFC 
+3V0_USIM_NFC  USIM 
VREG_L4 
Bypass 
Boost(3.5V)  
VSW_S3 
+VPWR 
VDD_P2 
VDD_TXADC/VDD_DIG  
+1V25_VREG_L11_(1.2A)  
BCM4335 
BT/WiFi  
+1V3_VREG_L4(1.2A)   VDD0_RF1_1P3
 
WCD9320 
VDD_A1  
VREG_L12 
VOUT_LVS1 
VOUT_LVS2 
SM100 (LINEAR MOTOR)
 
+1V8_VREG_LVS2(300mA)  
WTR 
1605L #0,1  VDD_DIO 
VREG_L2 
+1V2_VREG_L2(300mA)  VDD_MIPI_DSI_1P2 
VREG_L3 
VDD_RX/TX  
VDD_IO  
VDD_BUCK
 
JTAG 
+1V3_VREG_S1A(2A)  
VSW_S1 
VDD_L1_3 
VDD_L4_11 
VDD0_RF2_2P0  
PM8941 
VREG_L17 +3V0_VREG_L17 
VBAT
 
VREG_L9  UIM1_VREG_L9
(150mA) 
VREG_L16 
VREG_L15  +2V05_VREG_L15(600mA)
 
VBAT 
VREG_BOOST_BYPASS  VREG_L5(XO Buffer, 1V8)
 
VREG_L7(XO Circuit)  
VREF_LPDDR3_CA/DQ  
VREF_LPDDR3 
+1V8_VREG_L6(150mA)
 
VBUS_USB_IN_PM 
+1V8_VREG_S3A(2A)  
VREG_L8 
+1V8_VREG_L8(50mA)
 
PCB_REVISION 
RF S/W 
GPS LNA  VDD_SWITCH_2P65  
VDD_GPS_LNA_2P7  
VREG_L14 +1V8_VREG_L14(150mA)  
+1V8_VREG_S3A(2A) 
eMMC 32GB VCCQ 
VREG_L20 +2V95_VREG_L20(600mA)  
VCC 
SLIMPORT 
VDD_MSM_IO/VDD_L2_LVS1_2_3 +1V8_VREG_S3A  
VBAT1 
UIM1_VREG_L9 (150mA) VDD_MIPI_DSI_1P8/VDD_MIPI_CSI  
VDD_EDP/VDD_HDMI/VDD_PLL2  
VDD_QFPROM_PRG  VDD_P5 
VDD_USB_1P8
 
VREG_L6 +3V075_VREG_L24(50mA)  VDD_USB_3P3 
VREG_L24 
VSW_S2 
VDD_L5_7 
VDD_L6_12_14_15 +2V15_VREG_S2A(1A)
 
+1V2_VREG_L1(1.2A)
 
+1V05_VREG_L3(300mA)  
CAM_VDDIO
 
CAM_DIG_CORE  
CAM_AVDD  
8M Cam 
VREG_L17 +2V85_VREG_L17(300mA)  CAM_VCM 
DSV 
WLED_A  WLED_C1 WLED_C2 +5V5_DDVDH  
- 5V5_DDVDL   EBI0/1_VREF
 AVDD33(300mA)  
VDD_L8_16_18_19 
VDD_L9_10_17_22 
VDD_L12_20_23_24 
VDD_L21 
VPH_PWR 
VDD_S1 
VDD_S2 
VDD_S3 
PHY_VBUS
 USB1_PHY_VBUS
 USB_HS1_VBUS 
VREG_5V  
VIN_5VS  
VDD_TORCH  
+5V0_VREG 
+5V0_VREG_OTG(500mA)  
+VPWR VCHG 1.3M 
CAM  
VREG_L19 
VBAT1  VBAT_FEM/VBAT  
+VPWR VDD_VBAT  
VDD_SPKDR1/2 
VIO  +1V8_VREG_S3A
 
LMSW6S 
FEMID VIO  
VDD  
ETMMPA 
HCPA  VIO 
VBAT  
QFE1100 
+VPWR_RF  VDD_BATT/BYP_BATT  
VDD_BUCK
 
PA_VBATT
 
ETPA 
B7 PAM  VIO 
VBAT  
AMP_OUT  
VCC 
VCC VDD_1P8  
VDD_A2 
VDD_P1/P4  
USB_OTG_IN  
VOUT_5VS_OTG
 
VOUT_5VS_HDMI  
VREG_L11 
VDD_WLAN 
VREG_L10 
GPS_B7 PAM, SPDT, DP4T, SP3T  
VDD  
EARJACK/UART  
(COMPARATOR, S/W)  VDD_L2_LVS1_2_3 
+1V8_VREG_S3A
(600mA) 
VDD  VREG_L22 
+3V3_VREG_L22(300mA)
 
VBUS
 +1V8_VREG_LVS3(300mA)   
VOUT_LVS3 
VDD_GPLED/RGB/WLED  
FLASH LED FLASH_DRV  
RGB_LED GP_LED_DRV  
VDD_FLASH 
LCD BOOST +VPWR 
VCOIN BACKUP BAT  
Battery USB_IN
Ext. Charger  VBAT1 
RESET 
  IC  
+VPWR  
FUEL GAUGE  
 
LDO(1.2V)  +1V2_VT_LDO  
+VPWR 
EARJACK/UART DET  +VPWR 
VREG_BOOST_BYPASS   
LDO(1.0V)  
+1V0_SLIMPORT_IOVCC  2.0 USB Conn. 
buck 
VCHG  
FET VPWR  
(BQ24192)  OVP_OUT 
OVP OVP +VPWR  
OVP 
+VPWR  
+1V8_VREG_S3A  
VREG_BOOST_BYPASS  
+1V8_VREG_S3A 
VBUS_USB_IN_PM  
Bypass 
Boost(3.5V)     
						

							5. BLOCK DIAGRAM 
- 215 -Copyright © 2013 LG Electronics. Inc. All right reserved.Only for training and service purposesLGE Internal Use Only
[D821] PM8841 SMPS / PM8941 Input Power Management
8. PM8841  SMPS / PM8941 Input Power Management
+0V9_VREG_S2B(3A) 
PMIC 
PM8841 
VSW_S2 
MSM8974  
VSW_S1 
VDD_CORE  
USB_SS_VPTX  
VDD_USB_CORE  
VDD_SDC_CDC  
VDD_PLL1  
+0V95_VREG_S1B(2A)
 
VDD_MEM 
VDD_EBI0_CDC  
VDD_EBI1_CDC  
VDD_EBI0_PLL 
VDD_EBI1_PLL 
VDD_S1 
VDD_S3  +1V15_VREG_S3B(1A)
 
VDD_MODEM 
VSW_S3 
VDD_S2 
VDD_S4 
+0V9_VREG_S4B(3A)
 VDD_GFX 
VSW_S4 
VDD_S5 
VDD_S6 
VDD_S7 
VDD_S8  +0V9_VREG_KRAIT(12A)
 
VDD_KRAIT 
VSW_S5 
VSW_S6 
VSW_S7 
VSW_S8 
VDD_PON  
 
VDD_MSM_IO  PM8941 
USB 2.0 
Connector  
Option for BMS  
(If not use   
Internal FET Rds)   VCHG
 
VSW_SMBC  
BMS_CSP  
BMS_CSN  
SMBC - Buck  
(Switched -Mode   
Battery Charger)  
+VPWR 
+1V8_VREG_S3A  
Battery 
VBUS_USB_IN_PM  
OVP 
+VPWR  
VPH_PWR  BAT 
FET  VBAT  
Reset  
Switch  
VBAT_SENSE_M 
VBAT_SENSE_P
 
VBAT
 VREG_S5 
VREG_S6 
VREG_S7 
VREG_S8 +0V9_VSENSE_KRAIT  
0 ohm 
Charger IC  
(BQ24192)  
+5V0_OTG_OVP
 
VBAT 
VBAT_SNS  
Wireless  
Charger IC  
(BQ51013BYFPR)  
OVP WLC_5V_OUT     
						

							5. BLOCK DIAGRAM
- 216 -Copyright © 2013 LG Electronics. Inc. All right reserved.Only for training and service purposesLGE Internal Use Only
[D821] Memory I/F
Main Chipset
(MSM8974)
DQ_0~31
HYNIX DDR3 SDRAM (PoP)
2GB (128M x 32 x 4CH), 800MHz
DQ0~31_a
SDC1_DATA_0~7
SanDisk 32GB  eMMC4.51
DATA0~7CMD
CLK
SDC1_CMD
SDC1_CLK
CA_0~9 CA0~9_a
RESOUT_N
RESOUT_N
SDC2_DATA_0~3
SDC2_CMDSDC2_CLK
EBI0
EBI1
SDC1
SDC2
Wi -Fi (BCM4335  CoB)SDIO_DATA_0~3SDIO_CMD
SDIO_CLK
DCLK / DCLKB CK_a / CK_N_aCKE_0~1
CKE0~1_aCS0~1_N
DQS_0~3 / DQS_0B~3B DM_0~3
ZQ CS0~1_N_a
DQS0~3_t_a / DQS0~3_c_a
DM0~3_a
ZQ_a
DQ_0~31
DQ0~31_bCA_0~9CA0~9_b
DCLK / DCLKB
CK_b / CK_N_bCKE_0~1CKE0~1_bCS0~1_N
DQS_0~3 / DQS_0B~3B DM_0~3
ZQ CS0~1_N_b
DQS0~3_t_b / DQS0~3_c_b
DM0~3_b
ZQ_b
CH_A (128M x 32 x 2)
CH_B (128M x 32 x 2)
10
32
10
32
84
eMMC_DATA[0]~[7]
eMMC_CMD
eMMC_CLK
MSM_RESOUT_NWLAN_SDIO0~SDIO3
WLAN_CMD
WLAN_CLK
9. Memory I/F   
						

							5. BLOCK DIAGRAM 
- 217 -Copyright © 2013 LG Electronics. Inc. All right reserved.Only for training and service purposesLGE Internal Use Only
[D821] Main & Display/Touch I/F
10. Main & Display/Touch I/F
Main Chipset (MSM8974)5.0 Full-HD LCD
MIPI_DSI0_CLK_P / N
MIPI_DSI0_LN0_P / N
MIPI_DSI0_LN1_P / N
MIPI_DSI0_LN2_P / N
MIPI_DSI0_LN3_P / N GPIO_25
GPIO_58
GPIO_87
GPIO_88
GPIO_49 MIPI_CLK_P / N
MIPI_LN0_P / N
MIPI_LN1_P / N
MIPI_LN2_P / N
MIPI_LN3_P / N
MAKER_ID
+5V5_DDVDH / 
-5V5_DDVDL
                            
        ····               Backlight
        ····                  LEDs
LCD_PWM
MIPI_DSI0
GPIO_84
GPIO_83
         DSV Boost
         (DW8757)EN                               VOUT_P / N
               Backlight
                  Boost
               (LM3630)HWEN                                 SW(OUT)       
SCL                                      
SDA                                           ILED1
PWM                                         ILED2COMMOM_I2C_SCL
COMMOM_I2C_SDAMIPI_DSI0_CLK_P  / M
MIPI_DSI0_LANE0_P  / M
MIPI_DSI0_LANE1_P  / M
MIPI_DSI0_LANE2_P  / M
MIPI_DSI0_LANE3_P  / M
LCD_MAKER_ID
DSV_EN
SENSOR1_I2C_SDA
SENSOR1_I2C_SCL
LCD_BL_EN
LCD_PWM
WLED_A
WLED_C1
WLED_C2
LCD_VSYNCLCD_VSYNCGPIO_12
TOUCH_INT_N
TOUCH_RESET
TOUCH_I2C_SCL
TOUCH_I2C_SDA
INT
Reset
SCL
SDA
GPIO_5
GPIO_8
GPIO_7
GPIO_6
Touch
PMIC
(PM8941)VREG_L22
VREG_L12 +3V0_VREG_L22
+1V8_VREG_L12                     
						

							5. BLOCK DIAGRAM
- 218 -Copyright © 2013 LG Electronics. Inc. All right reserved.Only for training and service purposesLGE Internal Use Only
[D821] Main & Slimport I/F11. Main & Slimport I/F
SlimPortTM
Transmitter
(ANX7808BH)
Main Chipset (MSM8974)
HDMI
HDMI_TCLK_P /  MHDMI_TX0_P / M
HDMI_TX1_P / M
HDMI_TX2_P / M
HDMI_HOT_PLUG_DET (GPIO_34) HDMI_DDC_CLK (GPIO_32)
HDMI_DDC_DATA  (GPIO_33) HDMI_CEC (GPIO_31)
GPIO_84
GPIO_83
GPIO_28
GPIO_68 HDMI_CLKP / CLKN
HDMI_D0P / D0N
HDMI_D1P / D1N
HDMI_D2P / D2N
HDMI_HPD_OUT
DDC_SCL
DDC_SDA
CEC
CSCL
CSDA
INTP
RESETN
ID_OUT
CABLE_DET
CHIP_PD_HV
DVDD10_1/2
AVDD10
AVDD33_IN2
USB 2.0
Connector
(SLIMPORT)
TX0P
TX0N
C_WIRE / AUXP USB_DP
USB_DN
USB_ID
PMIC
(PM8941)AMUX_USB_ID
GPIO_13
GPIO_14
GPIO_08
GPIO_26PM_USB_ID_HOST
SLIMPORT_CBL_DET
ANX_P_DWN_CTL
SLIMPORT_IOVCC_EN
SLIMPORT_AVDD33_EN
       LDOEN                   VOUT
      LDOEN                   VOUT
HDMI_TDMS_TCLK_P /  M
HDMI_TDMS_TX0_P / M
HDMI_TDMS_TX1_P / M
HDMI_TDMS_TX2_P / M
HDMI_HOT_PLUG_DETECT
HDMI_DDC_CLK
HDMI_DDC_DATA
HDMI_CEC
COMMOM_I2C_SCL
COMMOM_I2C_SDA
SLIMPORT_INT_N
SLIMPORT_RESET_N USB_HS1_DP_SLIM1
USB_HS1_DN_SLIM1
USB_ID
MSM_USB_HS1_DP
MSM_USB_HS1_DMUSB_DP
USB_DN
USB_HS1_DP
USB_HS1_DM                      
						

							5. BLOCK DIAGRAM 
- 219 -Copyright © 2013 LG Electronics. Inc. All right reserved.Only for training and service purposesLGE Internal Use Only
[D821] Camera I/F12. Camera I/F
Main Chipset (MSM8974)
MIPI_CSI0_LN1_P / N
8MP Camera
CLK_P / CLK_MMIPI_CSI0_LN0_P / NLANE0_P / LANE0_M
MIPI_CSI0
MIP_CSI1MIPI_CSI0_LN2_P / N LANE1_P / LANE1_MMIPI_CSI0_LN3_P / NLANE2_P / LANE2_MMIPI_CSI0_LN4_P / NLANE3_P / LANE3_M
LN0_P / LN0_N
CLK_P / CLK_N
LN1_P / LN1_NLN2_P / LN2_N
LN3_P / LN3_N
MIPI_CSI2_LN1_P / N
1.3MP CameraMIPI_CSI2_LN0_P / N LANE0_P / LANE0_M
MIPI_CSI2MIPI_CSI2_LN2_P / N
MIPI_CSI2_LN3_P / N MCLK
GPIO_15
MCLK
GPIO_17RESET_N
GPIO_18
RESET_N
GPIO_4SDA
GPIO_19SCL
GPIO_20
SDA
GPIO_21SCL
GPIO_22
MIPI_CSI2_LN4_P / N CLK_P / CLK_M
OIS_RESET
GPIO_29    
						

							5. BLOCK DIAGRAM
- 220 -Copyright © 2013 LG Electronics. Inc. All right reserved.Only for training and service purposesLGE Internal Use Only
[D821] Sensor I/F13. Sensor I/F
Main Chipset (MSM8974)
GPIO_73Accelerometer & GyroscopeMPU6515 _INT
GPIO_67
Digital Compass
COMPASS DRDYGPIO_10 / GPIO_11 SDA / SCL
GPIO_61
Proximity & Ambient Light Sensor
INTSDA / SCL
Pressure Sensor
SDA / SCL
SENSOR1_I2CGPIO_87 / GPIO_88 SDA / SCL
SENSOR2_I2C