Hughes JVC Projector 230 Service Manual
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Chapter 2---System Description
Model 230 Service Manual2-39
B3 V_SYNC
B4 H_SYNC
B5 G_SYNC
HVPS_SYNC A14 A5 GRN_INPUT
A32 +5.1V
A31 +15V
B30 -15VV_DRIVE B15 B19 ISYNC_CLK
B27 IIC_CLKBLANKING B1 CLAMP B2
ODD_FIELD B23 SOURCE_VALID B24
280_CLK B21
B28 IIC_DATA
J13
J13
FROM
SCBFROM
VPB
FROM
LVPSTO
SCB
TO
VPB
RASTER
TIMING
GENERATOR
H_BAND1 B8 H_BAND0 B7
H_BAND2 B9
H_F2V B12/H_ENABLE B11
H_DRIVE B16
TO
HVDB
TO
HVPS
B32 +5.1V
B31 +15V
A30 -15V
B29 GND
A29 +5.1V_STBY
TO
CDB
Figure 2-13. Raster Timing Generator, Input/Output Diagram.
There are 9 LEDs on the RTG board (see Figure 5-2) that indicate frequency
bands, input modes and lock mode of the phase locked loop.
IIC Interface
The RTG board uses the IIC bus interface for serial communication with the
System Controller Board. The information transferred over the IIC bus is
indicated below (I = input to RTG, O = output from RTG). The RTG board does
not use the interrupt line of IIC bus interface:
Table 2-12. Raster Timing Generator IIC communication
INPUT /
OUTPUTNO.
OF
BITSINFORMATION DESCRIPTION
I 1 FORCE_INTERNAL Selects internal syncs
I 1 TRI_LEVEL Selects the tri level mode for the video clamp
signal (for HDTV)
I 1 SYNC_TIP Selects the Sync tip option of video clamp
signal
I 1 VTR_MODE Selects VTR mode of operation
Chapter 2---System Description 2-40Model 230 Service Manual I 9 Right blanking Data for adjustment of right blanking I 9 Left blanking Data for adjustment of left blanking I 12 Top blanking Data for adjustment of top blanking I 12 Bottom blanking Data for adjustment of bottom blanking I 8 Horz. phase Data for adjustment of horizontal phase I 12 Vert. phase Data for adjustment of vertical phase O 3 Frequency bands The frequency band associated with the current signal O 1 /RTG_OK A low on this line indicates an operational RTG board O 2 RTG_MODEL The revision of the RTG board O 12 H_COUNT The number of horizontal lines associated with the current signal O 12 V_COUNT Data for V_COUNT O 3 INPUT_MODE Data indicating the selected sync signals O 1 INTERLACE High indicates interlace pattern Raster Timing Generator Input/Output This section describes the inputs to and outputs from the RTG board. The I/O descriptions are arranged by the source and destination of the signal. The assembly communicated with is used as the primary heading of each output. Input refers to an input to the RTG, output refers to an output from the RTG. Table 2-13. Raster Timing Generator I/O signals SYSTEM CONTROLLER BOARD INPUTS DESCRIPTION ISYNC_CLK 5 mHz clock used to generate the internal sync signals IIC_CLK IIC clock line. Unidirectional clock line for control of synchronous data transfer over the IIC bus interface IIC_DATA IIC data line. Bi directional serial line for synchronous data transfer between system control board and RTG board OUTPUTS DESCRIPTION /IIC_INT IIC interrupt line. This is not used by the RTG board.
Chapter 2---System Description Model 230 Service Manual2-41 SOURCE_ VALIDThis signal indicates a new source (or valid). A high indicates a valid stable signal and low indicates change in input signal ODD_FIELD Square wave with 50 % duty cycle which is low during the odd field of an interlace signal. This signal is high for noninterlaced signals 280_CLK Square wave signal, 50 % duty cycle, 280 times the frequency of horizontal sync. This clock is synchronized to the horizontal sync. VIDEO PROCESSOR BOARD INPUTS DESCRIPTION V_SYNC Input vertical sync H_SYNC Input horizontal or composite sync G_SYNC Sync on green signal which is stripped for the green video GRN_INPUT Buffered version of green video OUTPUTS DESCRIPTION Clamp A negative going video clamp signal with about 3 % duty cycle Blanking Blanking signal composed of right, left, top and bottom blanking HORIZONTAL/VERTICAL DEFLECTION BOARD INPUTS DESCRIPTION /H_ FLYBACKNot used by the RTG board OUTPUTS DESCRIPTION H_BAND0 H_BAND1Horizontal frequency band lines Band A = 000, Band B = 001, Band C = 011 and band D = 111 /H_ENABLE Low = enabled deflection and high = disabled deflection H_F2V A DC voltage proportional to horizontal frequency H_DRIVE Square wave 50 % duty cycle synchronized to the selected horizontal sync. HIGH VOLTAGE POWER SUPPLY OUTPUT DESCRIPTION HVPS_ SYNCSynchronization pulse for HVPS, synchronized with the selected horiz. sync at either same, half or one third the frequency
Chapter 2---System Description 2-42Model 230 Service Manual CONVERGENCEDEFLECTION BOARD OUTPUT DESCRIPTION V_DRIVE Square wave negative going pulse synchronized to the selected vertical sync with pulse width of about 4 horizontal periods LOW VOLTAGE POWER SUPPLY INPUTS DESCRIPTION +5V Power for digital portion of RTG board +15V Power for the phase locked loop and the supporting circuitry of RTG board -15V Power for the phase locked loop and the supporting circuitry of RTG board +5.1V_STBY Stand by + 5.1 V. Not used by RTG board. Interlock and protection: Input None Output The RTG will disable the Horizontal Deflection Board by placing a high on the /H_ENABLE line during any of following events: A. During and about 2 seconds after the programming period of the FPGA. B. During frequency band change period. C. During the period that the phase locked loop is out of lock. 2.3.8 Horizontal/Vertical Deflection PCB The HVD board is located on the top side of the deflection cage in front of the electronic card cage. The Horizontal/Vertical Deflection Board I/O diagram (Figure 2-14) and the list of inputs and outputs (Tables 2-14 and 2-15) provide information for the technician to perform module level troubleshooting. The following functions are provided by the HVD board: • Horizontal raster centering for all three colors • Horizontal gate drive • Switch mode power supply generating the required proportional DC supply • Horizontal width adjustment
Chapter 2---System Description Model 230 Service Manual2-43 • Horizontal retrace switch network • Left/right pincushion and keystone correction • Drive main deflection coils to provide horizontal raster scan for all three CRTs • Drive main vertical coils to provide vertical raster scan for all three CRTs • Vertical linearity adjustments individually for all three colors. • Vertical raster centering for all three colors • IIC interface IIC Interface All adjustments for the HVD board are performed by the System Controller via the IIC serial bus interface. This three wire bus interface consists of a clock line, a data line, and an interrupt line. The HVD board does not create any interrupt and the interrupt line is not used for this application. Table 2-14 lists the adjustments executed via the IIC bus interface (I = Input to HVD board , O = Output from HVD board):
Chapter 2---System Description 2-44Model 230 Service Manual Figure 2-14. Horizontal/Vertical Deflection PCB I/O Diagram. Table 2-14. Horizontal/Vertical Deflection IIC Data Interface INPUT / OUTPUTNO. OF BITSINFORMATION DESCRIPTION I 8 V_RED_LIN_CONTROL Data for adjustment of red vertical linearity I 8 V_GRN_LIN_CONTROL Data for adjustment of green vertical linearity
Chapter 2---System Description Model 230 Service Manual2-45 I 8 V_BLU_LIN_CONTROL Data for adjustment of blue vertical linearity I 8 V_RED_EDGE_CONTROL Data for adjustment of red vertical edge linearity I 8 V_GRN_EDGE_CONTROL Data for adjustment of green vertical edge linearity I 8 V_BLU_EDGE_CONTROL Data for adjustment of blue vertical edge linearity I 8 L/R_KEY_CONTROL Data for adjustment of left / right keystone correction I 8 L/R_PIN_CONTROL Data for adjustment of left / right pincushion correction I 8 WIDTH_CONTROL Data for adjustment of screen width I 8 H_RED_CENT_CONTROL Data for adjustment of red horizontal centering I 8 H_GRN_CENT_CONTROL Data for adjustment of green horizontal centering I 8 H_BLU_CENT_CONTROL Data for adjustment of blue horizontal centering I 8 V_RED_CENT_CONTROL The data for adjustment of red vertical centering I 8 V_GRN_CENT_CONTROL The data for adjustment of green vertical centering I 8 V_BLU_CENT_CONTROL The data for adjustment of blue centering O 1 FRONT/REAR Front or rear projection status line front = low and rear = high O 1 FLOOR/CEIL Floor or ceiling projection status line floor = low and ceiling = high O 1 /DEFL_OK Deflection status. Low = operational HVD board, High = Nonoperational HVD board. O 2 HVD_MODEL Revision of HVD board Horizontal/Vertical Deflection Board I/O This section provides a description of the inputs to and outputs from the HVD Board. The I/O descriptions are arranged by the source/destination of the signal. The assembly communicated with is used as the primary heading of each group of signals. Those signals are subdivided into inputs and outputs. Input refers to an Input to the HVD Board, output refers to an output from the HVD Board.
Chapter 2---System Description 2-46Model 230 Service Manual Table 2-15. Horizontal/Vertical Deflection I/O signals SYSTEM CONTROLLER BOARD INPUTS DESCRIPTION IIC_CLK IIC clock line. Unidirectional clock line for control of synchronous data transfer over the IIC bus interface. IIC_DATA IIC data line. Bidirectional serial line for synchronous data transfer between the System Controller Board and the HVD Board. OUTPUTS DESCRIPTION /IIC_SINT IIC interrupt line. This is not used by HVD Board. VIDEO PROCESSOR BOARD OUTPUTS DESCRIPTION /SWEEPOK Low = good scan. High = no scan. Signal is dependent on two inputs; DEFL_OK (from SRB) and /H_ENABLE (from RTG). SCAN REVERSAL BOARD INPUTS DESCRIPTION FRONT/REARFront or rear projection status line. Front = low. Rear = high. FLOOR/CEIL Floor or ceiling projection status line. Floor = low. Ceiling = high. DEFL_OK Deflection OK signal. High = good (about 2 v). Low = no scan. H_CUR_ FDBKHorizontal current feed back. A DC voltage proportional to the output current. H_LOCK- Horizontal interlock for yoke connectors. It should be 5 V when closed or 0V when open. V_RED- Current feedback of red vertical amplifier V_GRN- Current feedback of green vertical amplifier V_BLU- Current feedback of blue vertical amplifier
Chapter 2---System Description Model 230 Service Manual2-47 OUTPUTS DESCRIPTION H_OUT_ FLYBACKHorizontal output flyback pulse, about 800 VPP H_LOCK+ Horizontal interlock for yoke connectors. This should be about 5 V when closed or 15 V when open. H_RED+ Output of horiz. red centering (also top of the red horiz. yoke). About + 5 VDC. H_GRN+ Output of horz. green centering (top of green horz. yoke). About + 5 VDC H_BLU+ Output of horiz. blue centering (top of blue horiz. yoke). About + 5 VDC. V_RED+ Output of red vertical amplifier. About 40 VPP. V_GRN+ Output of green vertical amplifier. About 40 VPP. V_BLU+ Output of blue vertical amplifier. About 40 VPP. +15 V +15 V supply for use by Scan Reversal Board -15 V -15 V supply for use by Scan Reversal Board +5 V +5 V supply for use by Scan Reversal Board CONVERGENCE/DEFLECTION BOARD INPUTS DESCRIPTION V_RAMP Vertical ramp waveform. About 4 VPP. V_PARAB Vertical parabola waveform. About 4 VPP. OUTPUTS DESCRIPTION W IDTH_CTRLA DC waveform for controlling width of picture. About 4 V max. RASTER TIMING GENERATOR (RTG BOARD) INPUTS DESCRIPTION /H_ENABLE A low on this line enables horizontal deflection. A high disables the horizontal amplifier. H_BAND:0 H_BAND:1Horizontal frequency band line. 000 = band A, 001 = band B, 011 = band C and 111 = band D.
Chapter 2---System Description 2-48Model 230 Service Manual HF_2V Horizontal frequency to voltage converter. a DC signal proportional to horiz. frequency. About 4.2 V at 90 kHz. H_DRIVE Horiz. drive pulse, 50 % duty cycle HCT level signal SYSTEM POWER SUPPLY INPUTS DESCRIPTION +5 V + 5 V supply for use by HVD and Scan Reversal Boards +15 V + 15 V supply for use by HVD and Scan Reversal Boards -15 V - 15 V supply for use by HVD and Scan Reversal Board +80 V + 80 V supply for use by the switching supply of horizontal deflection amplifier Interlocks and protection: Input None Outputs H_LOCK + and H_LOCK-: Used to shut down the switching power supply of the horizontal deflection amplifier in the event of a loose yoke or loose scan reverse connector. This prevents the power supply section of the Horizontal/Vertical Deflection Board from operating when 1 or more yoke connectors are disconnected. /SWEEP_OK: Shuts down the video amplifiers in the event of deflection failure (if DEFL_OK or /H_ENABLE are not present). 2.3.9 Convergence/Deflection PCB The Convergence/Deflection Board is located on the bottom side of the card cage under the Horizontal/Vertical Deflection Board. This board drives the convergence coils of the projectors. The following functions are provided by C/D Board: • Generation of various waveforms for the horizontal and vertical axes • Height control • Generation of waveforms for dynamic focus • Various geometry correction functions for the horizontal and vertical axes • Convergence output amplifiers for all colors and both horizontal and vertical axes • Convergence enable and raster fill function