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Acer Extensa 670 Service Guide

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    							4-12Theory of OperationFigure 4-6M6377 Chip Pinouts 
    						
    							Service Guide4-13 4.3.6 C&T 65550 High Performance Flat Panel / CRT VGA Controller
    The C&T 65550 of high performance multimedia flat panel / CRT GUI accelerators extend CHIPS’
    offering of high-performance flat panel controllers for full-featured notebooks and sub-notebooks.
    The C&T 65550 offers 64-bit high performance and new hardware multimedia support features.
    High Performance
    Based on a totally new internal architecture, the C&T65550 integrates a powerful 64-bit graphics
    accelerator engine for Bit Block Transfer (BitBLT), hardware cursor, and other functions intensively
    used in graphical user interfaces (GUIs) such as Microsoft Windows™.  Superior performance is
    also achieved through a direct 32-bit interface to the PCI local bus.  The C&T65550 offers
    exceptional performance when combined with CHIPS advanced linear acceleration driver
    technology.
    Hardware Multimedia Support
    The C&T65550 implements independent multimedia capture and display systems on-chip.  The
    capture system places data in display memory (usually off screen) and the displya system places it
    in a window on the screen.
    The capture system can receive data from either the system bus or from the ZV enabled video port
    in either RGB or YUV format.  The input data can also be scaled down before storage in display
    memory (e.g., from any size larger than 320x240 down to 352x248).  Capture of input data may also
    be double buffered fro smoothing and to prevent image tearing.
    The display system can independently place either RGB or YUV data from anywhere in display
    memory into an onscreen window which can be any size and located at any pixel boundary (YUV
    data is converted to RGB “on-the-fly” on output).  Non-rectangular windows are supported via color
    keying.  The data can be functionally zoomed on output up to 8x to fit the onscreen window and can
    be horizontally and vertically interpolated to scale or zoom artifacts.  Interlaced and non-interlaced
    data are supported in both capture and display systems.
    Versatile Panel Support
    The C&T65550 supports a wide variety of monchrome and color Single-Panel, Single-Drive (SS)
    and Dual-Panel, Dual-Drive (DD) standard and high-resolution passive STN and active matrix
    TFT/MIM LCD and EL panels.  For monchrome panels, up to 64 gray scales are supported.  Up to
    4096 different colors can be displayed on passive STN LCDs and up to 16M colors on 24-bit active
    matrix LCDs.
    Low Power Consumption
    The C&T65550 employs a variety of advanced power management features to reduce power
    consumption of the display sub-system and extend battery life.  Although optimized for 3.3V
    operation.  The C&T65550 controller’s internal logic, memory interface, and panel interfaces can be
    independently configured to operate  at either 3.3V or 5V.
    Software Compatibility / Flexibility
    The C&T65550 are fully compatible with VGA at the register, and BIOS levels.  CHIPS and third-
    party vendors supply fully VGA-compatible BIOS, end-user utilites and drivers for common
    application programs. 
    						
    							4-14Theory of Operation The pin diagram is shown in Figure 4-7.  Pin names in parentheses (…) indicate alternate functions.Figure 4-7C&T65550 Chip Pinouts 
    						
    							Service Guide4-15 A simplified block diagram of the C&T65550 is shown in Figure 4-8.Memory ControllerScalingCapture64-bit
    Graphics
    EngineYUV to RGB
    Color Key ZoomBus InterfaceVideo
    Capture
    PortPCI BusAnalog
    RGBDigital
    RGBVideo MemoryFigure 4-8C&T65550 Chip Simplified Block Diagram 
    						
    							4-16Theory of Operation 4.3.7 TI1130 PCMCIA Controller
    The TI PCI1130 is a high-performance PCI-to-PC Card controller that supports two independent PC
    Card sockets compliant with the 1995 PC Card standard.  The PCI1130 provides a set of features
    that make it ideal for bridging between PCI and PC Cards in both notebook and desktop computers.
    The 1995 PC Card standard retains the 16-bit PC Card specification defined in PCMCIA release 2.1
    and defines the new 32-bit PC Card, called CardBUs, capable of full 32-bit data transfers at 33 MHz.
    The PCI1130 supports any combination of 16-bit and CardBus PC Cards in its two sockets, powered
    at 3.3V or 5V as required.
    The PCI1130 is compliant with the PCI local bus specification revision 2.1 and its PCI interface can
    act as either a PCI master device or a PCI slave device.  The PCI bus mastering is initiated during
    16-bit PC Card DMA transfers or CardBus PC Card bus mastering cycles.
    All card signals are internally buffered to allow hot insertion and removal without external buffering.
    The PCI1130 internal data path logic allows the host to access 8-, 16-, and 32-bit cards using full
    32-bit PCI cycles for maximum performance.  Independent 32-bit write buffers allw fast-posted
    writes to improve system-bus utilization.
    An advanced CMOS process is used to achieve low system power consumption while operating at
    PCI clock rates up to 33 MHz.  Several low power modes allow the host power-management system
    to further reduce power consumption.
    The pin diagrams are shown in Figure 4-9 first for PCI-TO-PC CARD (16-BIT); then Figure 4-10 for
    PCI-TO-CARDBUS (32-BIT).Figure 4-9TI1130 Chip PCI-to-PC card (16-bit) Pinouts 
    						
    							Service Guide4-17Figure 4-10TI1130 Chip PCI-to-CardBus (32-bit) Pinouts 
    						
    							4-18Theory of Operation A simplified block diagram of the PCMCIA Controller is shown in Figure 4-11.Figure 4-11TI1130 Chip Simplified Block Diagram 
    						
    							Service Guide4-19 4.3.8 NS87336VJG Super I/O Controller
    The PC87336VJG is a single chip solution for most commonly used I/O periherals in ISA< and EISA
    based comptuers.  It incorporates a Floppy Disk Controller (FDC), two full featured UARTS, and an
    IEEE 1284 compatible parallel port Standard PC-AT address decoding for all the peripherals and a
    set of configuration registers are also implemented in this highly integrated member of the Super I/O
    family.  Advanced power management features, mixed voltage operation and integrated Serial-
    Infrared (both IrDA and Sharp) support makes the PC87336 an ideal choice for low-power and/or
    portable personal computer applications.
    The PC87336 FDC uses a high performance digital data separator eliminating the need for any
    external filter components.  It is fully compatible with the PC8477 and incorporates a superset of
    DP8473, NEC PD765 and N82077 floppy disk controller functions.  All popular 5.25” and 3.5” floppy
    drives, including the 2.88 MB 3.5” floppy drive, are supported.  In addition, automatic media sense
    and 2 Mbps tape drive support are provided by the FDC.
    The two UARTs are fully NS16450 and NS16550 compatible.  Both ports support MIDI baud rates
    and one port also supports IrDAs the HP SIR and Sharp SIR compliant signaling protocol.
    The parallel port is fully IEEE 1284 level 2 compatible.  The SPP (Standard Parallel Port) is fully
    compatible with ISA dand EISA parallel ports.  In addtion to the SPP, EPP (Enhanced Parallel Port)
    and ECP (Extended Capabilities Port) modes are supported by the parallel port.
    A set of configuration registers are provided to control the Plug and Play and other various functions
    of the PC87336 .  These registers are accessed using tow 98-bit wide index and data registers.  The
    ISA I/O address of the register pari can be relocated using a power-up strapping option and the
    software configuration after power-up.
    When idle, advanced power management features allow the PC87336 to enter extremely low power
    modes under software control.  The PC87336 can operate from a 5V or a 3.3V power supply.  A
    unique I/O cell structure allows the PC87336 to interface directly with 5V external components while
    operating from a 3.3V power supply.
    Some of the major features include:
    · 100% compatible with ISA and EISA architectures
    · Floppy Disk Controller:
    · Software compatible with the DP8473, the 765A and the N82077
    · 16-byte FIFO (disabled by default)
    · Burst and non-burst modes
    · Perpendicular recording drive support
    · New high-performance internal digital data separator (no external filter components
    required)
    · Low-power CMOS with enhanced power-down mode
    · Automatic media-sense support, with full IBM TDR (Tape Drive Register)
    implementation
    · Supports fast 2 Mbps and standard 1 Mbps/500 kbps/250 kbps tape drives
    · Parallel Port
    · Enhanced Parallel Port (EPP) compatible 
    						
    							4-20Theory of Operation · Extended Capabilitie Port (ECP) compatible, including level 2 support
    · Bidirectional under either software or hardware control
    · Compatible with ISA and EISA architectures
    · Ability to multiplex FDC signals on parallel port pins allows use of an external Floppy
    Disk Drive (FDD)
    · Includes protection circuit to prevent damage to the parallel port when a connected
    printer is powered up or is operated at a higher voltage
    · UARTs:
    · Software compatible with the PC16550A and PC16450
    · MIDI baud rate support
    · Infared support on UART2 (IrDA and Sharp-compliant)
    · Address Decoder
    · 6-bit or 10-bit decoding
    · External Chip Select capability when 10-bit decoding
    · Full relocation capability (no limitation)
    · Enhanced Power Management
    · Special configuration registers for power-down
    · Enhanced programmable power-down FDC command
    · Auto power-down and wake-up modes
    · 2 special pins for power management
    · Typical current consumption during power-down is less than 10 µA
    · Reduced pin leakage current
    · Mixed Voltage support
    · Supports standard 5V operation
    · Supports 3.3V operation
    · Supports mixed internal 3.3V operation with 3.3V/5V external configuration
    · General Purpose Pins:
    · 2 pins the Bidirectional Parallel Port, for 2 separate programmable chip select
    decoders, can be programmed for game port control
    · Plug and Play Compatible:
    · 16 bit addressing (full programmable)
    · 10 selectable IRQs
    · 3 selectable DMA Channels
    · 3 SIRQ Inputs allow external devices to mapping IRQs
    · 100-pin TQFP package - PC87336VJG 
    						
    							Service Guide4-21 The pin diagram is shown in Figure 4-12.Figure 4-12NS87336VJG Chip Pinouts 
    						
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