Acer Extensa 650 Maintenance Manual

                                                                                                              Theory of Operation  4-15  
Figure 4-7  M6377 Chip Pinouts 

4-16   Theory of Operation
4.3.2.4 C&T 65550 High Performance Flat Panel / CRT VGA
Controller
The C&T65550 of high performance multimedia flat panel / CRT GUI accelerators extend CHIPS’
offering of high performance flat panel controllers for full-featured note books and sub-notebooks. The
C&T65550 offers 64-bit high performance and new hardware multimedia support features.
HIGH PERFORMANCE
Based on a totally new internal architecture, the C&T65550, integrates a powerful 64-bit graphics
accelerator engine...

                                                                                                              Theory of Operation  4-17  
A simplified block diagram of the C&T65550 is shown in Figure 4-8. 
Figure 4-8  C&T65550 Simplified Block Diagram
LOW POWER CONSUM PTION
The C&T65550 employs a variety of advanced power management features to reduce power consumption
of the display sub-system and extend battery life. Although optimized for 3.3V operation, The C&T65550
controllers internal logic. memory...

4-18   Theory of Operation
A simplified block diagram of the PCMCIA Controller is shown in Figure 4-9.
4.3.2.5 TI1130 PCMCIA Controller
The Tl PCI1130 is a high-performance PCI-to-PC Card controller that supports two independent PC Card
sockets compliant with the 1995 PC card standard. The PCI1130 provides a set of features that make it
ideal for bridging between PCI and PC Cards in both notebook and desktop computers. The 1995 PC Card
standard retains the 16-bit PC Card specification defined in PCMCIA...

                                                                                                              Theory of Operation  4-19  
Figure 4-9  PCMCIA Controller, Simplified Block Diagram 

4-20   Theory of Operation
4.3.2.6 NS87336VJG Super I/O Controller
The PC87336VJG is a single chip solution for most commonly used I/O peripherals in ISA, and EISA
based computers. It incorporates a Floppy Disk Controller(FDC), two full featured UARTs, and an IEEE
1284 compatible parallel port Standard PC-AT address decoding for all the peripherals and a set of
configuration registers are also implemented in this highly integrated member of the Super l/O family.
Advanced power management features, mixed...

                                                                                                              Theory of Operation  4-21  
· Parallel Port
· Enhanced Parallel Port(EPP) compatible
· Extended Capabilities Port(ECP) compatible, including level 2 support
· Bidirectional under either software or hardware control
· Compatible with ISA, and EISA, architectures
· Ability to multiplex FDC signals on parallel port pins allows use of an external Floppy Disk
Drive(FDD)
· Includes protection circuit...

4-22   Theory of Operation
A simplified block diagram of the Super I/O controller is provided in Figure 4-10. 
Figure 4-10  Super I/O Controller Block Diagram
· Plug and Play Compatible:
· 16 bit addressing(full programmable)
· 10 selectable IRQs
· 3 selectable DMA Channels
· 3 SIRQ Inputs allows external devices to mapping IRQs
100-Pin TQFP package - PC87336VJG
Configuration
RegistersUART
(16550 or 16450)UART
+ IrDA/HP & Sharp IR
(16550 or 16450)
General
Purpose
RegistersPower
Down LogicIEEEE1284...

                                                                                                              Theory of Operation  4-23  
4.3.2.6 ESS1688 Audio Controller
ESS Technology has developed the ES1688 AudioDriveâ, a single chip solution for adding 16-bit
stereo audio and four-operator FM music synthesis to personal computers.  It has integrated all the
major blocks of audio in to a single chip that can be designed into a motherboard, notebook PC,
add-on card, or integrated onto other peripheral...

4-24   Theory of Operation
Figure 4-11  ES1688 Sound Chip Block Diagram
FIFO
/DMA
Control
Mixer
Register
MPU
401
256-Byte
FIFO
ES1688
Processor
DSP Interface
A/D
& D/A
Control
Analog
Circuit
ISA
Bus
Interface.