Acer Aspire 8942 Service Guide
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Chapter 4201 USB (Right Up/Down Side) Failure If the right-side USB fails, perform the following actions one at a time to correct the problem. Do not replace non-defective FRUs: Other Failures If the CRT Switch, Dock, LAN Port, external MIC or Speakers, PCI Express Card, 5-in-1 Card Reader or Volume Wheel fail, perform the following general steps to correct the problem. Do not replace non-defective FRUs: 1.Check Drive whether is OK. 2.Check Test Fixture is ok. 3.Swap M/B to Try. Intermittent Problems Intermittent system hang problems can be caused by a variety of reasons that have nothing to do with a hardware defect, such as: cosmic radiation, electrostatic discharge, or software errors. FRU replacement should be considered only when a recurring problem exists. When analyzing an intermittent problem, do the following: 1.Run the advanced diagnostic test for the system board in loop mode at least 10 times. 2.If no error is detected, do not replace any FRU. 3.If any error is detected, replace the FRU. Rerun the test to verify that there are no more errors. Start Check USB/B to M/B cable Re-assemble th e USB/B cable to M/B OK NG Check USB/B OK Swap USB/B and USB cable OK NG Swap M/B
202Chapter 4 Undetermined Problems The diagnostic problems does not identify which adapter or device failed, which installed devices are incorrect, whether a short circuit is suspected, or whether the system is inoperative. Follow these procedures to isolate the failing FRU (do not isolate non-defective FRU). NOTE: Verify that all attached devices are supported by the computer. NOTE: Verify that the power supply being used at the time of the failure is operating correctly. (See “Power On Issue” on page 192.): 1.Power-off the computer. 2.Visually check them for damage. If any problems are found, replace the FRU. 3.Remove or disconnect all of the following devices: • Non-Acer devices • Printer, mouse, and other external devices •Battery pack • Hard disk drive •DIMM • CD-ROM/Diskette drive Module • PC Cards 4.Power-on the computer. 5.Determine if the problem has changed. 6.If the problem does not recur, reconnect the removed devices one at a time until you find the failing FRU. 7.If the problem remains, replace the following FRU one at a time. Do not replace a non-defective FRU: • System board • LCD assembly
Chapter 4203 Post Codes These tables describe the POST codes and descriptions during the POST. Chipset POST Codes The following table details the chipset POST codes and functions used in the POST. Code Beeps POST Routine Description 02h Verify Real Mode 03h Disable Non-Maskable Interrupt (NMI) 04h Get CPU type 06h Initialize system hardware 08h Initialize chipset with initial POST values 09h Set IN POST flag 0Ah Initialize CPU registers 0Bh Enable CPU cache 0Ch Initialize caches to initial POST values 0Eh Initialize I/O component 0Fh Initialize the local bus IDE 10h Initialize Power Management 11h Load alternate registers with initial POST values 12h Restore CPU control word during warm boot 13h Initialize PCI Bus Mastering devices 14h Initialize keyboard controller 16h 1-2-2-3 BIOS ROM checksum 17h Initialize cache before memory autosize 18h 8254 timer initialization 1Ah 8237 DMA controller initialization 1Ch Reset Programmable Interrupt Controller 20h 1-3-1-1 Test DRAM refresh 22h 1-3-1-3 Test 8742 Keyboard Controller 24h Set ES segment register to 4 GB 26h Enable A20 line 28h Autosize DRAM 29h Initialize POST Memory Manager 2Ah Clear 512 KB base RAM 2Ch 1-3-4-1 RAM failure on address line xxxx* 2Eh 1-3-4-3 RAM failure on data bits xxxx* of low byte of memory bus 2Fh Enable cache before system BIOS shadow 30h 1-4-1-1 RAM failure on data bits xxxx* of high byte of memory bus 32h Test CPU bus-clock frequency 33h Initialize Phoenix Dispatch Manager 36h Warm start shut down 38h Shadow system BIOS ROM
204Chapter 4 3Ah Autosize cache 3Ch Advanced configuration of chipset registers 3Dh Load alternate registers with CMOS values 42h Initialize interrupt vectors 45h POST device initialization 46h 2-1-2-3 Check ROM copyright notice 48h Check video configuration against CMOS 49h Initialize PCI bus and devices 4Ah Initialize all video adapters in system 4Bh QuietBoot start (optional) 4Ch Shadow video BIOS ROM 4Eh Display BIOS copyright notice 50h Display CPU type and speed 51h Initialize EISA board 52h Test keyboard 54h Set key click if enabled 58h 2-2-3-1 Test for unexpected interrupts 59h Initialize POST display service 5Ah Display prompt Press F2 to enter SETUP 5Bh Disable CPU cache 5Ch Test RAM between 512 and 640 KB 60h Test extended memory 62h Test extended memory address lines 64h Jump to UserPatch1 66h Configure advanced cache registers 67h Initialize Multi Processor APIC 68h Enable external and CPU caches 69h Setup System Management Mode (SMM) area 6Ah Display external L2 cache size 6Bh Load custom defaults (optional) 6Ch Display shadow-area message 6Eh Display possible high address for UMB recovery 70h Display error messages 72h Check for configuration errors 76h Check for keyboard errors 7Ch Set up hardware interrupt vectors 7Eh Initialize coprocessor if present 80h Disable onboard Super I/O ports and IRQs 81h Late POST device initialization 82h Detect and install external RS232 ports 83h Configure non-MCD IDE controllers 84h Detect and install external parallel ports 85h Initialize PC-compatible PnP ISA devices Code Beeps POST Routine Description
Chapter 4205 86h Re-initialize onboard I/O ports. 87h Configure Motherboard Configurable Devices (optional) 88h Initialize BIOS Data Area 89h Enable Non-Maskable Interrupts (NMIs) 8Ah Initialize Extended BIOS Data Area 8Bh Test and initialize PS/2 mouse 8Ch Initialize floppy controller 8Fh Determine number of ATA drives (optional) 90h Initialize hard-disk controllers 91h Initialize local-bus hard-disk controllers 92h Jump to UserPatch2 93h Build MPTABLE for multi-processor boards 95h Install CD ROM for boot 96h Clear huge ES segment register 97h Fixup Multi Processor table 98h 1-2 Search for option ROMs. One long, two short beeps on checksum failure 99h Check for SMART Drive (optional) 9Ah Shadow option ROMs 9Ch Set up Power Management 9Dh Initialize security engine (optional) 9Eh Enable hardware interrupts 9Fh Determine number of ATA and SCSI drives A0h Set time of day A2h Check key lock A4h Initialize Typematic rate A8h Erase F2 prompt AAh Scan for F2 key stroke ACh Enter SETUP AEh Clear Boot flag B0h Check for errors B2h POST done - prepare to boot operating system B4h 1 One short beep before boot B5h Terminate QuietBoot (optional) B6h Check password (optional) B9h Prepare Boot BAh Initialize DMI parameters BBh Initialize PnP Option ROMs BCh Clear parity checkers BDh Display MultiBoot menu BEh Clear screen (optional) BFh Check virus and backup reminders C0h Try to boot with INT 19 Code Beeps POST Routine Description
206Chapter 4 * If the BIOS detects error 2C, 2E, or 30 (base 512K RAM error), it displays an additional word-bitmap (xxxx) indicating the address line or bits that failed. For example, 2C 0002 means address line 1 (bit one set) has failed. 2E 1020 means data bits 12 and 5 (bits 12 and 5 set) have failed in the lower 16 bits. Note that error 30 cannot occur on 386SX systems because they have a 16 rather than 32-bit bus. The BIOS also sends the bitmap to the port-80 LED display. It first displays the check point code, followed by a delay, the high-order byte, another delay, and then the low-order byte of the error. It repeats this sequence continuously. C1h Initialize POST Error Manager (PEM) C2h Initialize error logging C3h Initialize error display function C4h Initialize system error handler C5h PnPnd dual CMOS (optional) C6h Initialize notebook docking (optional) C7h Initialize notebook docking late C8h Force check (optional) C9h Extended checksum (optional) D2h Unknown interrupt Code Beeps For Boot Block in Flash ROM E0h Initialize the chipset E1h Initialize the bridge E2h Initialize the CPU E3h Initialize system timer E4h Initialize system I/O E5h Check force recovery boot E6h Checksum BIOS ROM E7h Go to BIOS E8h Set Huge Segment E9h Initialize Multi Processor EAh Initialize OEM special code EBh Initialize PIC and DMA ECh Initialize Memory type EDh Initialize Memory size EEh Shadow Boot Block EFh System memory test F0h Initialize interrupt vectors F1h Initialize Run Time Clock F2h Initialize video F3h Initialize System Management Mode F4h 1 Output one beep before boot F5h Boot to Mini DOS F6h Clear Huge Segment F7h Boot to Full DOS Code Beeps POST Routine Description
Chapter 5207 Jumper and Connector Locations Top View ItemDescriptionItemDescription CN4 PWR/B FFC PU1 Charger IC U7 LVDS SW IC CN5 Subwoofer, rear, center SPK con. U2 LAN IC PU2 GPU PWR CN8 KB Backlight conn. PU3 1.5v PWR CN9 MMB FFC conn. CN6 KB conn. Y3 14.318MHz CN7 USB U26 Clock Generator CN10 T/P conn. CN13 New Card cn Y5 32.768 KHz U27 1394 & Card IC U21 EC/KBC CN15 Front SPK conn. U24 BIOS ROM Y4 32.768KHz PU7 SYS PWR CN2 LCD, CCD, D- Microphone conn.CN14 USB FFC CN3 Logo LED and MMB1 wire conn.CN16 BT conn. U1 LCD SW IC U30 ME ROM Chapter 5
208Chapter 5 Bottom View ItemDescriptionItemDescription PU8 CUP Core PWR U45 CPU Socket CN19 Battery conn. CN22 CN23 Mini Card CN25 1 st HDDJDIM1 & JDIM2 DDR3 CN27 SATA ODD CN30 RTC BAT. PU11 AXG PWR. U54 NewCard PWR SW CN34 2 nd HDD conn.PU12 1.05 PWR U53 PCH (HM55) U57 CIR CN36 Media Card Reader U50 Center Amp. U53 CODEC U34 LAN Transformer CN21 PWM FAN conn. PJ1 DC Jack CN17 RJ45 CN18 CRT CN20 DP CN24 HDMI U43 AMD GPU CN26 eSATA + USB CN28 USB CN29 IEEE1394 CN31 Line-IN jack CN33 Microphone jack CN35 Phone Jack + S/PDIF U51 Subwoofer Amp. U56 Rear + HP Amp.
Chapter 5209 Clearing Password Check and BIOS Recovery This section provides you with standard operating procedures for resetting the BIOS password and BIOS recovery for the Aspire 8942. The Aspire 8942 provides one Hardware Open Gap on the main board for clearing password check, and one Hotkey for enabling BIOS Recovery. Clearing Password Check Hardware Open Gap Description is as follows: If users set a BIOS Password (Supervisor Password and/or User Password) for security reasons, the BIOS will prompt for a password during system POST or when the system enters the BIOS Setup menu. If it becomes necessary to bypass the password check, users need to short the HW Gap to reset the password by performing the following procedure: 1.Power off the system and unplug the AC and Battery from the machine. 2.Open the Hard Drive and RAM doors. 3.Remove the Hard drive. 4.Remove the mylar as shown in the above figure. 5.Find the appropriate HW Gap on M/B as shown in the picture. • G1 is the RTC Reset. When asserted, this signal resets register bits in the RTC well. Unless the CMOS is being cleared (only to be done in the G1 power state), the RTCRST# input must always be high when all other RTC power planes are on. In the case where the RTC Battery is dead or missing on the platform, the RTCRST# pin must rise before the RSMRST# pin. • G2 is the Secondary RTC Reset. This signal resets the manageability register bits in the RTC well when the TRTC battery is removed. The SRTCRST# input must always be high when all other RTC power planes are on. In the case where the RTC Battery is dead or missing on the platform, the SRTCRST# pin must rise before the RSMRST# pin. 6.Use an electric conductivity tool to short the two points of the HW Gap (G1). G2 G1
210Chapter 5 7.Plug in AC, keeping the HW Gap shorted, and press Power Button to power on the system till BIOS POST is finished. Once BIOS POST has run, remove the tool from the HW Gap. 8.Restart the system. Press the F2 key to enter BIOS Setup menu. If there is no Password request, the BIOS Password has been successfully cleared. Otherwise, follow the steps and try again. BIOS Recovery by Crisis Disk BIOS Recovery Boot Block: The BIOS Recovery Boot Block is a special block of BIOS which is used to boot up the system with minimum BIOS initialization. Users can enable this feature to restore the BIOS firmware to a successful one in the case that the BIOS flashing process fails. BIOS Recovery Hotkey: The system provides a function hotkey: Fn+Esc, for enabling the BIOS Recovery process when the system is powered on during BIOS POST. To use this function, it is strongly recommended to have both the AC adapter and Battery plugged in. If this function is enabled, the system will force the BIOS to enter a special BIOS block called Boot Block. Steps for BIOS Recovery using a USB crisis disk: A USB crisis disk can be used to recover system BIOS in the event of the BIOS being corrupted. To create the crisis disk use the following steps: 1.Plug in a USB flash disk. Back up any information on the disk, as this process will format your USB flash disk. 2.Launch the wincris.exe program to create a USB Crisis Disk. Click Start to initiate the process. 3.Select the Quick Format option to format the disk and click Start. Follow the instructions on the screen to create the disk. 4.Copy the KAYF0X64.fd BIOS file into the USB flash disk root directory. NOTE: Do not place any other *.fd file in the USB flash disk root directory. To use the Crisis USB key, do the following: 1.Plug the USB flash disk into a USB port. 2.Press Fn + ESC button then plug in AC power. The Power button flashes orange once. 3.Press Power button to initiate system CRISIS mode. When CRISIS is complete, the system auto restarts with a workable BIOS. 4.Update to the latest version of BIOS for this machine by the regular BIOS flashing process.