Acer Aspire 6930 Service Guide

Chapter 4141
0x12 TIS wait command ready failed (prepare to send) DXE TCG
0x12 TIS abort send command due to timeout DXE TCG
0x12 TIS abort sendAndGo command due to timeout DXE TCG
0x04 TIS wait bit set failed before send last byte DXE TCG
0x12 TIS abort command due to timeout before send last byte DXE TCG
0x04 TIS wait bit clear failed when sending last byte DXE TCG
0x22 TCG Physical Presence execution DXE TCG
0xB1 TCG DXE common pass through DXE TCG
0xE3 First Legacy BIOS Task table for legacy reset...

142Chapter 4
0x22 Reset the keyboard. LBT Core
0x40 Test A20 line LBT Core
0x67 Quick initialization of all Application Processors in a multi-
processor systemLBT Core
0x32 Compute CPU speed. LBT Core
0x69 Initialize the handler for SMM. LBT Core
0x6B If CMOS is bad, load Custom Defaults from flash into CMOS. If 
successful, reboot.LBT Core
0x3C If CMOS is valid, load chipset registers with values from 
CMOS, otherwise load defaults and display Setup prompt. If 
Auto Configuration is enabled, always load...

Chapter 4143
0xD6 Initialize PC card LBT Core
0x58 Test for unexpected interrupts. First do an STI for hot 
interrupts. Secondly, test the NMI for an unexpected interrupt. 
Thirdly, enable the parity checkers and read from memory, 
checking for an unexpected interrupt.LBT Core
0x3F ROMPolit memory init LBT Core
0xC4 Install the IRQ vectors (Sever Hotkey) LBT Core
0x7C Initialize the hardware interrupt vectors from 08 to 0F and from 
70h to 77H. Also set the interrupt vectors from 60h to 66H to 
zero.LBT...

144Chapter 4
0x72 Check status bits to see if configuration problems were 
detected. If so, display error messages on the screen.LBT Core
0x4F Initialize MultiBoot. Allocate memory for old and new MultiBoot 
history tables.LBT Core
0xCD Reclaim console vector after HW vectors initialized. LBT Core
0x7D Initialize Intelligent System Monitoring. LBT Core
0x7E The Coprocessor initialization test. Use the floating point 
instructions to determine if a coprocessor exists instead of the 
ET bit in CR0.LBT...

Chapter 4145
0xB6 If password on boot is enabled, a call is made to Setup to 
check password. If the user does not enter a valid password, 
Setup does not return.LBT Core
0x98 Search for option ROMs. Rom scan the area from C800h for a 
length of BCP_ROM_Scan_Size (or to E000h by default) on 
every 2K boundary, looking for add on cards that need 
initialization.LBT Core
0x93 Build the MPTABLE for multi-processor boards LBT Core
0xD9 IPMI late init LBT Core
0x9C Set up Power Management. Initiate power...

146Chapter 4
0xB7 Initialize ACPI BIOS. LBT Core
0x9B Enable CPU management (Geyserville I) LBT Core
0xBD Display Boot First menu if MultiBoot is installed and hotkey 
pressed.LBT Core
0xBF Check virus and backup reminders. LBT Core
0x97 Create pointer to MP table in Extended BDA. LBT Core
0x99 Check support status for Self-Monitoring Analysis Reporting 
Technology (disk-failure warning).LBT Core
0xB1 Unload ROM Pilot LBT Core
0xDD Perform remote flash if requested LBT Core
0xC7 If UCR redirection is...

Chapter 5147
Jumper and Connector Locations
Top View
LAN Transformer 
LCD wire Conn. PWR wire conn. 
Int. Speaker Conn. PWR/B FFC Conn. 
K/B FFC conn. 
Logo backlight PWR conn.   
MMB FFC conn.   
Charger IC 
EC/ KBC KBC X’tal 
S.B. X’tal 
3/5V PWR IC BT wire conn. 
MDC b2b conn. USB/B wire conn..
Media Carder IC RTC batt. conn.. 
1.8V PWR IC. 
Subwoofer conn, 
CRT switch 
2.5V PWR IC 
eSATA re-driver IC
USB PWR IC 
Express Card 
LAN switch IC 
Chapter 5 

148Chapter 5
Bottom View
LAN control IC 
Battery connector 
CPU core PWR IC 
Acer ID ROM 
System BIOS ROM 
S.B. (ICH9M) 
ODD conn. 
1st HDD conn. 
2nd HDD conn. 
Card Reader conn 
Dual m-PCIe conn. 
CIR IC 
1.5V PWR IC 
CLG. GEN. 
CLG. GEN. X’tal
Woofer IC 
Audio CODEC 
RJ45 I/O 
Docking I/O 
CRT I/O 
N.B. Cantiga 
CRT IC 
FAN conn. 
FAN Ctrl IC 
HDMI IC 
Thermal IC 
MXM conn. 
HDMI I/O eSATA I/O 
USB I/O 
CPU socket 
Phone jack & S/PDIF 
Microphone jack 
Line-IN jack 
Amplifier 
SO-DIMM sockets  

Chapter 2149
Clearing Password Check and BIOS Recovery
This section provide you the standard operating procedures of clearing password and BIOS recovery for 
Aspire 6930/6930G. Aspire 6930/6930G provides one Hardware Open Gap on main board for clearing 
password check, and one Hotkey for enabling BIOS Recovery.
Clearing Password Check
Hardware Open Gap Description
Steps for Clearing BIOS Password Check
If users set BIOS Password (Supervisor Password and/or User Password) for a security reason, BIOS will...

150Chapter 5
BIOS Recovery by Crisis Disk
BIOS Recovery Boot Block:
BIOS Recovery Boot Block is a special block of BIOS. It is used to boot up the system with minimum BIOS 
initialization. Users can enable this feature to restore the BIOS firmware to a successful one once the previous 
BIOS flashing process failed.
BIOS Recovery Hotkey:
The system provides a function hotkey: Fn+Esc, for enable BIOS Recovery process when system is powered 
on during BIOS POST. To use this function, it is strongly...