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Sony Vx8 Owners Manual

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    							Ð 81 Ð
    Pin No.Pin NameI/O Function
    41 TE I Tracking error signal input
    42 CE I Center servo analog input
    43 RFDC I RF signal input
    44 ADI0 O Test pin (Not used)
    45 AVSS0 Ñ Analog ground
    46 IGEN I Power supply pin operational amplifiers
    47 AVDD Ñ Analog power supply
    48 ASYO O EFM full swing output
    49 ASYI I Asymmetry comparate voltage input
    50 RFAC I EFM signal input
    51 AVSS1 Ñ Analog ground
    52 CLTV I Control voltage input for master VCO
    53 FILO O Filter output for master PLL
    54 FILI I Filter input for master PLL
    55 PCO O Charge-pump output for master PLL
    56 AVDD1 Ñ Analog power supply
    57 BIAS I Asymmetry circuit constant current input
    58 VCTL I Control voltage input for variable pitch PLL
    59 V16M I/O 16.9344MHz output (Not used)
    60 VPCO O Charge-pump output for variable pitch PLL (Not used)
    61 DVDD2 Ñ Digital power supply
    62 ASYE I Asymmetry circuit ON/OFF
    63 MD2 I Digital-out ON/OFF control
    64 DOUT O Digital-out output
    65 LRCK O 48-bit slot D/A interface, LR clock output
    66 PCMD O 48-bit slot D/A interface, Serial deta output
    67 BCLK O 48-bit slot D/A interface, bit clock output
    68 EMPH O Playback disc output in emphasis mode (Not used)
    69 XTSL I XÕtal selection input pin
    70 DVSS2 Ñ Digital ground
    71 XTAI I XÕtal oscillator circuit input
    72 XTAO O XÕtal oscillator circuit output (Not used)
    73 SOUT O
    74 SOCK O (Not used)
    75 XOCT O
    76 SQSO O Sub-Q serial output
    77 SQCK I Clock input for SQSO read-out
    78 SCSY I Sub-code input
    79 SBSO O Sub-P through Sub-W serial output (Not used)
    80 EXCR I Clock input for SBSO read-out 
    						
    							Ð 82 Ð
    Pin No.Pin Name I/O Function ¥ IC502 MPEG DECODER, MECHANISM CONTROL (M30620MC-A05FP) (VIDEO (1/3) Board)
    1 SENSE I Internal state (SENSE) monitor input (IC101)
    2 SENSE CLK O Serial data reading clock output (IC101)
    3 DSP DATA O Serial data output (IC101)
    4 DSP LATCH O Lach output (IC101)
    5 DSP CLK OSerial data clock output (IC101)
    6 TSENS I Not used
    7 REMOTE IN I Not used
    8 BYTE I External bus width change input (Connected to ground)
    9 VSS Ð Ground
    10 DSP MUTE O Mute output (IC101) ÒHÓ : mute
    11 CTRL1 (L : DOUBLE) O Double change output (IC101) ÒLÓ : double
    12 XRESET I System reset input ÒLÓ : reset
    13 XOUT O Main clock output (10MHz)
    14 VSS Ð Ground
    15 XIN I Main clock input (10MHz)
    16 VCC Ð +5V power supply
    17 NMI I Requests mask disable interruption input (Connected to +5V)
    18 SCOR I Subcode sync input (IC101)
    19 D SENS I Not used
    20 CL680 INT I Video CD interruption input (IC505)
    21 CL680 HSEL O Video CD select data of the host MPU (IC505)
    22 DF LATCH O Digital filter latch output (IC509)
    23 CL680 HRDY I Ready signal input for communication to the host MPU (IC505)
    24 680 RESET O Video CD reset output (IC505) ÒLÓ : reset
    25 JOG1 I Not used
    26 JOG2 I Not used
    27 CTRL2 O Double control output (IC101) ÒHÓ : double
    28 LD ON O Laser diode ON/OFF output
    29 IIC1 I/O
    IIC convertion microcomputer receive data (Former type), IIC clock input from master control (New type)
    30 IIC0 I/OIIC convertion microcomputer transmittion data (Former type), IIC data input from master control (New type)
    31 DATA1O O Serial 1 data output (IC505, 509)
    32 DATA1I I Serial 1 data input (IC505, 509)
    33 CLK1 O Serial 1 clock output
    34 SHARPNESS O Sharpness output L : normal, H : sharpness
    35 XVLEVEL. DOWN O Fix the video signal output level output
    36 SUBQ DATA I Serial 2 data input for subcode sync reading
    37 SUBQ CLK I Serial 2 clock input for subcode sync reading
    38 P. ON I Not used
    39 BUS XRDY I Not used
    40 BUS I Not used
    41 BUS XHOLD I Not used
    42, 43 BUS I Not used
    44 BUS XRD I Model selection input ÒLÓ : chinese model, ÒHÓ : except chinese model
    45 BUS I V sync signal input 
    						
    							Ð 83 Ð
    Pin NameI/O
    Function
    46 BUS XWRL I Not used
    47 LO. BOOST I Not used
    48 AUDIO MUTE O Audio mute output ÒLÓ : mute
    49 LOAD OUT I Not used
    50 LOAD IN I Not used
    51 INSW I Not used
    52 OUTSW I Not used
    53 MODEL 1 I L : System input (Fixed at ÒLÓ)
    54 MODEL 2 I L : System input (Fixed at ÒLÓ)
    55 TBLL I Not used
    56 TBLR I Not used
    57 ENC 1 I Not used
    58 ENC 2 I Not used
    59 ENC 3 I Not used
    60 Ñ I Not used
    61 Ñ I Not used
    62 VCC Ð +5V power supply
    63 Ñ I Not used
    64 VSS Ð Ground
    65 A7 O Video mute output ÒLÓ
    66 to 71 A6 to A1 I Not used
    72 U to I I IIC convertion microcomputor transmittion input
    73 TEST LED O TEST LED for MPEG decoder
    74 TEST 1 I Test mode for Video CD check
    75 TEST 2 I Test mode for servo check
    76 TEST 3 I Not used
    77 DEVICE RESET O Device system rest output ÒLÓ : reset
    78 STANDBY I Not used
    79 FL CS I Not used
    80 FL I Not used
    81 to 88 D7 to D0 I Not used
    89 MIC CTRL I Not used
    90 KEY 1 I Not used
    91 KEY 2 I Not used
    92 KEY 3 I Not used
    93 NY/PAL I NTSC/PAL select switch input
    94 MUSIC VOL I Not used
    95 KEY 4 I Not used
    96 AVSS Ð A/D converter ground
    97 MODE. SW I Not used
    98 VREF I A/D converter reference voltage input (Connected to +5V)
    99 AVCC Ð A/D converter +5V power supply
    100 AMP. ON I Not used Pin No. 
    						
    							Ð 84 Ð
    Pin No.Pin Name I/O Function ¥ IC505 CD DECODER, SYSTEM CONTROL (CL680T-D1) (VIDEO (2/3) Board)
    1 NC Ð Not used
    2 VSS Ð Ground
    3 CD-BCK I CD Decode bit clock
    4 CD-DATA I CD Decode data
    5 CD-LRCK I CD Decode Left or Right channel selection clock
    6 CD-C2PO I CD Decode C2 error data
    7 NC Ð Not used
    8 NC Ð Not used
    9 NC Ð Not used
    10 MD0 I/O Data bus between Microcode ROM/DRAM and CL680
    11 MD1 I/O Data bus between Microcode ROM/DRAM and CL680
    12 MD2 I/O Data bus between Microcode ROM/DRAM and CL680
    13 MD3 I/O Data bus between Microcode ROM/DRAM and CL680
    14 MD4 I/O Data bus between Microcode ROM/DRAM and CL680
    15 MD5 I/O Data bus between Microcode ROM/DRAM and CL680
    16 VSS Ð Ground
    17 MD6 I/O Data bus between Microcode ROM/DRAM and CL680
    18 VDD3 Ð +3.3V Power supply
    19 MD7 I/O Data bus between Microcode ROM/DRAM and CL680
    20 VSS Ð Ground
    21 MD8 I/O Data bus between Microcode ROM/DRAM and CL680
    22 VDD3 Ð +3.3V Power supply
    23 MD9 I/O Data bus between Microcode ROM/DRAM and CL680
    24 MD10 I/O Data bus between Microcode ROM/DRAM and CL680
    25 MD11 I/O Data bus between Microcode ROM/DRAM and CL680
    26 MD12 I/O Data bus between Microcode ROM/DRAM and CL680
    27 MD13 I/O Data bus between Microcode ROM/DRAM and CL680
    28 MD14 I/O Data bus between Microcode ROM/DRAM and CL680
    29 MD15 I/O Data bus between Microcode ROM/DRAM and CL680
    30 NC Ð Not used
    31 NC Ð Not used
    32 NC Ð Not used
    33 NC Ð Not used
    34 NC Ð Not used
    35 NC Ð Not used
    36 NC Ð Not used
    37 MCE O Chip enable signal to Microcode ROM
    38 MWE O Write enable signal to DRAM
    39 VSS Ð Ground
    40 CAS O Column address strove : Latch the column address to DRAM
    41 VDD3 Ð +3.3V power supply
    42 RAS0 O Row address strove : Latch row address to DRAM
    43 RAS1 Ð Not used
    44 MA10 O Address data from CL680 to Microcode ROM
    45 MA9 O Address data from CL680 to Microcode ROM 
    						
    							Ð 85 Ð
    Pin NameI/O
    FunctionPin No.
    46 MA8 O Address data from CL680 to Microcode ROM/DRAM
    47 VSS Ð Ground
    48 MA7 O Address data from CL680 to Microcode ROM/DRAM
    49 VDD3 Ð +3.3V Power supply
    50 MA6 O Address data from CL680 to Microcode ROM/DRAM
    51 MA5 O Address data from CL680 to Microcode ROM/DRAM
    52 MA4 O Address data from CL680 to Microcode ROM/DRAM
    53 VSS Ð Ground
    54 MA3 O Address data from CL680 to Microcode ROM/DRAM
    55 VDD3 Ð +3.3V Power supply
    56 MA2 O Address data from CL680 to Microcode ROM/DRAM
    57 MA1 O Address data from CL680 to Microcode ROM/DRAM
    58 MA0 O Address data from CL680 to Microcode ROM/DRAM
    59 PGIO7 I/O Not used
    60 RESET I Reset signal input from the host MPU
    61 VDDMAX-IN I Fix the maxium input voltage each input pin and I/O pin
    62 NC Ð Not used
    63 NC Ð Not used
    64 NC Ð Not used
    65 AGND DAC Ð Ground
    66 AVDD DAC Ð +3.3V Power supply
    67 COMPOS OUT O Not used
    68 AGND DAC Ð Ground
    69 Y-OUT O Luminance signal out
    70 AVDD DAC Ð +3.3V Power supply
    71 AGND DAC Ð Ground
    72 RREF I Fix the video signal output level
    73 (1.235V) VREF O Reference voltage (+1.235V)
    74 AVDD DAC Ð +3.3V Power supply
    75 C-OUT O Chrominance signal out
    76 AGND DAC Ð Ground
    77 (GCK INT) CLK SEL I GCK selection ÒHÓ; Internal, ÒLÓ; External
    78 CLK SEL I DA-XCK selection (1)
    79 CLK SEL I DA-XCK selection (2)
    80 VSS Ð Ground
    81 RESERVED I Selection the operation clock 42.336MHz
    82 VDD3 Ð +3.3V Power supply
    83 DA-EMP Ð Not used
    84 RESERVED Ð Not used
    85 AGND PLL Ð Ground
    86 DA-XCLK I Main reference clock input (16.9344MHz=384fs)
    87 AVDD PLL Ð +3.3V
    88 PGIO4 I/O Not used
    89 PGIO5 I/O Not used
    90 PGIO6 I/O Not used 
    						
    							Ð 86 Ð
    Pin NameI/O
    Function
    Pin No.
    91 PGIO0 I/O Not used
    92 PGIO8 I/O Not used
    93 PGIO2/VSYNC/CSYNC O Vertical synchronized signal of video signal
    94 AVDD PLL Ð +3.3V Power supply
    95 NC Ð Not used
    96 NC Ð Not used
    97 NC Ð Not used
    98 AGND PLL Ð Ground
    99 VSS Ð Ground
    100 NC Ð Not used
    101 PGIO3/HSYNC I/O Not used
    102 VDD3 Ð +3.3V Power supply
    103 PGIO1/VCK-OUT I/O Not used
    104 VSS Ð Ground
    105 GCK I Not used
    106 VCK-IN I Main clock for video signal processer
    107 GCKOUT/DA-EMP O Not used
    108 DA-LRCK O Digital Audio Left or Right channel selection clock
    109 VDDMAX-OUT O Fix the maxium output voltage certain output pins (Connected to +5V)
    110 DA-DATA O Digital Audio  data
    111 DA-BCK O Digital Audio bit clock
    112 HD-OUT O Serial Data output from CL680 to the host MPU
    113 HRDY O Ready signal CL680 is ready for communication to the host MPU
    114 HINT O Request signal for interrupting the host MPU
    115 CDG-SCK I/O Not used
    116 VSS Ð Ground
    117 HCK I Host clock : referance signal for the host bus interface
    118 VDD3 Ð +3.3V Power supply
    119 HD-IN I Serial Data output ftom the host MPU to CL680
    120 VDD3 Ð +3.3V Power supply
    121 HSEL I Select data or address of the host MPU
    122 CDG-SDATA I Ground (Not used)
    123 CDG-VFSY I Ground (Not used)
    124 CDG-SOS1 I Ground (Not used)
    125 NC Ð Not used
    126 NC Ð Not used
    127 NC Ð Not used
    128 NC Ð Not used 
    						
    							Ð 87 Ð
    ¥ IC501 MASTER CONTROL (M30622MA-A09FP) (MAIN Board)
    Pin No.Pin NameI/O Function
    1 STK-MUTE O Power amp ON/OFF signal output
    2 POWER O Power ON/OFF signal output
    3 F-RELAY O Front speaker relay control output
    4 REAR-RELAY O Rear speaker relay control output (Not used)
    5 CD-POWER O CD power on signal output
    6 LINE-MUTE O Line mute ON/OFF selection output
    7 DBFB-H/L O DBFB H/L select signal output
    8, 9 Ð Ð Not used
    10 XC-IN I
    11 XC-OUT O
    12 RESET I Reset signal input
    13 X-OUT O XÕtal (16MHz)
    14 VSS Ð Ground
    15 X-IN I XÕtal (16MHz)
    16 VCC Ð Power supply (+5V)
    17 NMI I Not used (PULL UP EVER+5V)
    18 WAKE UP I WAKE UP (Fixed at fixed at ÒLÓ)
    19 SCOR I Subcode data request signal output (Not used)
    20 RDS-INT I
    21 RDS-DATA I
    22 AC-CUT I Back up signal input
    23 PL-CLK O Clock signal to pro-logic (Not used)
    24 PL-DATA O Data signal to pro-logic (Not used)
    25 PL-LAT O Latch signal to pro-logic (Not used)
    26 TIMER LED I Timer LED ON/OF
    27 PROTECTOR I Speaker protect ON/OF
    28 Ð Ð Not used
    29 IIC-CLK O Clock output for IC601
    30 IIC-DATA O Data output for IC601
    31 Ð Ð Not used
    32 SQ-DATA I Subcode Q data clock input
    33 SQ-CLK I Not used
    34 SW-MODE O Not used
    35 CD-DATA O CD data output (Not used)
    36 RY-SW I Head phone swich detect
    37 CD-CLK O CD clock output (Not used)
    38 493-LAT O Latch signal output for M62493FP (IC101)
    ST-BY LED/
    CLOCK-OUT
    40 L+R/L-R I
    41 BY-PASS I
    42 FL-SW I FL switch ON/OFF
    43 STBY RELAY I Stand by relay ON/OFF
    44 BASS FREQ O FREQ high/low signal for SYNC bass
    45, 46 Ð Ð Not used
    47 493-DATA O Data output for M62493FP (IC101)
    48 493-CLK O Clock output for M62493FP (IC101)
    49 ST-MUTE O Tuned mute signal outputXÕtal (32.768MHz)
    RDS data interrupt input
    39O Clock ond stand by LED signal output
    Not used 
    						
    							Ð 88 Ð
    Pin No.Pin NameI/O Function
    50 STEREO I Stereo detection for tuner
    51 TUNED I Tuned detection for tuner
    52 ST-CE O Tuner chip enable output
    53 ST-DOUT O Tuner data output
    54 ST-DIN I Tuner data input
    55 ST-CLK O Tuned clock output
    56 SENS I BD Condition signal input (Not used)
    57 HDLD O Mode hold signal output (Not used)
    58 XLT O CD latch signal output (Not used)
    59 XRST O CD reset signal output
    60 DISC-SENS I Slit sensor of disc table input
    61 T-SENS I CD table detection signal input
    62 VCC Ð Power supply (+5V)
    63 TBL-L O Table motor control output
    64 VSS Ð Ground
    65 TBL-R O Table motor control output
    66 LOAD-OUT O
    67 LOAD-IN O
    68 ENC 3/UP-SW I
    69 ENC 2/DISC-LED I
    70 ENC 1 I
    71 OUT-OPEN O Loading out detection signal output
    72 B-TRG O
    73 A-TRG O
    74 CAP-M-COT2 O Capstan motor control 1(-) signal output
    75 CAP-M-COT1 O Capstan motor control 2(-) signal output
    76 CAP-M-H/L O Capstan motor H/L speed select signal output
    77 AMS-IN I Connected to ground
    78 TC-MUTE O TC mute ON/OFF selection output
    79 R/PB/PAS O REC/PB/PASS selection output
    80 NR-ON/OFF O NR ON/OFF signal output
    81 REC-MUTE O REC mute ON/OFF selection output
    82 BIAS O Bias ON/OFF selection output
    83 EQ-H/N O Equalizer H/N select output
    84 PB-A/B O PB Deck A/Deck B select output
    85 ALC O ALC ON/OFF output
    86 B-PLAY-SW I Deck B play detect
    87 A-PLAY-SW I Deck A play detect
    88 A-HALF I Deck A cassette detect
    89 B-HALF I Deck B cassette detect
    90 B-SHUT I B Deck reel pulse detector
    91 A-SHUT I A Deck reel pulse detector
    92 SOFT-TEST O Software test port
    93, 94 KEY/CD-ADJ I CD adjust point port
    95 MODEL IN I Version select signal input
    96 AVSS Ð Ground
    97 SPEC-IN I Version select signal input
    98 VREF I Analog reference voltage input
    99 AVCC Ð Analog power supply
    100 TC-RELAY O REC/PB head selection output for IC602Loading motor control signal output
    Disc tray address detect encoder input
    Trigger motor control output 
    						
    							Ð 89 Ð
    ¥ IC601 DISPLAY CONTROL (TMP88CS76F-6005) (PANEL Board)
    Pin No.Pin Name I/O Function
    1 SIRCS I Remote commander signal input
    2 JOG A I Rotary encoder (S601) pulse input
    3 L/P SCK O LED/PAD clock output
    4 LED LA O LED latch output
    5 L/P DAT O LED/PAD data output
    6 PAD LA O PAD latch output
    7 L SEL O LED select signal
    8 JOG B I Rotary encoder (S601) pulse input
    9 VOL A I
    10 VOL B I
    11 to 14 KEY 0 to KEY 3 I Key input
    15 GRADATION L O LED gradation signal (left)
    16 S LOW (F01) O Sptctrum analyzer input (Super low flegency) (40Hz)
    17 BPF 1 (F02) O Sptctrum analyzer input (100Hz)
    18 BPF 2 O Sptctrum analyzer input (400Hz)
    19 BPF 3 O Sptctrum analyzer input (2KHz)
    20 BPF 4 O Sptctrum analyzer input (6KHz)
    21 ALL B (L+R) I Sptctrum analyzer input (all band)
    22 GLADATION O
    R/WAKE UP
    23 VSS I/O Ð Ground
    24 VASS Ð Ground
    25 VAref I Analog reference voltage input
    26 VDD I/O Ð Power supply (+5V)
    27 to 40 G 18 to G 5 O FL gride signal output
    41 VDD VFT Ð Power supply (+5V)
    42 to 45 G 4 to G 1 O FL gride signal output
    46 to 67 S 1 to S 22 O FL segment signal output
    68 VKK Ð Power supply (-30V)
    69 VDD for CPU Ð Power supply (+5V)
    70 X IN I XÕtal (12.5MHz)
    71 VSS for CPU Ð Ground
    72 X OUT O XÕtal (12.5MHz)
    73 RESET I Reset signal input from main controller
    74 CH for PAD O Channel signal output for PAD
    75 BUSY for PAD O Busy signal output for PAD
    76 TEST I Connected ground
    77 Ð Ð Not used (to ground)
    78 IIC DATA O Data output for IC501
    79 IIC CLK O Clock output for IC501
    80 Ð Ð Not used (to ground)Rotary encoder (S602) pulse input
    LED gradation signal (right)/WAKE UP signal 
    						
    							Ð 90 Ð
    SECTION  9
    EXPLODED VIEWS
    9-1. CASE SECTION
    NOTE:
    ¥ Items marked Ò*Ó are not stocked since they are
    seldom required for routine service. Some delay
    should be anticipated when ordering these items.
    ¥ The mechanical parts with no reference number in
    the exploded views are not supplied.
    ¥ Hardware (# mark) list and accessories and pack-
    ing materials are given in the last of this parts list.
    ¥ Color Indication of Appearance Parts Example:
    KNOB, BALANCE (WHITE)
    å
    Cabinets color¥ Abbreviation
    EA : Saudi Arabia model
    HK : Hong Kong model
    SP : Singapore model
    MY : Malaysia model
    TW : Taiwan model
    IA : Indonesia model
    TH : Thai modelThe components identified by
    mark ! or dotted line with mark
    ! are critical for safety.
    Replace only with part number
    specified.
    Ref. No.Part No.DescriptionRemarkRef. No.Part No.DescriptionRemark
    *1 4-996-716-01 HOLDER (CDM)
    2 3-363-099-41 SCREW (CASE 3 TP2)(GRAY)
    2 3-363-099-71 SCREW (CASE 3 TP2)(SILVER)
    3 3-363-099-01 SCREW (CASE 3 TP2)(GRAY)
    3 3-363-099-11 SCREW (CASE 3 TP2)(SILVER)
    *4 4-221-149-21 CASE (SILVER)
    *4 4-221-149-61 CASE (GRAY)
    5 1-233-545-11 TUNER UNIT (TH)
    5 1-233-546-13 ENCAPSULATED COMPONENT (EXCEPT TH)
    4
    2
    2 3
    1
    7
    86
    6
    1
    3
    5
    #1
    #2#2
    #2 #2#2
    #13 #13#1CDM38L-5BD34L
    Front panel#1
    #1#1 #1
    #1
    Including Panel board
    (Ref No. 118)
    Including Trans board
    (Ref No. 52)not supplied
    11
    9
    10
    6 4-951-620-01 SCREW (2.6x8), +BVTP
    7 X-4950-965-1 PANEL ASSY, LOADING (VX8)(GRAY)
    7 X-4951-028-1 PANEL ASSY, LOADING (VX8)(SILVER)
    7 X-4951-629-1 PANEL ASSY, LOADING (VX8J)
    8 4-991-781-01 EMBLEM (VCD)
    9 1-790-927-11 WIRE (FLAT TYPE) (13 CORE)
    10 1-775-212-11 WIRE (FLAT TYPE) (23 CORE)
    11 A-4724-727-A VIDEO BOARD, COMPLETE 
    						
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