Motorola Xtl5000 Detailled 6881096c74 B Manual

6881096C74-BMay 25, 2005
Theory of Operation: Controller Section3-65
3.8.2 Controller DC Power Distribution
Figure 3-45 illustrates the controller DC power distribution circuitry.
The A+ power for the radio is derived from the 12-V battery, which is applied to the main board 
through connector J0950. This A+ voltage is routed to the control-head connector, J0401, pins 19 
and 21, to the control head.
A power FET (Q51) provides the means of controlling the main power source (SWB+) by the on/off 
switch....

May 25, 20056881096C74-B
3-66Theory of Operation: Controller Section
The various voltages used by the ICs on the main board are shown in Table 3-13.
3.8.3 Encryption Voltages 
The secure interface board produces two voltages sourced by A+ and SW_B+ through J0501, pins 
10 and 9, that are used by the encryption module: UNSW_B+_ENC (7 V) and SW_B+_ENC (7 V). 
The constant 7 V is generated using U800, Q802, and Q803 and is fed to J0701. At the secure 
interface board, the 7 V provides continuous unswitched...

6881096C74-BMay 25, 2005
Theory of Operation: Controller Section3-67
3.8.4 Reset Circuits
The reset circuits consist of the power-on reset (POR*) circuit (Figure 3-46), SW_B+ sense circuit, 
and SB9600 bus reset circuit. These circuits allow the microprocessor to recover from an unstable 
condition, such as removing battery A+ from the radio while it is on, battery voltage too low, and 
miscommunication to remote devices on the SB9600 bus, as well as generally monitoring the power 
on/off condition....

May 25, 20056881096C74-B
3-68Theory of Operation: Controller Section
The other signal that can cause a processor/radio reset is the SB9600 RESET line. The RESET line 
is driven high (5 V) by a remote device that is having problems communicating with the processor.
3.8.5 Power-Up/Power-Down Sequence
The XTL 5000 radio power is cycled via SW_B+ (battery voltage level). This voltage is supplied by 
the control head via J0401, pin 17, when the On/Off button is cycled.SW_B+ is derived from the 
battery A+...

6881096C74-BMay 25, 2005
Theory of Operation: Controller Section3-69
The Patriot IC also requires a 32 kHz square-wave clock, provided at the CKIL (J7) pin. This clock is 
generated by a 32 kHz crystal (Y0100), with supporting circuitry for oscillation. This clock is utilized 
only for the Patriot IC, and is used for reset capability and other Patriot IC functions.
Four additional clocks are also supplied to the daughtercard: a 20 kHz RX frame-sync clock, a 
48 kHz TX frame-sync clock, a 1.2 MHz RX data...

May 25, 20056881096C74-B
3-70Theory of Operation: Controller Section
This radio meets EIA compatibility with external data accessory devices. The naming scheme (see 
Table 3-14 and Table 3-15) used for the microcontrollers RS-232 lines sometimes conflict with EIA 
RS-232 naming schemes. This is due to the microcontrollers pin names versus I/O direction, 
compared to the EIA pin names versus I/O direction. Therefore, a matching naming scheme has 
been developed. If the pin is coming from the UART, the pin...

6881096C74-BMay 25, 2005
Theory of Operation: Controller Section3-71
3.8.8 Serial Communications on the External Bus (SB9600)
The SB9600 bus is an asynchronous serial communication bus using a Motorola-proprietary 
protocol. It provides a means for the microcontroller within the Patriot IC (U100) to communicate with 
other hardware devices. In the radio, it communicates with hardware accessories connected to the 
accessory connector and the remote interface board. Serial communications on this external...

May 25, 20056881096C74-B
3-72Theory of Operation: Controller Section
Figure 3-48.  Serial Peripheral Interface (SPI) Block Diagram
The following ICs are controlled and programmed by SPI_A:
• ABACUS III (U6000): Sigma Delta A/D converter and 2nd LO frequency adjust. The 
ABACUS III IC has a single pin for both input and output. Therefore, additional circuitry (U0103 
and U0105) handles the SPI_MISO or the SPI_MOSI data lines from the microcontroller and 
allows a read or write operation to occur with the...

6881096C74-BMay 25, 2005
Theory of Operation: Controller Section3-73
Figure 3-49.  XTL 5000 RX Signal Path
The ABACUS III data is transferred to the Patriot IC at a 1.2 MHz bit rate, which is a synchronous 
clock provided by the ABACUS III IC. The 20 kHz interrupt clock, also provided by the ABACUS III 
IC, signals the arrival of a data packet and represents the sampling rate of the received data.
The DSP then processes this data to extract audio and signaling, perform filtering, alert-tone 
generation,...

May 25, 20056881096C74-B
3-74Theory of Operation: Controller Section
The audio power amplifier (U0204), is a DC-coupled-output, bridge-type amplifier. The gain is 
internally fixed at 40 dB. Speaker audio leaves U0204 on pins 4 and 6. For dash-mount radios, the 
audio is routed to the speaker via J0402, pins 19, 21, 23, and 25, and then to J2, pins 20 and 26. The 
amplifier is biased to one-half of the A+ voltage. An audio isolation transformer must be used if 
grounded test equipment, such as an audio...