Motorola Radius Cm200 Cm300 Pm400 Detailed 6881098c00 A Manual

Controller Theory of Operation2-11
While the radio is switched on, the µP monitors the voltage at the emergency input on the accessory 
connector via U403-pin 62. Three different conditions are distinguished: no emergency kit is 
connected, emergency kit connected (unpressed), and emergency press.
If no emergency switch is connected or the connection to the emergency switch is broken, the 
resistive divider R5030 / R5049 will set the voltage to about 3.14 volts (indicates no emergency kit 
found via...

2-12THEORY OF OPERATION
5.5 Serial Peripheral Interface (SPI)
The µP communicates to many of the IC’s through its SPI port. This port consists of SPI TRANSMIT 
DATA (MOSI) (U403-pin100), SPI RECEIVE DATA (MISO) (U403-pin 99), SPI CLK (U0403-pin1) 
and chip select lines going to the various IC’s, connected on the SPI PORT (BUS). This BUS is a 
synchronous bus, in that the timing clock signal CLK is sent while SPI data (SPI TRANSMIT DATA 
or SPI RECEIVE DATA) is sent. Therefore, whenever there is activity...

Controller Theory of Operation2-13
5.8 Normal Microprocessor Operation
For this radio, the µP is configured to operate in one of two modes, expanded and bootstrap. In 
expanded mode the µP uses external memory devices to operate, whereas in bootstrap operation 
the µP uses only its internal memory. In normal operation of the radio the µP is operating in 
expanded mode as described below.
During normal operation, the µP (U403) is operating in expanded mode and has access to 3 
external memory devices;...

2-14THEORY OF OPERATION
5.9 Static Random Access Memory (SRAM)
The SRAM (U402) contains temporary radio calculations or parameters that can change very 
frequently, and which are generated and stored by the software during its normal operation. The 
information is lost when the radio is turned off. 
The device allows an unlimited number of write cycles. SRAM accesses are indicated by the CS 
signal U402 (which comes from U403-CSGP2) going low. U402 is commonly referred to as the 
external RAM as opposed...

Transmit Audio Circuits2-15
7.0 Transmit Audio Circuits
Figure 2-7 Transmit Audio Paths
7.1 Microphone Input Path
The radio supports 2 distinct microphone paths known as internal (from control head J2-15) and 
external mic (from accessory connector P1-2) and an auxiliary path (FLAT TX AUDIO, from 
accessory connector P1-5). The microphones used for the radio require a DC biasing voltage 
provided by a resistive network.
The two microphone audio input paths enter the ASFIC CMP at U504-pin 48 (external...

2-16THEORY OF OPERATION
7.1.2 Standard Microphone
Hook Pin is shorted to the hook mic inside the standard Mic, If the mic is out off hook, 3.3 V is routed 
to R429 via R458, D401, and it create 0.7 V on MIC_SENSE (u.P U403-67) by Voltage Divider 
R429/R430. U403 senses this voltage and sends command to ASFIC_CMP U504 to get GCB3 =‘1’. 
The audio signal is routed from C5045 via U509-3 (Z1), R5072, U507, R5026, C5091, R5014 via 
C5046 to U504- 46 int mic (C5046 100nF create a159 Hz pole with U504- 46 int...

Transmit Signalling Circuits2-17
8.0 Transmit Signalling Circuits
Figure 2-8 Transmit Signalling Path
From a hardware point of view, there are 3 types of signaling:
• Sub-audible data (PL / DPL / Connect Tone) that gets summed with transmit voice or 
signaling,
• DTMF data for telephone communication in trunked and conventional systems, and
• Audible signaling including MDC and high-speed trunking.
Note: All three types are supported by the hardware while the radio software determines which 
signaling...

2-18THEORY OF OPERATION
8.2 High Speed Data
High speed data refers to the 3600 baud data waveforms, known as Inbound Signaling Words 
(ISWs) used in a trunking system for high speed communication between the central controller and 
the radio. To generate an ISW, the µP first programs the ASFIC CMP (U504) to the proper filter and 
gain settings. It then begins strobing U504-pin 19 (HSIO) with a pulse when the data is supposed to 
change states. U504’s 5-3-2 State Encoder (which is in a 2-state mode) is...

Receive Audio Circuits2-19
9.0 Receive Audio Circuits
Figure 2-9 Receive Audio Paths
9.1 Squelch Detect
The radio’s RF circuits are constantly producing an output at the discriminator (IF IC). This signal 
(DISC AUDIO) is routed to the ASFIC CMP’s squelch detect circuitry input DISC (U504-pin 2). All of 
the squelch detect circuitry is contained within the ASFIC CMP. Therefore from a user’s point of 
view, DISC AUDIO enters the ASFIC CMP, and the ASFIC CMP produces two CMOS logic outputs 
based on the...

2-20THEORY OF OPERATION
9.2 Audio Processing and Digital Volume Control
The receiver audio signal (DISC AUDIO) enters the controller section from the IF IC where it is.DC 
coupled to ASFIC CMP via the DISC input U504-pin 2. The signal is then applied to both the audio 
and the PL/DPL paths
The audio path has a programmable amplifier, whose setting is based on the channel bandwidth 
being received, an LPF filter to remove any frequency components above 3000 Hz, and a HPF to 
strip off any sub-audible data...