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Motorola Gp68 Part1 6881086c09 O Manual

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    March, 1997 6881086C09-O
     
    2-1
     
    Section 2
    Theory of Operation 
    Overview 
    This section provides a detailed theory of operation for the
    GP60 Series Radios and its components.
    The GP60 Series radio consists three main boards; Control-
    ler board, rf board and display board. The controller board is
    connected to the rf board through a 20 lines flex ribbon cable.
    The display board is connected to the controller board
    through a 14 pins board-to-board connector. The top key
    pads are embedded on a flex that makes connection to the
    controller via 20 pins connector. 
    Controller Board 
    Controller board is the heart of the radio. It contains micro-
    computer (U401), AFIC (audio processor IC, U451), general
    5 volt regulator (U302), 5 volt regulator with reset to power
    up the microcomputer (U456), Unswitch ram back up 5 volt
    regulator (U457), audio power amplifier IC (U454), MIC
    amplifier (U452-1)and rf power control circuitry/APC
    (U152, U150).
    Microcomputer
    The GP60 Series VHF and UHF radios use the Motorola
    68HC11E20 microcomputer, U401, which utilizes:
    • 7.9488 MHz clock rate
    • Single chip mode operation
    • 16-bit addressing
    • Internal watchdog circuitry
    • Analog to digital conversion input ports
    The microcomputer’s operating program is permanently
    written or “masked” within the microcomputer. Included in
    U401 is an EEPROM memory which stores channel, signal-
    ling, and scan list information. 
    Microcomputer Power-Up and Reset 
    Routine 
    On power-up U401’s reset line (pin 43) is held low by the
    AFIC (U451) until the synthesizer (U201, on the rf board)
    provides a stable 2.1 MHz output. When U451 releases its
    control, U401’s hardware holds the reset line low until it ver-
    ifies that clock Y401 is operational. When the reset line goes
    high, U401’s hardware delays briefly to allow Y401 to stabi-
    lize, then the software begins executing port assignments,
    RAM checking, and initialization. A fixed delay of 100 mSis added to allow the audio circuitry to settle. Next, an alert
    beep is generated and the steady state software begins to exe-
    cute (buttons are read, radio circuits are controlled).
    U401’s reset line can be controlled directly by the 5 V regu-
    lator (U456), the AFIC, and the microcomputer, and indi-
    rectly by the synthesizer. U456 drives the reset line low (via
    pin 3) if it loses regulation. This prevents possible latch-up
    or overwriting of registers in the microcomputer because the
    reset line is higher in voltage than pin 55 of U401 (VDD).
    U401 can drive the reset line low if it detects a fault condition
    such as an expired watchdog timer, software stuck in an infi-
    nite loop, unplanned hardware inputs, static zaps, etc.
    The AFIC and synthesizer can control the reset line during
    power-up, as outlined above. 
    Transmit and Receive Audio 
    Circuitry 
    The GP60 Series Radios receive (Rx) and transmit (Tx) cir-
    cuits are common to both the VHF and UHF models. Most
    of the radio processing for Rx and Tx is accomplished in
    U451, the Audio Filter IC. The Audio Filter IC performs the
    following functions:
    • Tone/Digital PL encoding and decoding
    • PL rejection filter (Rx audio)
    • Tx pre-emphasis amplifier
    • Limiter
    • Post-limiter filter
    • Tx deviation digital attenuators
    • MIC gain attenuator
    • Noise squelch digital attenuator
    • Microcontroller port expanders (output only)
    • 2.5 Vdc reference source
    U451 parameters are programmed from U401 microcontrol-
    ler ROM and EEPROM data via the serial CLOCK and
    DATA lines. Unless otherwise indicated, all signal levels  
    refer to standard carrier modulation, 1 kHz tone at   
    ±  
    3 kHz
    deviation. 
    						
    							 
    2-2
     
    6881086C09-OMarch, 1997
     
    Theory of OperationGP68 Portable Radios Service Manual
    Transmit and Receive Audio Circuitry
     
    Tx Audio Path 
    Internal PTT, MIC Bias Switch and External PTT 
    Sense Circuits  
    The internal PTT switch (SW402) is connected direct to the
    input port of the microcomputer (pin 42) to ground. This port
    is an active low. One of the R415 resistor is used to pull up
    the line to 5 volt. While PTT (internal) this line will be pulled
    low. Internal MIC bias is supplied from the +5VTX (switch
    by microcomputer) through R467 and R468. Internal MIC is
    connected to the controller board via top keypad flex.
    When connecting an external MIC through connector J406,
    the external PTT sense transistor Q403(pins 2, 3, and 4)
    switches “ON” when the external PTT switch is closed. Col-
    lector voltage Q403-4 is monitored by U401-34. When col-
    lector is logic “HI” state, the microcontroller configures the
    radio for transmit mode. In PTT equipped accessories, the
    PTT switch is series connected with the external MIC ele-
    ment. 
    MIC Amplifier  
    MIC audio from internal MIC MK401 is coupled through
    C468, J406, and L402 to the MIC amp circuit U452-1. Exter-
    nal MIC plug insertion mechanically disconnects the internal
    MIC. External MIC audio is coupled through L402 to the
    MIC amp input. Capacitors C458, C460 and C461, and resis-
    tors R458, R459 and R460 provide a low audio frequency
    roll off with a high-pass corner frequency of 1 kHz to
    improve transmit audio clarity. Crossover gain is 12 dB (at 1
    kHz). Reference deviation is obtained with 11.0 mV rms
    input to the external MIC connector J406.  
    Tx Audio Mute Gate 
    Pins 1, 5, and 6 of dual PNP transistor Q403 and resistors
    R465 and R456 comprise the Tx audio mute gate. Audio Fil-
    ter IC U451-40, expanded output port, controls PNP transis-
    tor Q403 (pins 1, 5, and 6). When U451-40 is logic LO state,
    a small dc current flows from U452-1-1 MIC amp output into
    Q403-6 emitter, through Q403, and out of the collector
    (Q403-1) through R456. A fraction of the emitter current
    flows out of the base (Q403-5) through R465 to ground (Vss
    of Audio Filter IC). MIC audio at U452-1-1 passes through
    the Tx audio mute gate. When U451-40 is logic “HI”, Q403-
    6 is 2.4 Vdc, biasing the device well into cut-off. No current
    flows through emitter to base/collector, and no MIC audio
    passes. The mute function is enabled (Q403 pins 1, 5, and 6
    is “OFF”) when modulating DTMF Signalling. 
    Pre-emphasis Amp  
    The Audio Filter IC U451, contains a Tx audio pre-emphasis
    amp, with external gain setting resistor R451 and C452. Con-
    nections are made at each end of resistor R451 to provide
    interconnection of option board Tx audio through connector
    J403. Pre-emphasis is 6 dB/octave with a corner frequency of
    6600 Hz. Crossover gain is 0 dB at 1 kHz, with passband
    gain (head-room) of 17.5 dB. 
    Limiter (Audio Filter IC)  
    The audio filter IC U451 contains the limiter circuit, which
    prevents over-deviation of the RF carrier by symmetrically
    clipping the peaks of the modulating voltage. Audio from the
    pre-emphasis amplifier circuit is coupled to the limiter. Gain
    of the limiter stage is adjustable in four 3 dB steps, from -3
    dB, 0 dB, +3 dB, and +6 dB. Therefore, Tx audio path gain,
    or MIC gain, can be adjusted to compensate for different
    sound environments through the Radio Service Software.  
    Post-Limiter Filter (Audio Filter IC)  
    Clipped modulating voltage from the limiter output is cou-
    pled to the post-limiter filter. Filtering attenuates the spuri-
    ous products generated by the limiter. The post-limiter filter
    is programmable to operate in the following modes:
    •EIA mode  
    PL Encoder  
    Private Line (CTCSS) is generated by the PL encoder circuit
    in the Audio Filter IC U451. Tone PL or Digital PL data is
    user programmable (see user manual) for each mode. On
    entering transmit mode, TPL or DPL data is programmed to
    U451 via the serial DATA and CLOCK lines. U401-57
    microcontroller output strobes & U451-32 PL CLOCK input
    at a constant rate during DPL encoding, or at a rate deter-
    mined by the PL encoder algorithm in the microcontroller
    for TPL encoding corresponding to tone frequency. The
    encoded PL is summed with MIC audio at the post-limiter
    filter input. Digital attenuators are employed to adjust the
    balance of MIC radio and PL to prevent over deviation of the
    carrier.  
    DTMF Encoder  
    Resistors R423, R424, R425, and R427, and summer U452-
    2 form the DTMF encoder. Output from U452-2 pin 7 is cou-
    pled to U451-13 Audio Filter IC auxiliary Tx modulation
    input. DTMF encoded signals pass from this input to the
    post-limiter filter input.
    Output from U452-2 pin 7 is also coupled to U451-6 and
    coupled through Rx audio path to the audio PA for sidetone
    audio.  
    Deviation Attenuators (Audio Filter IC)  
    Carrier deviation is set by programming the digital deviation
    attenuators of the Audio Filter IC. Deviation data for each
    mode is entered through the Radio Service Software, and
    then programmed into U451 from microcontroller U401 on
    entering transmit mode. U451-19 and U451-20 deviation
    attenuator outputs are combined through resistors R454,
    R455 and R457 and dc-coupled to U201-5 (on rf board), the
    synthesizer modulation input. Capacitor C218 provides a
    high frequency roll-off corner at 20 kHz to further attenuate
    spurious signals from U451. The dc voltage at the combined
    attenuator outputs sets the center frequency for the modu-
    lated carrier. Any transient (R x C) voltages in the Tx audio 
    						
    							 
    March, 19976881086C09-O
     
    2-3
     
    GP68 Portable Radios Service ManualTheory of Operation 
    Transmit and Receive Audio Circuitry
     
    path must settle within 1 millisecond of PTT activation to
    prevent center frequency offset. 
    Rx Audio Path 
    Audio Processing (Audio Filter IC)  
    The recovered Rx audio from the rf board (IF detector IC
    U51) is coupled through to U451-7 and U451-8 on the Audio
    Filter IC. Rx audio at U451-7 is processed first by the PL
    rejection filter, which is characterized by a 2-pole, 300 Hz
    corner frequency high-pass response. Audio de-emphasis is
    a single pole low pass filter with a corner frequency of 231
    Hz. Audio then passes through the digital volume attenuator
    and buffer amplifier output to U451-23. For standard test
    modulation, the audio level at U451-7 is 255 mV rms, and
    output audio level at U451-23 is 765 mV rms with the digital
    volume attenuator set to minimum attenuation. 
    PL Decoder 
    Recovered Rx audio at U451-8, the PL decoder input, first
    passes through the Tone PL filter, or the Digital PL filter,
    depending on the PL option selected for the current operat-
    ing mode. Filtered PL is then coupled to the PL detector cir-
    cuit, with detected PL output at U451-27 to microcontroller
    U401-64 where algorithms perform the final PL decoding.
    Data for the Tone PL frequency or Digital PL code for each
    mode is programmed through the Radio Service Software.  
    Rx Audio Mute 
    The Rx audio mute is controlled by microcontroller U401
    via U451-3. The chip disable U454-1 is used to power down
    audio PA to conserve standby current and mute. When at a
    logic “0” (0 V to 0.8 V), the U454 is enabled for normal oper-
    ation. When pin 1 (U454-1) is at a logic “1” (2.0 V to Vcc V),
    the U481 is disabled (muted). 
    Audio Power Amplifier  
    U454 (MC 34119) is a low amplifier capable of low voltage
    operation (Vcc=2.0 V minimum). The circuit provides a dif-
    ferential output (U454 pins 5 & 8) to the speaker (24 ohms)
    to maximize the available voltage swing at low voltages. The
    internal configuration consists of two identical operational
    amplifiers. Open-loop gain is above or equal to 80 dB (at f
    						
    							 
    2-4
     
    6881086C09-OMarch, 1997
     
    Theory of OperationGP68 Portable Radios Service Manual
     
    Adaptive Power Control
     
    TM
     
     Technology
     
    J403-6 
    J403-6 is interfaced to pin 4 of voltage regulator U456. This
    is the microprocessors 5 V source from the main board to the
    option board. Maximum current sourcing is 100 mA. Regu-
    lation is  
    ± 
    0.2 Vdc.  
    J403-7 
    J403-7 interfaces with pin 52 of U401. Pin 52 of the micro-
    controller is bi-directional port D bit 3. In the GP60 Series
    Radio, this connection is for serial data out of the microcon-
    troller. This controls loading of the various electrical sub-
    systems internal to the radio in addition to data required by
    option boards installed into the radio. For option connector
    purposes this pin is used to shift multi-byte messages from
    the radio to an option board. When used for this purpose, pin
    J403-2 option board enable, is driven low by the radio micro-
    controller to enable a serial byte transfer to an option board. 
    J403-8 
    J403-8 interfaces with pin 51 of U401, the radio microcon-
    troller. Pin 51 of the microcontroller is bi-directional port D
    bit 2. In the GP60 Series Radio, this is decoder data into the
    radio. On a DTMF decoder board this would be the serial
    input for the 4-bits of tone data. On other option boards this
    input is used as the serial input for a multiple byte message. 
    J403-9 
    This option interface pin is connected to the Rx Out signal,
    pin 23 of the Audio Filter IC, U451 through coupling capac-
    itor C450. In the GP60 Series Radio, this signal de-empha-
    sizes Rx audio and output is always unmuted audio in the
    radio. This pin may be used as the receive audio to a decoder
    option board such as DTMF, Two Tone Sequential, or MSK
    signalling decode. An audio scrambler option board may
    also use this input for receive audio in. Any option board
    requiring pre-emphasized audio would have to include the
    necessary filtering. The level of this de-emphasized audio is
    450 mV rms at 15 ohm impedance. 
    J403-10 
    This is the Rx audio output of the option board. This connec-
    tion may be used for option boards that need to enable Rx
    audio on signaling decodes or to descramble audio as
    required by the option board descrambling technique. Option
    board Rx audio input is available at J403-10 with a sensitiv-
    ity of 100 mV rms at less than 200 ohm output impedance
    from an option board. R480, a 30k ohm resistor between
    option board pins J403-9 and J403-10 requires design con-
    sideration on the part of any option board using Rx audio
    output. The Rx audio output level is controlled by the GP60
    Series Radio volume control before the audio amp. 
    J403-11 
    J403-11 interfaces with pin 53 of U401. Pin 53 of the micro-
    controller is bi-directional port PD5. In the GP60 Series 
    Radio, this is the CLOCK output from the microcontroller
    for loading all internal subsystems as well as option boards
    that require synchronous serial transfers. Option boards
    requiring a multi-byte transfer may use this output as the
    CLOCK source for uploading internal option board registers
    on power-up, channel change, or for reading serial control
    requests. 
    J403-12 
    J403-12 interfaces with pin 63 of U401. Pin 63 of the micro-
    controller is an input on port A bit 2 of the radio microcon-
    troller. In the GP60 Series Radio, this connection is used for
    a variety of input signals from an option board. In a simple
    option board configuration, a falling edge on this pin connec-
    tion signals that a selective call has been decoded by the
    option board. For DTMF decoder boards or other simple
    BCD decoder boards, a falling edge on this pin indicates that
    a digit decode has been completed and is ready to be shifted
    into the microcomputer for concatenation and comparison to
    an ID string. In more complex option boards, a falling edge
    on this pin indicates that an option board requests a serial
    transfer on J403-8 and J403-1 or an acknowledgment of data
    received on J403-7 in a multiple byte transfer. 
    Adaptive Power Control 
    TM
     
     
    Technology 
    The GP60 Series Radio power control is specially designed
    to handle alkaline battery voltage and current characteristics,
    without compromising output power variation when used
    with NiCd batteries. 
    Basically there are three sections of the power control cir-
    cuitry. Digital to analog converter, voltage to current con-
    verter and the cut back circuitry that react on alkaline
    batteries.
    Digital to analog converter consists of shift register U152,
    R166, R167, R168, R169 and R170. These are the discrete
    components that make the resistor ladder digital to analog
    converter. The output of the DAC is in a form of a voltage.
    Since the power levelling on the rf board requires current as
    a reference, this voltage has to be converted into current.
    Voltage to current converter consists of U150-2, and Q101.
    This is a standard voltage to current converter.Since the oper-
    ational amplifier cannot work at zero volt input, reference
    zero level has been shifted to around 1.5 volt on operational
    amplifier input by R173 and R174. The DAC voltage also is
    shifted accordingly by R172. The output of this section will
    go to the power levelling circuit on the rf board. A delay
    capacitor is added (C169) to ensure that DAC voltage will
    appear only after TXB+. A fast discharge transistor (Q404)
    is needed to ensure that the capacitor is fully discharged
    before transmitting.
    The cut back circuitry (U150-1 circuitry) is used to protect
    the radio from operating beyond the capability of the supply
    voltage especially when radio is powered by alkaline batter-
    ies. Alkaline batteries have higher internal resistance and 
    						
    							 
    March, 19976881086C09-O
     
    2-5
     
    GP68 Portable Radios Service ManualTheory of Operation 
    RF Board
     
    have difficulty to source high current (2.1 ampere at 5 watts
    operation). If there are forced to do so, the voltage will drop
    and when the voltage hits 5 volts, the radio will automati-
    cally reset by it self. It means the batteries cannot be used at
    all for transmitting even though there are still a lot of power
    inside the batteries. With this circuitry, the user will be able
    to enjoy the radio operation at any battery condition, as long
    as the batteries are able to source current sufficient to support
    100 mW output.
    What the circuit does is just protecting the supply voltage
    from dropping below 5.5 volt by reducing the output power
    by means of reducing the programmed current to the power
    levelling circuitry. The circuit is inactive when the voltage is
    higher than 5.5 volt.
    The threshold voltage is tapped from the +5VTX and the
    supply voltage is sensed on the SWB+. C167 is a compensa-
    tion capacitor and C165 is a speed up capacitor to ensure that
    this circuitry can react faster than the power levelling cir-
    cuitry. 
    RF Board 
    RF board consists of synthesizer, VCO, receiver section, five
    watts power amplifier, harmonic filter with antenna switch
    and rf power levelling circuitry. 
    Receiver 
    The receiver of the GP60 Series UHF and VHF radios con-
    sists of 4 major blocks each: 
    •the front-end module, 
    •the double balanced mixer, 
    •the first IF stage (45.1 MHz for VHF and 73.35 MHz
    for UHF), and
    •the back-end IF IC.
    The UHF and VHF front-ends consist of three blocks of cir-
    cuitry each: 
    •a pre-selector,
    •an RF amplifier, and 
    •a post-selector filter.
    All filters are fixed-tuned designs to eliminate the need for
    factory tuning and to provide wide-band operation.
    The VHF design uses both shunt and series coupled topology
    while the UHF design incorporates only shunt coupled topol-
    ogy. The UHF design is optimal for attenuating undesired
    signals on its lower side while the VHF design is more
    heavily attenuated on its upper side. The worst case image
    frequency for VHF is 90.2 MHz above 136 MHz, while the
    worst-case of UHF is 146.7MHz below 430MHz. The UHF pre-selector filter is a 2-pole, 0.1 dB Chebyshev
    bandpass design implemented in a shunt coupled resonator
    topology. The 3 dB bandwidth is approximately 45MHz,
    centered at 450 MHz. The center of the band insertion loss is
    approximately 1.8 dB. The 2-pole filter is designed to oper-
    ate with a 50 ohm input termination, while the output termi-
    nation is the input impedance of the RF amplifier that
    follows it.
    The VHF pre-selector is also a 2-pole, 0.1 dB Chebyshev
    bandpass design but with shunt series coupled resonator
    topology. This topology provides fairly symmetrical attenu-
    ation around the center frequency of 155 MHz. The 3 dB
    bandwidth is approximately 60 MHz. Center of band inser-
    tion loss is about 1.5 dB. The input is matched to 50 ohms
    while the output is matched to the proceeding RF amplifier.
    The RF amplifier, Q1, is a Motorola MMBR941L NPN
    device biased in a common emitter configuration. The amp is
    stabilized by the shunt feedback resistor R1 with a gain of
    approximately 19 dB at VHF and 16 dB at UHF. The noise
    figure is about 3.5 dB and 3.0 dB at VHF and UHF, respec-
    tively. The VHF amplifier draws 2.5 mA of current while the
    UHF amplifier draws 3.0 mA of current Both are supplied by
    the receive 5 Volt supply (indicated as “+5V Rx” on the
    schematics and block diagrams).
    Terminating the RF amp is the post-selector filter. This filter
    is a 3-pole 0.1 dB Chebyshev design for both bands. The
    VHF design is series coupled topology while the UHF is
    shunt coupled. The 3 dB bandwidth is approximately
    58 MHz centered at 155 MHz for VHF and 25 MHz centered
    at 460 MHz for UHF.
    The insertion loss of this filter is approximately 2.0 dB for
    VHF and 2.7 dB for UHF. The filter is designed to be termi-
    nated with the amplifier output impedance on one side, and
    50 ohm on the other.
    The net gain from the receiver front-end is about 14.0 dB
    (VHF) and 10.8 dB (UHF) in the center of the band. The net
    center of the band noise figure is approximately (5.5 dB
    VHF) (5.2 dB UHF). This is sufficient to achieve a typical
    center of the band sensitivity of 0.25   
    m  
    V for 12 dBs.
    The double balanced mixer is a module. Internal to it is the
    two baluns and ring diode. The mixer operates with an LO
    level of about +5 dBm for both VHF and UHF. The mixer
    conversion loss is approximately 6 dB. The double balanced
    type mixer provides excellent isolation between any two
    ports. Since a DBM can operate over a large bandwidth, the
    same mixer can be used for UHF and VHF radios. The DBM
    also provides excellent protection against receiver spurs due
    to non-linearization, such as IM and Half-IF. The purpose of
    the mixer is to translate the received signal down to the fre-
    quency of the first IF, 45.1 MHz for VHF and 73.35 MHz for
    UHF, where it then enters the IF circuitry. 
    Intermediate Frequency (IF) 
    The Intermediate Frequency (IF) section of the portable
    radio consists of several sections including, the high IF, the 
    						
    							 
    2-6
     
    6881086C09-OMarch, 1997
     
    Theory of OperationGP68 Portable Radios Service Manual
    Transmitter
     
    second LO, the second IF, and the IF IC chip. The first LO
    signal and the RF signal mix to the IF frequency (45.1 MHz
    for VHF and 73.35 MHz for UHF) which then enters the IF
    portion of the radio.
    The signal first enters the high IF, passes through a crystal fil-
    ter and is then amplified by the IF amp. The crystal filter pro-
    vides selectivity, second image protection, and
    intermodulation protection. The amplifier provides approxi-
    mately 10 dB of gain at VHF and 18 dB of gain at UHF to
    the signal. The high IF has an approximate 3 dB bandwidth
    of 18 kHz.
    The filtered and amplified IF signal then mixes with the sec-
    ond local oscillator at 44.645 MHz for VHF and 72.895 MHz
    for UHF. The second LO uses an amplifier internal to the IF
    IC, an external crystal and some external chip parts. The
    oscillator presents an approximate level of -15 dBm to the
    second IF mixer, internal to the IF IC.
    The output of the mixing of the IF signal and the second LO
    produces a signal at 455 kHz (second IF). This signal is then
    filtered by external ceramic filters and amplified. It is then
    passed back to the IF IC, sent to a phase-lock detector, and
    demodulated. The resulting detected audio output is then
    sent to the AFIC to recover the audio.
    The IF IC also controls the squelch characteristics of the
    radio. With a few external parts the squelch tail, hysteresis,
    attack, and delay can be optimized for the radio. The AFIC
    (on the controller board) allows the radio’s squelch opening
    to be electronically adjusted. 
    Transmitter 
    The GP60 Series Radio VHF and UHF transmitters contain
    five basic circuits:
    •a power amplifier, 
    •an antenna switch, 
    •a harmonic filter, 
    •an antenna matching network, and
    •a power levelling circuit.
    Refer to the block diagram and the schematic for more infor-
    mation.
    The PA of both the VHF and UHF transmitters consists of
    four stages of amplification with the corresponding stages
    using the same transistors. The first two stages of both PA
    line-ups utilize the MMBR951L transistor, while the third
    stage uses a Phillips BLT50 transistor, and the last stage uses
    the Motorola MRF873 transistor. The VHF PA line-up is
    capable of supplying 5 watts or more of output power, while
    the UHF PA line-up is capable of more than 4 watts at the
    antenna port. The power out of each line-up can be varied by
    changing the voltage (VCTL) on their second (MMBR951L)
    stages.The antenna switch circuit consists of two PIN diodes
    (CR101 and CR102), a pi network (C145, L115, and part of
    C140), and a current limiting resistor (R115). The UHF cir-
    cuit contains one additional capacitor (C149), which is used
    to tune out CR102’s lead inductance. In the transmit mode,
    TxB+ is applied to the circuit to bias the diodes “on”. To
    enable the Tx signal to go to the antenna rather than the input
    of the receiver, the shunt diode (CR102) shorts out the
    receiver port, and the pi network, which operates as a quarter
    wave transmission line, transforms the low impedance of the
    shunt diode to a high impedance at the input of the harmonic
    filter. In the receive mode, the diodes are both off and there
    exists a low attenuation path between the antenna and
    receiver ports.
    The harmonic filter consists of C141, C142, C169, C165,
    C166, C168, L112, L113, L114 and part of C140. The design
    of the harmonic filter for both VHF and UHF is based on a
    10-pole, 0.1 dB ripple Chebyshev filter. The antenna output
    required a 50 ohm termination.
    Note that to measure the power out of the transmitter, one
    must remove the antenna and screw in its place a special
    BNC adapter, HLN9087A. 
    Power levelling 
    The GP60 Series Radios utilize a current comparator auto-
    matic level control to control its output power. Incident
    power (power going out into the antenna) and reflected
    power (power reflected back into the radio due to antenna
    mismatch) are detected by two doublers on the 50 db coupler.
    The detected current is compared with programmed current
    at the current comparator transistor Q153. The error current
    then will be amplify by a dc amplifier (Q152, part of U151
    and Q155) to generate a control voltage (VCTL). The system
    will always maintain the detected current to be the same pro-
    grammed current. The programmed current (supplied by the
    controller board) is used to set the output power.
    C154 on the VCTL and C153 is the compensation capacitors
    to ensure system stability. 
    Frequency Generation Circuitry 
    The frequency generation circuitry is composed of two main
    IC’s, the Fractional-N synthesizer (U201) and the VCO/
    Buffer IC (U251). Designed in conjunction to maximize
    compatibility, the two IC’s provide many of the functions
    which normally would require additional circuitry. The
    block diagram illustrates the interconnect and support cir-
    cuitry used in the design. Refer to the schematic for refer-
    ence designator.
    The supply for the synthesizer is from Regulated 5 Volts
    which also serves the rest of the radio. The synthesizer in
    turn generates a superfiltered 5 Volts (actually 4.65 Volts)
    which powers U251. 
    						
    							 
    March, 19976881086C09-O
     
    2-7
     
    GP68 Portable Radios Service ManualTheory of Operation 
    The GP60 Series Radio Alignment Procedures
     
    In addition to the VCO, the synthesizer must interface with
    the logic and AFIC circuitry. Programming for the synthe-
    sizer is accomplished through the data, clock, and chip
    enable lines (pins 5, 6, and 7) which are driven by the micro-
    processor, U401. A serial stream of 98 bits is sent whenever
    the synthesizer is programmed. A 5 Volt dc signal from pin 2
    of U201 indicates to the microprocessor that the synthesizer
    is locked while unlock is indicated by a low voltage on this
    pin. Transmit modulation from the AFIC is applied to pin 8
    of U201. Internally the audio is digitized by the Fractional-
    N and applied to the loop divider to provide the low-port
    modulation. The audio is also run through an internal atten-
    uator for modulation balancing purposes before being out-
    putted at pin 28 to the VCO. A 2.1 MHz clock for the AFIC
    is generated by the Fractional-N and is routed to pin 11
    where it is filtered and attenuated from 2.5 Volts to approxi-
    mately 2 Volts. 
    Synthesizer 
    The Fractional-N synthesizer uses a 16.8 MHz crystal
    (Y201) to provide the reference frequency for the system.
    The other reference oscillator components external to the IC
    are C205, C206, R211, R207, and CR203. The loop filter,
    comprised of R202, R204, R205, C214, C215, and C216,
    provides the necessary dc steering voltage for the VCO as
    well as filtering of spurious signals from the phase detector.
    For achieving fast locking of the synthesizer, an internal
    adapt charge pump provides higher current capability at pin
    31 than when in the normal steady-state mode. Both the nor-
    mal and adapt charge pumps receive their supply from the
    voltage multiplier which is made up of C202, C203, C204,
    C231, CR201, and CR202. By combining two 5 Volt square
    waves which are 180 out-of-phase along with Regulated 5
    Volts, a supply of approximately 12.6 Volts is available at pin
    32 for the charge pumps. The current for the normal mode
    charge pumps is set by R203. The pre-scaler for the loop is
    internal to U201 with the value determined by the frequency
    band of operation. 
    VCO 
    The VCO (U251) in conjunction with the Fractional-N syn-
    thesizer (U201) generates rf in both the receive and the trans-
    mit modes of operation. The TRB line (U251 pin 5)
    determines which oscillator and buffer will be enabled. A
    sample of the rf signal from the enabled oscillator is routed
    from U251 pin 23, through a low pass filter, to the pre-scaler
    input (U201 pin 20). After frequency comparison in the syn-
    thesizer, a resultant STEERING LINE VOLTAGE is
    received at the VCO. This voltage is a DC voltage between 3
    and 11 Volts when the PLL is locked on frequency.
    In the receive mode, U251 pin 5 is grounded. This activates
    the receive VCO by enabling the receive oscillator and the
    receive buffer of U251. On VHF radios, the rf signal at U251
    pin 2 is run through a low pass filter. On UHF radios, the rf
    signal is run through a buffer amplifier before it is passedthrough the low pass filter. This is to provide additional iso-
    lation to the receive VCO from high level received rf signals.
    The rf signal after the low pass filter is the LO RF INJEC-
    TION and it is applied to the first mixer at U41 pin 3.
    During the transmit condition, PTT depressed, five volts is
    applied to U251 pin 5. This activates the transmit VCO by
    enabling the transmit oscillator and the transmit buffer of
    U251. The rf signal at U251 pin 4 is run through a low pass
    filter and an attenuator to give the correct drive level to the
    input of the PA. This rf signal is the Tx RF INJECTION.
    Also in transmit mode, the audio signal to be frequency mod-
    ulated onto the carrier is received by the transmit VCO mod-
    ulation circuitry at AUDIO IN.
    When a high impedance is applied to U251 pin 5, the VCO
    is operating in BATTERY SAVER mode. In this case, both
    the receive and transmit oscillators as well as the receive,
    transmit, and pre-scaler buffer are turned off. In the Frac-
    tional-N, the battery saver mode places the A/D and the mod-
    ulation attenuator in the off state. This mode is used to reduce
    current drain of the radio. 
    Display Board 
    The display driver (U801) is powered up by the +5V line
    from the controller. Pin 21 and 49 of the U801 should have
    the voltage of +5V. The clock frequency of the LCD driver is
    determined by R814, R815, and C801. This frequency is
    approximately 1.61 kHz.
    The +5V line to the U801 also provides bias voltages to pins
    23, 24, and 26 of U801 through R811, R812, and R813.
    The LEDs are biased, using R802 and R803, through the
    +5V line. The switch Q801 is controlled by the
    LCD_BCK_LIGHT_EN line. When this line goes high (i.e.
    5V), Q801 is turned on and the LEDs lights up. 
    The GP60 Series Radio Alignment 
    Procedures 
    The following procedures are to be done together with the
    RSS. 
    RSSI Threshold Adjustment 
    Tuning Frequency:  
    Automatic - Frequency displayed on Tuning screen.
    •Apply a standard reference level signal of -47 dBm,
    1 kHz tone with 3 kHz deviation.
    •Adjust the audio output of the radio to rated level
    (0.25W), i.e. 2.45 V rms.
    •Reduce the generator level until 10 dB SINAD is
    obtained.
    •While the radio is in the 10 dB SINAD mode, press
    the up-arrow key once to program the correct RSSI
    setting into the radio. 
    						
    							 
    2-8
     
    6881086C09-OMarch, 1997
     
    Theory of OperationGP68 Portable Radios Service Manual
    The GP60 Series Radio Alignment Procedures
     
    Low Port Modulation 
    Tuning Frequency: 
    Automatic - Frequency displayed on Tuning screen. 
    Deviation Setting: 
    375 Hz +/- 40 Hz for 12.5 kHz channel spacing,
    750 Hz +/- 40 Hz for 20/25/30 kHz channel spacing.
    •Set the radio into TX low power mode. The Modula-
    tion Analyzer should be set as follows:
    •Use the up/down arrow keys to change the low port
    deviation setting and the F6 key to toggle the PTT.
    NOTE
     
    The low port tuning tone is automatically
    generated internally by the radio. No external 
    modulation injection is required. 
    VCO Deviation Adjustment 
    Tuning Frequency: 
    Automatic - Frequency displayed on Tuning screen. 
    Deviation Setting: 
    2.2 kHz +/- 100 Hz for 12.5 kHz channel spacing,
    4.6 kHz +/- 200 Hz for 20/25/30 kHz channel spacing.
    •Set the radio into TX low power mode.
    •Inject a 110 mV rms, 2 kHz audio signal into the
    external mic using the radio test box.
    •The Modulation Analyzer should be set as follows:
    •Use the up/down arrow keys to change the deviation
    setting and the F6 key to toggle the PTT. 
    Transmitter Power Adjustment 
    Tuning Frequency: 
    Automatic - Frequency displayed on Tuning screen. 
    Power Level: 
    VHF - 1 W and 5 W,
    UHF - 1 W and 4 W.•For power tuning, it is important to ensure that the
    DC Voltage  
    MUST 
     be maintained under load at 7.5
    V +/- 0.1 V (3 A is the current limit).
    •Use the up/down keys to change the power setting
    and the F6 key to toggle the PTT.
    •Tune the radio according to the specification above.
    NOTE
     
    To avoid heating the radio too much, do not
    leave the radio in TX mode continuously and
    leave a 30 second interval between tuning 
    points. 
    Reference Oscillator Warp Adjustment 
    Tuning Frequency: 
    Automatic - Frequency displayed on Tuning screen.  
    Frequency window: 
    VHF = +/- 300 Hz,
    UHF = +/- 400 Hz.
    •Set the radio into TX low power mode.
    •Use the up/down arrow keys to change the frequency
    setting and the F6 key to toggle the PTT. FM
    PEAK+
    15 kHz LP Filter “ON”
    All HP Filters “OFF”
    De-emphasis “OFF”
    FM
    PEAK+
    15 kHz LP Filter “ON”
    All HP Filters “OFF”
    De-emphasis “OFF” 
    						
    							 March, 1997 6881086C09-O 2-9 
    Squelch Attenuator
    Rx Filter
    Tone
    Generator
    Lowspeed
    Generator
    Deviation
    Attenuator
    Splatter
    FilterLimiter
    De-emphasis
    5 Volt
    Regulator
    Audio
    PA
    Volume
    PA Enable
    Speaker
    Mic Enable
    Mic
    PreampliÞer Pre-
    Highspeed
    Data
    Generator
    Channel
    Switch
    Push
    Buttons Lowspeed
    Control
    Battery
    MonitorFrom
    BatterySCI BUS
    Harmonic
    FilterReceiver1st
    MixerIF2nd Mixer
    Demodulator
    Synthesizer
    VCOReference
    Oscilator
    RF
    PA
    Analog
    Control
    Steering/
    VCO
    ModWarp
    Prescaler
    Squelch Adjust
    Rx
    Audio
    Fast
    Detect
    Carrier
    Detect
    Adapt
    Rx/Battery Saver
    Lock
    Detect
    ClockShift
    Tx SPI
    BUS
    Tx
    Audio
    LEDs Antenna
    From
    Battery
    Reset 5V
     
    m 
    P
    2.1 MHz
    Lowspeed
    Detector
    Audio
    Filter IC
    5 Volt
    Regulator
    5V   
    m
     
    P
     
    The GP60 Series Portable 
    Radio Functional Block 
    Diagram
     
    Power
    Referenceemphasis 
    						
    							 
    2-10
     
    6881086C09-O March, 1997
     
         
     RECEIVER  BLOCK  DIAGRAM 
    IF 
    Amp 
    2-Pole
    Crystal
     Filter
    15+ Lo  +6dbm     
         RF
    Amp    2-Pole
    Bandpass
        Filter     Filter  Bandpass     3-Pole
    Detected  audio From
    Antenna
    Switch
     5V RX5V RX
     
    2nd LO 
    4-Pole
    Ceramic 4-Pole
    Ceramic 
     TRANSMITTER BLOCK DIAGRAM 
    Pin +5V Tx
    Pre-driver
    Driver
     
    TX B+
    Final
    CouplerAntenna
        SwitchHarmonic
      Filter
     Power 
    ControlTo Receiver
     
    IF IC  
    Buffer
    VCTL
    B+
    IDAC 
    Block Diagram for Receiver and Transmitter 
    						
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