Motorola Cm Radio Uhf2 Hp Information Manual
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Commercial SeriesCM Radios UHF2 (438-470MHz) High Power Service Information Issue: December 2 003
ii Computer Software Copyrights The Motorola products described in this manual may include copyrighted Motorola computer programs stored in semiconductor memories or other media. Laws in the United States and other countries preserve for Motorola certain exclusive rights for copyrighted computer programs, including the exclusive right to copy or reproduce in any form, the copyrighted computer program. Accordingly, any copyrighted Motorola computer programs contained in the Motorola products described in this manual may not be copied or reproduced in any manner without the express written permission of Motorola. Furthermore, the purchase of Motorola products shall not be deemed to grant, either directly or by implication, estoppel or otherwise, any license under the copyrights, patents or patent applications of Motorola, except for the normal non-exclusive royalty- free license to use that arises by operation of law in the sale of a product.
iii Table of Contents Chapter 1 MODEL CHART AND TECHNICAL SPECIFICATIONS 1.0 CM140/CM160 Model Chart ................................................................................ 1-1 2.0 Technical Specifications ...................................................................................... 1-2 Chapter 2 THEORY OF OPERATION 1.0 Introduction .......................................................................................................... 2-1 2.0 UHF (438-470MHz) Receiver .............................................................................. 2-1 2.1 Receiver Front-End ........................................................................................ 2-1 2.2 Receiver Back End ......................................................................................... 2-2 3.0 UHF Transmitter Power Amplifier (438-470 MHz) ............................................... 2-2 3.1 First Power Controller Stage .......................................................................... 2-2 3.2 Power Controlled Driver Stage ....................................................................... 2-3 3.3 Final Stage ..................................................................................................... 2-3 3.4 Directional Coupler ......................................................................................... 2-3 3.5 Antenna Switch............................................................................................... 2-3 3.6 Harmonic Filter ............................................................................................... 2-4 3.7 Power Control ................................................................................................. 2-4 4.0 UHF (438-470MHz) Frequency Synthesizer ........................................................ 2-4 4.1 Reference Oscillator ....................................................................................... 2-4 4.2 Fractional-N Synthesizer ................................................................................ 2-5 4.3 Voltage Controlled Oscillator (VCO) ............................................................... 2-6 4.4 Synthesizer Operation .................................................................................... 2-7 5.0 Controller Theory of Operation ............................................................................ 2-8 5.1 Radio Power Distribution ................................................................................ 2-8 5.2 Protection Devices........................................................................................ 2-10 5.3 Automatic On/Off .......................................................................................... 2-10 5.4 Microprocessor Clock Synthesiser ............................................................... 2-11 5.5 Serial Peripheral Interface (SPI) ................................................................... 2-12 5.6 SBEP Serial Interface ................................................................................... 2-12 5.7 General Purpose Input/Output...................................................................... 2-12 5.8 Normal Microprocessor Operation................................................................ 2-13 5.9 Static Random Access Memory (SRAM)...................................................... 2-14 6.0 Control Board Audio and Signalling Circuits ...................................................... 2-14 6.1 Audio Signalling Filter IC and Compander (ASFIC CMP) ............................ 2-14 7.0 Transmit Audio Circuits ...................................................................................... 2-15 7.1 Microphone Input Path ................................................................................. 2-15 7.2 PTT Sensing and TX Audio Processing ....................................................... 2-16
iv 8.0 Transmit Signalling Circuits ............................................................................... 2-17 8.1 Sub-Audio Data (PL/DPL) ............................................................................ 2-17 8.2 High Speed Data .......................................................................................... 2-18 8.3 Dual Tone Multiple Frequency (DTMF) Data ............................................... 2-18 9.0 Receive Audio Circuits....................................................................................... 2-19 9.1 Squelch Detect ............................................................................................. 2-19 9.2 Audio Processing and Digital Volume Control.............................................. 2-20 9.3 Audio Amplification Speaker (+) Speaker (-) ................................................ 2-20 9.4 Handset Audio .............................................................................................. 2-21 9.5 Filtered Audio and Flat Audio ....................................................................... 2-21 10.0 Receive Signalling Circuits ................................................................................ 2-21 10.1 Sub-Audio Data (PL/DPL) and High Speed Data Decoder .......................... 2-21 10.2 Alert Tone Circuits ........................................................................................ 2-22 Chapter 3 TROUBLESHOOTING CHARTS 1.0 Troubleshooting Flow Chart for Receiver RF (Sheet 1 of 2)................................ 3-2 1.1 Troubleshooting Flow Chart for Receiver (Sheet 2 of 2) ................................ 3-3 2.0 Troubleshooting Flow Chart for 40W Transmitter (Sheet 1 of 3) ......................... 3-4 2.1 Troubleshooting Flow Chart for 40W Transmitter (Sheet 2 of 3).................... 3-5 2.2 Troubleshooting Flow Chart for 40W Transmitter (Sheet 3 of 3).................... 3-6 3.0 Troubleshooting Flow Chart for Synthesizer........................................................ 3-7 4.0 Troubleshooting Flow Chart for VCO ................................................................... 3-8 5.0 Troubleshooting Flow Chart for DC Supply (1 of 2) ............................................. 3-9 5.1 Troubleshooting Flow Chart for DC Supply (2 of 2) ..................................... 3-10 Chapter 4 UHF2 PCB/ SCHEMATICS/ PARTS LISTS 1.0 Allocation of Schematics and Circuit Boards ....................................................... 4-1 1.1 UHF2 and Controller Circuits ......................................................................... 4-1 2.0 UHF2 25-40W PCB 8486577Z01 / Schematics................................................... 4-3 2.1 UHF2 PCB 8486577Z01 Parts List 40W ...................................................... 4-19
Chapter 1 MODEL CHART AND TECHNICAL SPECIFICATIONS 1.0 CM140/CM160 Model Chart CM Series, UHF2, 438-470 MHz Model Description MDM50RPC9AA2CM140 438-470 MHz, 40W, 8CH, BNC MDM50RPF9AA2 CM160 438-470 MHz, 40W, 64CH, BNC Item Description XPMUE2008_CM140 Super Tanapa UHF2, 40W, 8CH, BNC X PMUE2011_ CM160 Super Tanapa UHF2, 40W, 64CH, BNC XPMUE2033_CM140 Tanapa UHF2, 40W, 8CH, BNC X PMUE2035_ CM160 Tanapa UHF2, 40W, 64CH, BNC XFCN6288_Control Head X FCN5523_ Control Head XPMUE2033_SCM140 UHF2 U/C BNC Service Board X PMUE2035_S CM160 UHF2 U/C BNC Service Board XXRMN5018Mag One Microphone X X 6866546D02_ RTTE Leaflet XX6866537D37_Safety Leaflet X X GLN7324_ Low Profile Trunnion x = Indicates one of each is required.
1-2 MODEL CHART AND TECHNICAL SPECIFICATIONS 2.0 Technical Specifications Data is specified for +25°C unless otherwise stated. General Specification UHF2 Frequency Range:438-470 MHz Frequency Stability (-30°C to +60°C, 25°C Ref.)±2.5 PPM Channel Capacity:CM140 - 8 CM160 - 64 Channel Spacing: 12.5/25 kHz Power Supply:13.6 Vdc (10.88 Vdc - 16.32 Vdc) negative Vehicle ground Dimensions (L x W x H) 118mm X 169.5mm X 44mm (4.65” X 6.67” X 1.73”) Weight1.01 kg (2.22 lbs) FCC Description ABZ99FT4048 Operating Temperature-30 to 60° C (Display only -20°C to 60°C) Storage Temperature -40 to 85° C Thermal Shock-40 to 80° C High Humidity 95% RH @ 50° C for 8 hrs ESD15KV air discharge Packing Test Impact Test
Technical Specifications1-3 Transmitter Specification UHF2 Power Output25-40W Conducted/Radiated Emissions:-36 dBm < 1 GHz -30 dBm > 1 GHz Audio Response: (from 6 dB/ oct. Pre-Emphasis, 300 to 3000Hz) TIA603 and CEPT Tx Audio Distortion < 3% Modulation Limiting:±2.5 kHz @ 12.5 kHz ±4.0 kHz @ 20 kHz ±5.0 kHz @ 25 kHz FM Hum and Noise: -35 [email protected] kHz -40 dB@25 kHz Receiver Specification UHF2 Sensitivity (12 dB SINAD):0.35 µV @ 12.5 kHz 0.3 µV @ 25 kHz Intermodulation: 60 [email protected] kHz 70 dB@25 kHz Adjacent Channel Selectivity:60 dB @ 12.5 kHz 70 dB @ 25 kHz Spurious Response 70 dB Rated Audio Power4 W (typ.) Internal 7.5 W @ 5 % External Audio Distortion < 5 % Hum and Noise:-35 dB @ 12.5 kHz -40 dB @ 25 kHz Audio Response TIA603 and CEPT Conducted Spurious Emission per FCC Part 15:-57 dBm 1 Ghz Specifications subject to change without notice. All electrical specifications and methods refer to EIA/TIA 603 standards.
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Chapter 2 THEORY OF OPERATION 1.0 Introduction This Chapter provides a detailed theory of operation for the UHF circuits in the radio. Details of the theory of operation and trouble shooting for the the associated Controller circuits are included in this Section of the manual. 2.0 UHF (438-470MHz) Receiver 2.1 Receiver Front-End The received signal is applied to the radio’s antenna input connector and routed through the harmonic filter and antenna switch. The insertion loss of the harmonic filter/antenna switch is less than 1 dB. The signal is routed to the first filter (3-pole), which has an insertion loss of 2 dB typically. The output of the filter is matched to the base of the LNA (Q303) that provides a 16 dB gain and a noise figure of better than 2 dB. Current source Q301 is used to maintain the collector current of Q303. Diode CR301 protects Q303 by clamping excessive input signals. Q303 output is applied to the second filter (4-pole) which has an insertion loss of 1.5 dB. In Distance mode, Q304 turns on and causes D305 to conduct, thus bypassing C322 and R337. In Local mode, the signal is routed through C322 and R337, thus inserting 7 dB attenuation. Since the attenuator is located after the RF amplifier, the receiver sensitivity is reduced only by 6 dB, while the overall third order input intercept is raised. The first mixer is a passive, double-balanced type, consisting of T300, T301 and U302. This mixer provides all of the necessary rejection of the half-IF spurious response. Low-side injection at +10 dBm is delivered to the first mixer. The mixer output is then connected to a duplex network which matches its output to the XTAL filter input (FL300) at the IF frequency of 44.85 MHz. The duplex network terminates into a 50 ohm resistor (R340) at all other frequencies. Figure 2-1UHF Receiver Block Diagram Mixer Xtal Filter Controller Front Filter Antenna First LO 2nd LO Xtal Osc IF AmpSecond Filter4- Pole 25kHzFilter 12.5kHzFilter Phase Shift Element IFIC LNA 25kHzFilter 12.5kHzFilter
2-2THEORY OF OPERATION 2.2 Receiver Back End The IF signal from the crystal filter enters the IF amplifier which provides 20 dB of gain and feeds the IF IC at pin 1. The first IF signal at 44.85 MHz mixes with the second local oscillator (LO) at 44.395 MHz to produce the second IF at 455 kHz. The second LO uses the external crystal Y301. The second IF signal is amplified and filtered by two external ceramic filters (FL303/FL302 for 12.5KHz channel spacing and FL304/FL301 for 25KHz channel spacing). The IF IC demodulates the signal by means of a quadrature detector and feeds the detected audio (via pin 7) to the audio processing circuits. At IF IC pin 5, an RSSI signal is available with a dynamic range of 70 dB. 3.0 UHF Transmitter Power Amplifier (438-470 MHz) The radio’s 40W PA is a three-stage amplifier used to amplify the output from the VCOBIC to the radio transmit level. All three stages utilize LDMOS technology. The gain of the first stage (U101) is adjustable and controlled by pin 7 of U103-2 via U103-3. It is followed by an LDMOS stage Q105 and LDMOS final stage Q100. Figure 2-2UHF Transmitter Block Diagram Devices U101, Q105 and Q100 are surface mounted. Q100 is screwed down to the chassis to ensure good thermal contact. This scheme also ensures sufficient thermal contact between driver and chassis. 3.1 First Power Controller Stage The first stage (U101) is a 24dB gain integrated circuit containing two LDMOS FET amplifier stages. It amplifies the RF signal from the VCO (TX_INJ). The output power of stage U101 is controlled by a DC voltage applied to pin 1 from the op-amp U103-3, pin 8. The control voltage simultaneously varies the bias of two FET stages within U101. This biasing point determines the overall gain of U101 and therefore its output drive level to Q105, which in turn controls the output power of the Loop Pin Diode Antenna Switch RF JackAntenna Harmonic Filter CouplerPA - F i n a lStag e From VCO ControlledStage Bias Temperature Sense SPI BUSASFIC_CMP PA PWR SET PA Driver Controller U103-2Forward