Bose Lifestyle 5 Owners Manual

							10
CD TERMS
Major Components of the System
ASP: Analog Signal Processor. The component in the CD circuitry that contains the RF ampli-
fier, VCO, and the tracking, focus, and sled servos.
DSP: Digital Signal Processor. The component in the CD circuitry that performs slicing, EFM
demodulation, CIRC decoding, error correction and concealment, track access, CLV regula-
tion, and drives the D/A.
Digital to Analog Converter (D/A, DAC): A device that converts digital information (usually a
serial data stream) into an analog signal.
mC: Micro Controller. The component of the CD circuitry that performs track access, se-
quences all events (such as focus, disc start, stop, etc.), monitors for servo errors, and pro-
cesses user information (commands, door open, etc.).
CLV Servo: The circuit that keeps the disc rotating at a constant linear velocity.
Focus Servo: The circuit that keeps the optical pickupÕs lens the proper distance away from
the surface of the disc.
Sled Servo: The circuit that keeps the sled positioned within the linear range of the tracking
actuator.
Tracking Servo: The circuit that keeps the optical pickupÕs lens positioned within a single track
as the disc rotates.
VCO: Voltage Controlled Oscillator. Part of the phased locked loop circuit that generates an
output frequency dependent on its input voltage.
Signal Names
ATSC: Anti-Shock  Circuit.
SLEQ: Sled Equalizer
FDO: Focus Drive Output
FEAO: Focus Error Amplifier Output.
HFL: High Frequency Level
PDO: Phase Detector Output
PH: Peak Hold
SLDO: Sled Drive Output.
SPDO: Spindle Drive Output. 
						

							11
CD TERMS
Signal Names
(continued)
TAP: Test Access Port. A 3 pin test interface used by automated test to control and observe
the board under test.
TDO: Tracking Drive Output.
TEAO: Tracking Error Amplifier Output.
TGL: Tracking Gain Low.
THLD: Tracking Hold.
TOFF: Tracking Off
TPA+: Tracking Pre-Amplifier (+ input).
TPA-: Tracking Pre-Amplifier (- input).
TPAO: Tracking Pre-Amplifier Output.
VCOO: VCO Output
Vref1: The reference voltage used by the RF amplifier in the ASP.
Vref2: The unbuffered reference voltage used by the servos in the ASP.
Vref3: The buffered reference voltage used by servos in the ASP.
List of Abbreviations
ASP Analog Signal Processor
CE Control Expanderª
CIRC Cross Interleave Reed-Solomon Code
CLV Constant Linear Velocity
D/A Digital to Analog
DSP Digital Signal Processor
EEPROM             Electrically Erasable Program Read Only Memory
EFM Eight-to-Fourteen Modulation
IC             Integrated Circuit
IR             Infrared
kHz Kilohertz
MHz Megahertz
PLL Phase Locked Loop
RF Radio Frequency
mC Microcontroller
VCO Voltage Controlled Oscillator
VFD Vacuum Fluorescent Display 
						

							12
THEORY OF OPERATION
Overview
The Lifestyle¨ Model 5 music center is a self-contained CD player, AM/FM tuner, preamplifier,
and control center for use with Bose¨ powered speaker systems. In addition to the two internal
sources (CD and tuner), it also allows for up to three external devices to be connected (i.e.
AUX, VIDEO, and TAPE). It uses a Radio Frequency (RF) remote control that allows the unit to
be operated from different rooms within a house without the need for a line-of-sight path back
to the console. The remote control commands for the external sources are translated and
passed to the serial data output jack. With the CE-I accessory device this data can be con-
verted to Infrared (IR) for use with many conventional audio devices.
Power Supply
The unit is powered by an external 12VAC power supply capable of delivering 1.2 amps rms.
Dl, C2, D2, and C6 form positive and negative half-wave rectifiers respectively. Q1, Q2, Q3,
and their respective components make up a discrete low dropout regulator with a nominal
output voltage of 10. 2V. VR1 is the corresponding negative voltage regulator with an output of
-12V. These two regulators create the bipolar supply used by all of the audio circuits. The
supply is turned on and off with the unit by the control signal on J7-10.
R5, D3, C9, and VR2 create an +8V regulated supply that is used by the CD servo circuits and
the remote RF receiver. R6, D4, C11, and VR3 create a +5V regulated supply that is used by
the main and CD microcontrollers (U402 and U505), and the CD control circuits (U501, U502,
etc.). Both supplies are live at all times. R5 and R6 limit the power dissipation of their respec-
tive regulators. VR2 and VR3 normally run quite hot to the touch.
R8, D6, and C13 form an unregulated supply (M+) that is used by the CD drive electronics.
C14, D7, D8, and C15 form a charge pump that creates a negative high voltage. This voltage
is regulated down to -24V by R9, D9, and C16. The vacuum fluorescent display (VFD) driver
U403 uses this -24V to shut off segments in the display. C19 and C18 reduce the 12VAC to
approximately 3Vrms. This voltage powers the displayÕs (VFD401) heater. C16, D10, C17, and
R10 provide a DC bias of -15V for the VFD heater (cathode).
Control Electronics
Main microcontroller (mC) U402 controls the audio circuits, tuner, display, and push buttons.
The mC runs at a nominal frequency of 4.0MHz that is supplied by ceramic resonator X401.
The mC is reset by a rising edge on pin 1 caused by R409 and C404. This occurs automatically
on power-up but may be forced manually by depressing S416 (if installed).
U402 communicates with U403 over a four wire serial data bus (U403, pins 15, 16, 18 and
19).  The bus is updated once per millisecond. U403 latches the serial data into its outputs,
driving the VFD. The VFD is a four grid multiplexed display with 16 anodes at each grid. The
grids are turned on sequentially, one each millisecond. As each grid is turned on, the corre-
sponding anodes for that grid are also turned on. This lights the desired segments. When the
next grid is turned on, the anodes are changed to correspond to the desired segments under
this next grid. In this way, the entire display is scanned, 1/4 at a time. The display is blanked for
a brief interval in-between when one grid is turned off and the next is turned on. In this blank-
ing interval, the push buttons are scanned to determine what keys are being pressed. This
data is read in on U402, pins 12 through 15. 
						

							13
THEORY OF OPERATION
There is one main serial data bus that controls source selection IC U101, volume control IC
U103, PLL frequency synthesizer U302, and EEPROM U401. The clock and data information
for all of these devices is sent out on U402, pins 5 and 7. However, U401, U302, U101 and
U103 each have their own chip select line. Data is sent to U302 whenever the tuner frequency
is changed. During the serial data transmission, U302, pin 3 is driven high. Data is sent to
U101 or U103 whenever a new source is selected or the volume is changed. At the completion
of this transmission, the STRB line (J9-5) is driven high briefly.
U401 is a nonvolatile EEPROM which is used for storing certain data such as tuner presets
and house codes. This data is protected from loss during a power outage. U401 communicates
with U402 over the main serial data bus. During communication to this chip, the chip select line
(U401, pin 1) is driven high.
There is another serial data bus between U402 and U505. These lines are labeled
CD_READY, CD_CLK, CD_ CMD, and CD_DATA on the schematic. The bus sends com-
mands (play, stop, etc.) to U505 and also sends track and time information to U402 so that it
may be displayed. This bus is constantly in use any time ÒCDÓ is selected as the source.
RR101 receives and demodulates commands from the RF remote control. R138, C130, C129,
R139, and D109 remove noise and shape the pulse. U106 squares up the pulse edges and
converts them to 5V logic levels. This signal is then fed to U402, pin 37. C401 prevents any
glitches at this pin.
In addition to the major functions mentioned above, U402 also performs several miscellaneous
tasks. The bipolar power supply for the audio circuits (+1OV/-12V) is turned on and off by
U402, pin 19 (power). Both supplies are turned on when this line is high (+5V), and off when it
is low. The unregulated supply is monitored by C414, R407, and R408. In the event of a power
failure, U402  will shut down the system gracefully. There are three independent muting cir-
cuits: Mute A, Mute B, and Power-on Mute. Mute A and Mute B are controllable from the
remote, and allows the A and B outputs to be controlled independently. The Power-on Mute is
used only during power-up (when the bipolar supply is turned on) to prevent pops and clicks.
When an external source is selected (AUX, VIDEO, or TAPE), the transport commands (FF,
FR, etc.) are passed through the serial data jack via Q401 and its associated circuitry.
Audio Circuits
There are two internal audio sources (CD and Tuner) and three external sources (AUX,
VIDEO, and TAPE). All of the sources are routed to U101.  R101-106 and R201-206 provide
level matching for the different input sources. D101-106, D201-206, C101-103, and C201-203
provide static protection on the inputs. U101 selects 1 of the 5 input sources, and routes it to
its output on pins 5 and 9 (left), and pins 20 and 24 (right).
One half of U102 (pins 1-3 and 12-14) provides gain and buffering for the input signal. The
buffered output is routed to U103 and to the FIXED output on J103. U103 consists of two
sections. The first section attenuates the signal from 0 to 70dB in 10dB steps. The output of
the first section is buffered by the other half of U102 (pins 5-7 and 8-10) and is fed to the
second section. The second section attenuates the signal in 1dB steps. The two sections
together provide smooth attenuation from 0 to 80dB in 1dB steps. 
						

							14
THEORY OF OPERATION
U103Õs output signal is buffered by U105, and is fed to the A and B outputs. These outputs are
independently mutable through transistors Q103-106 and Q203-206. Each pair of transistors
provides approximately 80dB of attenuation when muted. These mute transistors are con-
trolled by the signals on J9-7 and J9-8. U103Õs output signal is also routed to headphone
amplifier U104. This provides gain and buffers the signal in order to drive a low impedance
load. When the headphones are inserted into J104, the control signal on J105-3 causes the A
speaker output to be muted.
The TAPE output jack functions like the FIXED output does. There is one exception. The TAPE
output is shut off whenever ÒTAPEÓ is selected as the source. This prevents feedback through
the TAPE deck if it was placed in ÒRecordÓ while ÒTAPEÓ was selected as the source. This is
accomplished by feeding the FIXED level output signal from U102, pins 1 and 14 back into
U101. A control signal from U402 allows U101 to pass this signal to its outputs on pins 5 and
17, except when ÒTAPEÓ is selected as a source.
The FIXED, TAPE, and headphone outputs all have a single mute transistor which is used to
prevent pops and clicks during power-up and power-down. These transistors are all controlled
by the signal on J9-6. Each transistor provides about 40dB of attenuation when the muting is
switched on.
CD Player
The CD circuitry consists of six major sections: Analog signal processor (ASP) U501, digital
signal processor (DSP) U502, digital to analog converter (D/A) U506, CD microcontroller (mC)
U505, power drivers U503 and U504, and the CD mechanism. U501 contains the RF amplifier
and servo control circuits. U502 performs EFM demodulation, CIRC decoding, and outputs the
digital audio to U506. It also extracts the subcode Q information (track #, time, etc.) and con-
trols U501 during track access. U505 receives and interprets the subcode Q data from U502
and sends it along to U402. It also issues commands to U502 for track access, and controls all
operations of the CD circuitry.
U501 receives its input signal (through P501) from the mechanismÕs photo diode pickup. The
A, B, C, and D inputs are added together and amplified. The RF amplifier output appears on
RFSM (U501, pin 72 ). This signal is the familiar Òeye pattern.Ó This signal is sent to EFMIN on
U502, Pin 8 where it is sliced for EFM demodulation. The inverted and non-inverted sliced
outputs appear on the EFMO and EFMO~ lines (U502, pins 6 and 7) . These signals are low-
passed and subtracted and the output appears on SLCO (U501, pin 53). This signal supplies
the DC bias for the RFSM signal. This signal is then sent to the slicer for slice level control.
The RFSM signal is peak-detected and compared to a reference to determine if there is a
signal being received back from the disc. The output appears on DRF (U501, pin 40 ). This
signal is used by U505 to determine if the lens is in focus. The envelope of the RFSM signal is
also used in determining when the laser crosses a track boundary during track access. The
HFL signal (U501, pin 48) conveys this information to U502.
The A+C signal is subtracted from the B+D signal. This produces the focus error signal FEAO
(U501, pin 26 ). The focus gain is adjusted by R527. This signal is amplified and filtered by the
focus servo amplifier (inside U501). It then appears as an output at FDO (U501, pin 22). The
FDO signal is fed to U503. U503 generates the complementary outputs (pins 11 and 14) that
are used to actuate the focus coil (P502, pins 5 and 8). 
						

							15
THEORY OF OPERATION
The E and F signals are amplified and subtracted. This produces the tracking error signal
TEAO (U501, pin 7 ). The F channelÕs gain is adjusted by E-F balance potentiometer R506.
The TEAO signal is used by the anti-shock circuit, the track jump detection circuit, and the
tracking servo. The track jump detection output is sent to U502 on the TES line (U501, pin 47).
R510, which is connected to TPA+ (U501, pin 13 ), adjusts the tracking gain. This signal is
amplified and filtered. It then appears as an output on TPAO (U501, pin 15). R511 adjusts the
tracking offset . The TPAO signal is further amplified and filtered.  It then appears as an output
on TDO (U501, pin 21). This signal is fed to U503. U503 generates the complementary out-
puts (U503) that are used to actuate the tracking coil (P502, pins 6 and 7).
The TDO signal is also used as the input for the sled servo. This signal is filtered and fed to the
sled servo amplifier on SLEQ (U501, pin 20). This signal is amplified and is then added to the
FEED signals from U505. The result appears on SLDO (U501, pin 33). This signal is fed to
U504. U504 generates the complementary outputs (pins 11 and 14) that are used to drive the
sled motor (P503, pins 5 and 6).
The Constant Linear Velocity (CLV) servo is regulated by comparing the playback speed to a
FIXED reference frequency in U502. The error signal appears at U502, pins 10 and 11 (CLV+
and CLV-). These signals are subtracted and the difference appears on SPD (U501, pin 29).
The SPD signal is filtered and amplified. It then appears at the output on SPDO (U501, pin
31). This signal is fed to U504. U504 generates the complementary outputs (pins 3 and 6) that
are used to drive the disc motor (P503, pins 1 and 2).
U501 regulates the laser power by monitoring the MD input (P502-3). This signal is compared
to a reference to generate the proper drive signal on LDD (U501, pin 74). This signal biases
Q501. Q501 drives the laser diode output LD (P502-1). U501Õs main DC reference voltage is
Vref3 which appears on pin 9. This voltage is nominally 4V.
The VCO is the final function contained in U501. The VCO is used by U502 for EFM demodu-
lation. The PDO output signal (U502, pin 4) is filtered and amplified by U501. In turn, this
output appears on VCOC (U501, pin 59) This is the VCO control voltage input. The nominal
VCO free-run frequency is 8.64MHz and is set by R558. The VCO also requires a 16.9344MHz
clock input from U502.  This input appears on CLK (U501, pin 62). The VCO output appears at
VCOO (U501, pin 60). This signal is buffered by U502. The buffered output appears on AO
(U502, pin 2). The VCO output is divided by 2 in U502. In turn, its output appears on PCK
(U502, pin 18), which is 4.32MHz.
The DSP clock is derived from a 16.9344MHz crystal oscillator (X501). However, this oscillator
is normally turned off by U505. It is only switched on during focusing and when a disc is play-
ing. U502 receives its EFM input from U501 on EFMIN (pin 8). This signal is sliced, EFM
demodulated, and CIRC decoded. The digital audio output signal is sent serially to U506 on
the LRCLK, DFOUT and DACLK lines (U502, pins 33, 35, and 36).
U502 receives servo control commands from U505 on the serial bus (U502, pins 51, 53 and
54). These commands are translated to appropriate control signals for U501 for focusing, disc
start, disc stop, disc braking, and track jumps. The focus servo is controlled by the FOCS and
FST outputs. The CLV servo is controlled through the CLV+ and CLV- lines. The tracking
servo is controlled by the TOFF, TGL, and THLD outputs. Track jumps are created by signals
on the JP+ and JP- lines. Track jump detection is based on signals from U501 on the HFL and
TES inputs. 
						

							16
THEORY OF OPERATION
U505Õs oscillator is obtained from a 4MHz ceramic resonator (X502). U505 is reset by a rising
edge on pin 1 that is caused by R573 and C574. This occurs automatically on power-up, but
may be forced manually by depressing S502 (if installed). U505 communicates with U502 on a
serial bus (U502, pins 50  through 54). U505 sends servo commands for focusing and track
access to U502. U502 sends subcode Q data to U505 which extracts track, time and table of
contents information from it. The time and track data is formatted, and is sent to U402 on a
serial bus (U505, pins 11-13).
During track access, U505 controls the sled motor directly using the FEED+ and FEED- lines
(U505, pins 21 and 22). It also directly controls the laser U503 and VCO using the LASER~
line (U505, pin 9). When the laser is turned on, the VCO and U503 are enabled, otherwise
they are turned off. U505 can also enable and disable U504 with the MOTOR_EN line (U505,
pin 20).
U506 (D/A converter) performs 8x oversampling and digital filtering. It then converts the digital
audio into left and right stereo outputs. D/A reference voltages are obtained from zener diode
D504. U506Õs analog outputs are buffered by one-half of U507 (pins 5-7 and 8-10). The
buffered signal is lowpass filtered by the other half of U507. This removes any residual out-of-
band digital noise. The recovered audio is then routed to U101.
Tuner
The FM antenna signal is routed through F connector J301 and enters the FM front end mod-
ule. This contains a tuned RF amplifier, FM local oscillator, and a mixer. The IF output signal
appears on pin 4 (front end) and passes through 10.7MHz ceramic filter CF302. The filterÕs
output is amplified by the IF gain stage. This stage consists of Q307, Q308 and their associ-
ated components. The signal is then passed through a second ceramic filter, CF303, a second
gain stage (Q309, Q310, etc.) and a third ceramic filter, CF304.
CF304Õs output signal is sent to the main tuner IC, U301. This device contains the FM detec-
tor, FM stereo MPX decoder, stop level detection, as well as most of the AM circuitry (see
below). U301 further amplifies the IF signal, and then performs FM detection. This detection
uses a double tuned quadrature detector formed by T304 and T305.  T305 is adjusted for FM
center frequency by adjusting it for 0VDC between the AFC terminal (U301, pin 4) and the
Vreg terminal (U301, pin 28). T304 is adjusted for minimum distortion (A few iterations may be
required because these two adjustments are dependent on one another). The recovered audio
appears on U301, pin 8.
C313 and its associated components filter the recovered audio and feed it back into U301, pin
9. U301 performs the FM stereo MPX decoding. When you select FM, the decoded L/R chan-
nel signals are sent out on pins 14 and 15. The resistance between pin 12 and ground
controls the separation. 456kHz ceramic resonator CF301 controls the PLL decoder. The PLL
loop filter components are connected to pin 11. Potentiometer R334, which is connected to pin
30, sets the FM stop level to 33dBf (nominal).
C304, R304, C307, and R309 perform FM de-emphasis. Q301, Q302 and their associated
components buffer the signals. MPX filters T301 and T302 remove any unwanted out-of-band
signals before sending them to U101.
The AM loop antenna signal enters the unit through J301Õs screw terminals. The signal is then
fed to AM front end module, T303. This device contains an RF tuned section and the AM local 
						

							17
THEORY OF OPERATION
oscillator tuned circuit. The tuned output appears on pin 12 and is fed to AM buffer FET Q300.
The buffered output is sent to U301, pin 27. U301 contains the AM RF amplifier, mixer, IF
amplifier, AM detector and AM stop level detection. Potentiometer R339, which is connected to
pin 16, sets the AM stop level to 70dB uV/M (nominal). The IF output signal appears on pin 26
and is filtered by IF filter T307. The signal is then fed back into U301, pin 24 for AM detection.
The AM detected output (pin 5) is filtered by C315, R316, and C314. The filtered output is fed
back into U301, pin 6. Finally, it is sent to the L/R outputs (pins 14 and 15) when ÒAMÓ is
selected.
U302 controls the AM and FM local oscillators. U402 sets U302 so that it can select the AM or
FM band and can tune to a particular frequency. The PLL reference oscillator originates from
7.2MHz crystal X301. This frequency is divided down to 400KHz (U302, pin 7). U302 divides
down the local oscillator frequencies and compares them to an internal reference frequency.
The error signal resulting from this comparison appears at pin 18. This error signal is inte-
grated and filtered by Q304, Q305, and their associated components. This produces the tuning
voltage which appears at Q304Õs collector.
The tuning voltage is further filtered by R323, C326, R322, and C319. This signal is then sent
to AM front end module T303, pin 14. It is used to vary the capacitance of two varactor diodes.
This first diode varies the frequency of the AM local oscillator. The second tunes the AM RF
input section to the desired frequency. Similarly, the tuning voltage is filtered by R330 and
C333.  Then it is fed to the FM front end module. The front end uses this voltage to vary the
local oscillator frequency and to tune the RF input sections. 
						

							18
See Figure
6 for a side
view of this
assembly.
Figure 3. Labelled Exploded View 
						

							19front of the base assembly (19). Lower the
cover into position.
4.3 There are two black tabs on the bottom
of the right cover. Push them in slightly and
snap the cover into place.
4.4 Replace the two screws (18B) that
secure the right cover to the base.
4.5 Replace the left cover assembly (Pro-
cedure 2).
5. CD Mechanism Removal
Note: Refer to Figures 3, 4 and 7 for
Procedures 5 and 6.
5.1 Remove the left cover assembly (Pro-
cedure 1) and the door/right cover assem-
bly (Procedure 3).
5.2 Lift the CD mechanism (11) straight up
from the four metal posts in the base (19).
Later models have 4 nylon washers (23)
mounted on the posts. Do not remove
them.
5.3 To prevent electrostatic damage to the
mechanism, solder together the two points
indicated in Figure 4.
Figure 4. APC PCB
5.4 Disconnect the 6 pin connector from the
PCB that is attached to the motors and the
5 pin and 8 pin connectors from the APC
PCB.
Note: The support grommets (14, 15) and
CD cover (12) are not supplied as part of
the mechanism. Remove and reuse them if
complete replacement of the mechanism is
required.
DISASSEMBLY/ ASSEMBLY PROCEDURES
1. Left Cover Assembly Removal
Note: Refer to Figures 3 and 5 for Proce-
dures 1 and 2.
1.1 Remove the two screws (18A) that
secure the left cover (7) to the base (19).
1.2 Press in the three recessed gray tabs
located on the connector panel and lift up
on the rear of the cover.
2. Left Cover Assembly Replacement
2.1 Align the five hooks on the left cover (7)
with the five catches on the front of the
base (19).
2.2 Lower the left cover and snap it into
place. The cover should be flush with the
closed door assembly (1).
2.3 Replace the two screws (18A) that
secure the left cover to the base (19).
3. Door Assembly and Right Cover Re-
moval
Note: Refer to Figures 3, 5 and 6 for
Procedures 3 and 4.
3.1 Remove the left cover assembly (Pro-
cedure 1).
3.2 Remove the two screws (18B) that
secure the right cover (6) to the base (19).
3.3 Press in the two recessed black tabs
located on the connector panel. Lift up on
the rear of the door assembly (1) and right
cover assembly (6).
3.4 Remove the console latch (16).
4. Door Assembly and Right Cover Re-
placement
4.1 Position the console latch (16) in the
base (19).
4.2 Align the two hooks on the right cover
assembly (6) with the two catches on the
Shorting point