Alinco Dr-m03sx, Dr-m06th Service Manual
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DR-M03SXService Manual DR-M06TH CONTENTS SPECIFICATIONS PARTS LAST 1) General 2 CPU Unit 22 2) Transmitter 2 MAIN Unit 22~24 3) Receiver 2 VCO Unit 24 CIRCUIT DESCRIPTION SP Unit 25 1) Receiver System 3 Mechanical Parts 25 2) Transmitter System 4 Packing.. 25 3) PLL Circuit 4 DRM03 PA Unit 25 4) Terminal Function of Microprocessor 5 ~ 7 5) Terminal Connection of Microprocessor 8 ADJUSTMENT SEMICONDUCTOR DATA 1) Required Test Equipment. 27 1) AK2341 9 2) Adjustment for DR-M06/03 28~29 2) AN78L05M 10...
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* SPECIFICATIONS GENERAL Frequency DRM03SX 28.00 - 29.700MHz DRM06TH 50.00 - 54.00MHz Step 5 , 10 , 12.5 , 15 , 20 , 25 KHz selectable Channel 100 Modulation F3E (FM) Antenna impedance 50 ohm unbalanced Power supply 13.8V DC +/- 10% Current Tx high.approxl 3.0 A(DRM03SX) Rx squelched.less than 600mA Dimensions DRM03SX 140(W) x 40(H) x 115(D) DRM06TH 140(W) x 40(H) x 155(D) Weight DRM03SX approx 681gs DRM06TH approx 800gs Transmitter Power output DRM03SX High : 10W Low: 1W DRM06TH High : 20W Low:...
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CIRCUIT DESCRTPTION 1) Receiver System 1. Front End The signal from the antenna is passed through a low-pass filter and input to the voltage step up circuit consisting Of L14. The signal from L14 is led to the gate of Q1. D19 is the diode limiter circuit against the excessive input power of more than 20dBm. Q1 is the FETwhich has two gates. The voltage of the gate 2 is set higher to get the high gain and sensitivity. The signal from Q1 is led to the triple band pass filter (L4, L5, L6), and gets the high...
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2) Transmitter System 1. Modulation Circuit The microphone amplifier IC1 (IDC, LPF) consists of two operational amplifi- ers. The signal from the microphone is led to pre-emphasis circuit consisting of C36 and R47 and then to the limiter circuit. The limiter circuit uses the saturation of the OP amplifier. The amplified signal is input to the low-pass filter IC1A. The output signal from the microphone amplifier is passed through variable resistors VR2 for modulatlon adjustment and input to the VCO unit....
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4) Terminal Function of Microprocessor Port No. I/O Logic PinName Description 1 O SEG19 LCDSegment19 Output 2 O SEG20 LCDSegment20 Output 3 O SEG21 LCDSegment21 Output 4 O SEG22 LCDSegment22 Output 5 O SEG23 LCDSegment23 Output 6 I GND AnalogGround 0V 7 I Vref Reference Voltage Input 5V 8 I Vcc CPU Power Supply hnput 5V 9 O 1750_ ToneBurstOutput 10 O Clock BEEP BeepToneOutput 11 I Active Low MUP Channel Up Input (Microphone Control) 12 I Active Low MDN Channel Down Input (Microphone Control) 13 I NoUse...
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Port No. I/O Logic PinName Description 40 I/O Clock SDA Data Output for EEPROM 41 O Clock CLK Clock Output 42 O Clock DAT DataOutput 43 O Clock ST1 Strobe Output for PLL IC 44 O Clock ST2 Strobe Output for CTCSS IC 45 I Active Low SFT Shift Key Input 46 I Active High SD Signal Detection Input 47 O Active High H/L Transmission Power (H: Low Power) 48 I Active Low V/M VFO/Memory Key Input 49 I Active Low CAL Call Key Input 50 I Active Low CTC CTCSS Mode Set Input 51 I Active Low REV Reverse Key Input 52 I...