Acer Travelmate 7530 Service Guide
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Chapter 4141 POST Codes Tables These tables describe the chipset and core POST codes, functions, phases, and components for the POST. Chipset POST Codes The following table details the chipset POST codes and functions used in the POST. CodeBeepsPOST Routine Description 02h Verify Real Mode 03h Disable Non-Maskable Interrupt (NMI) 04h Get CPU type 06h Initialize system hardware 08h Initialize chipset with initial POST values 09h Set IN POST flag 0Ah Initialize CPU registers 0Bh Enable CPU cache 0Ch Initialize caches to initial POST values 0Eh Initialize I/O component 0Fh Initialize the local bus IDE 10h Initialize Power Management 11h Load alternate registers with initial POST values 12h Restore CPU control word during warm boot 13h Initialize PCI Bus Mastering devices 14h Initialize keyboard controller 16h 1-2-2-3 BIOS ROM checksum 17h Initialize cache before memory autosize 18h 8254 timer initialization 1Ah 8237 DMA controller initialization 1Ch Reset Programmable Interrupt Controller 20h 1-3-1-1 Test DRAM refresh 22h 1-3-1-3 Test 8742 Keyboard Controller 24h Set ES segment register to 4 GB 26h Enable A20 line 28h Autosize DRAM 29h Initialize POST Memory Manager 2Ah Clear 512 KB base RAM 2Ch 1-3-4-1 RAM failure on address line xxxx* 2Eh 1-3-4-3 RAM failure on data bits xxxx* of low byte of memory bus 2Fh Enable cache before system BIOS shadow 30h 1-4-1-1 RAM failure on data bits xxxx* of high byte of memory bus 32h Test CPU bus-clock frequency 33h Initialize Phoenix Dispatch Manager 36h Warm start shut down 38h Shadow system BIOS ROM 3Ah Autosize cache
142Chapter 4 3Ch Advanced configuration of chipset registers 3Dh Load alternate registers with CMOS values 42h Initialize interrupt vectors 45h POST device initialization 46h 2-1-2-3 Check ROM copyright notice 48h Check video configuration against CMOS 49h Initialize PCI bus and devices 4Ah Initialize all video adapters in system 4Bh QuietBoot start (optional) 4Ch Shadow video BIOS ROM 4Eh Display BIOS copyright notice 50h Display CPU type and speed 51h Initialize EISA board 52h Test keyboard 54h Set key click if enabled 58h 2-2-3-1 Test for unexpected interrupts 59h Initialize POST display service 5Ah Display prompt Press F2 to enter SETUP 5Bh Disable CPU cache 5Ch Test RAM between 512 and 640 KB 60h Test extended memory 62h Test extended memory address lines 64h Jump to UserPatch1 66h Configure advanced cache registers 67h Initialize Multi Processor APIC 68h Enable external and CPU caches 69h Setup System Management Mode (SMM) area 6Ah Display external L2 cache size 6Bh Load custom defaults (optional) 6Ch Display shadow-area message 6Eh Display possible high address for UMB recovery 70h Display error messages 72h Check for configuration errors 76h Check for keyboard errors 7Ch Set up hardware interrupt vectors 7Eh Initialize coprocessor if present 80h Disable onboard Super I/O ports and IRQs 81h Late POST device initialization 82h Detect and install external RS232 ports 83h Configure non-MCD IDE controllers 84h Detect and install external parallel ports 85h Initialize PC-compatible PnP ISA devices 86h Re-initialize onboard I/O ports. CodeBeepsPOST Routine Description
Chapter 4143 87h Configure Motherboard Configurable Devices (optional) 88h Initialize BIOS Data Area 89h Enable Non-Maskable Interrupts (NMIs) 8Ah Initialize Extended BIOS Data Area 8Bh Test and initialize PS/2 mouse 8Ch Initialize floppy controller 8Fh Determine number of ATA drives (optional) 90h Initialize hard-disk controllers 91h Initialize local-bus hard-disk controllers 92h Jump to UserPatch2 93h Build MPTABLE for multi-processor boards 95h Install CD ROM for boot 96h Clear huge ES segment register 97h Fixup Multi Processor table 98h 1-2 Search for option ROMs. One long, two short beeps on checksum failure 99h Check for SMART Drive (optional) 9Ah Shadow option ROMs 9Ch Set up Power Management 9Dh Initialize security engine (optional) 9Eh Enable hardware interrupts 9Fh Determine number of ATA and SCSI drives A0h Set time of day A2h Check key lock A4h Initialize Typematic rate A8h Erase F2 prompt AAh Scan for F2 key stroke ACh Enter SETUP AEh Clear Boot flag B0h Check for errors B2h POST done - prepare to boot operating system B4h 1 One short beep before boot B5h Terminate QuietBoot (optional) B6h Check password (optional) B9h Prepare Boot BAh Initialize DMI parameters BBh Initialize PnP Option ROMs BCh Clear parity checkers BDh Display MultiBoot menu BEh Clear screen (optional) BFh Check virus and backup reminders C0h Try to boot with INT 19 C1h Initialize POST Error Manager (PEM) C2h Initialize error logging CodeBeepsPOST Routine Description
144Chapter 4 * If the BIOS detects error 2C, 2E, or 30 (base 512K RAM error), it displays an additional word-bitmap (xxxx) indicating the address line or bits that failed. For example, 2C 0002 means address line 1 (bit one set) has failed. 2E 1020 means data bits 12 and 5 (bits 12 and 5 set) have failed in the lower 16 bits. Note that error 30 cannot occur on 386SX systems because they have a 16 rather than 32-bit bus. The BIOS also sends the bitmap to the port-80 LED display. It first displays the check point code, followed by a delay, the high-order byte, another delay, and then the low-order byte of the error. It repeats this sequence continuously. C3h Initialize error display function C4h Initialize system error handler C5h PnPnd dual CMOS (optional) C6h Initialize notebook docking (optional) C7h Initialize notebook docking late C8h Force check (optional) C9h Extended checksum (optional) D2h Unknown interrupt CodeBeepsFor Boot Block in Flash ROM E0h Initialize the chipset E1h Initialize the bridge E2h Initialize the CPU E3h Initialize system timer E4h Initialize system I/O E5h Check force recovery boot E6h Checksum BIOS ROM E7h Go to BIOS E8h Set Huge Segment E9h Initialize Multi Processor EAh Initialize OEM special code EBh Initialize PIC and DMA ECh Initialize Memory type EDh Initialize Memory size EEh Shadow Boot Block EFh System memory test F0h Initialize interrupt vectors F1h Initialize Run Time Clock F2h Initialize video F3h Initialize System Management Mode F4h 1 Output one beep before boot F5h Boot to Mini DOS F6h Clear Huge Segment F7h Boot to Full DOS CodeBeepsPOST Routine Description
Chapter 5145 Jumper and Connector Locations Top View No.NameDescriptionNo.NameDescription 1 CN1 LVDS Connector 10 U14 Clock Generator 2 U1 LAN Transformer 11 U17 Card Reader Controller 3 U2 LAN Chip 12 CN11 Bluetooth Connector 4 CN3 Switch Board Connector 13 CN9 NewCard Board Connector 5 U15 BIOS Chip 14 CN7 Finger Print 6 U13 Audio Codec 15 CN5 Modem Board Connector 7 CN10 Card Bus Connector 16 CN6 TouchPad 8 U16 Card Bus Controller 17 CN4 Keyboard Connector 9 U12 EC 18 CN2 Power Board Connector Chapter 5
146Chapter 5 Bottom View No.NameDescriptionNo.NameDescription 1 PJ1 Power Jack 14 CN23 Line In Connector 2 CN12 RJ45 Connector 15 CN33 Wireless Connector 3 CN13 Docking Connector 16 CN31 Card Reader 4 CN14 Fan Connector 17 CN26 HDD Connector 5 CN15 CRT Connector 18 CN28 HDD Connector 6 CN16 MXM Card Connector 19 U30 South Bridge 7 CN17 HDMI Connector 20 CN20 ODD Connector 8 CN19 USB Connector 21 G1 CMOS Clear Jumper 9 CN21 USB Connector 22 J1 RAM Connector 10 CN29 HP Out Connector 23 J2 RAM Connector 11 CN24 Internal Microphone Connector 24 PCN1 Battery Connector 12 CN24 Microphone Connector 25 U25 CPU Socket 13 CN27 Internal Speaker Connector 26 U24 North Bridge
Chapter 5147 Clearing Password Check and BIOS Recovery This section provide you the standard operating procedures of clearing password and BIOS recovery for TravelMate 7530/7230. TravelMate 7530/7230s provide one Hardware Open Gap on main board for clearing password check, and one Hotkey for enabling BIOS Recovery. Clearing Password Check Hardware Open Gap Description Steps for Clearing BIOS Password Check If users set BIOS Password (Supervisor Password and/or User Password) for a security reason, BIOS will ask the password during systems POST or when systems enter to BIOS Setup menu. However, once it is necessary to bypass the password check, users need to short the HW Gap to clear the password by the following steps: •Power Off a system, and remove HDD, AC and Battery from the machine. •Open the back cover of the machine, and find out the HW Gap on M/B as picture. •Use an electric conductivity tool to short the two points of the HW Gap. •Plug in AC, keep the short condition on the HW Gap, and press Power Button to power on the system till BIOS POST finish. Then remove the tool from the HW Gap. •Restart system. Press F2 key to enter BIOS Setup menu. •If there is no Password request, BIOS Password is cleared. Otherwise, please follow the steps and try again. NOTE: The steps are only for clearing BIOS Password (Supervisor Password and User Password). ItemDescription R347 (RTC_RST) Clear CMOS Jumper
148Chapter 5 BIOS Recovery by Crisis Disk BIOS Recovery Boot Block: BIOS Recovery Boot Block is a special block of BIOS. It is used to boot up the system with minimum BIOS initialization. Users can enable this feature to restore the BIOS firmware to a successful one once the previous BIOS flashing process failed. BIOS Recovery Hotkey: The system provides a function hotkey: Fn+Esc, for enable BIOS Recovery process when system is powered on during BIOS POST. To use this function, it is strongly recommended to have the AC adapter and Battery present. If this function is enabled, the system will force the BIOS to enter a special BIOS block, called Boot Block. Steps for BIOS Recovery from USB Storage: Before doing this, prepare the Crisis USB key. The Crisis USB key could be made by executing the Crisis Disk program in another system with Windows XP OS. Follow the steps below: 1.Save ROM file (file name: JAL90x64.fd) to the root directory of USB storage. 2.Plug USB storage into USB port. 3.Press Fn + ESC button then plug in AC. The Power button flashes once. 4.Press Power button to initiate system CRISIS mode. When CRISIS is complete, the system auto restarts with a workable BIOS. 5.Update the latest version BIOS for this machine by regular BIOS flashing process.
Chapter 6149 FRU (Field Replaceable Unit) List This chapter gives you the FRU (Field Replaceable Unit) listing in global configurations of TravelMate 7530/7230. Refer to this chapter whenever ordering for parts to repair or for RMA (Return Merchandise Authorization). Please note that WHEN ORDERING FRU PARTS, you should check the most up-to-date information available on your regional web or channel. For whatever reasons a part number change is made, it will not be noted on the printed Service Guide. For ACER AUTHORIZED SERVICE PROVIDERS, your Acer office may have a DIFFERENT part number code from those given in the FRU list of this printed Service Guide. You MUST use the local FRU list provided by your regional Acer office to order FRU parts for repair and service of customer machines. NOTE: To scrap or to return the defective parts, you should follow the local government ordinance or regulations on how to dispose it properly, or follow the rules set by your regional Acer office on how to return it. Chapter 6
150Chapter 6 TravelMate 7530/7230 Exploded Diagrams Upper/ Lower Cover NumberDescriptionPart Number