Acer Extensa 365 Service Guide
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Disassembly and Unit Replacement 3-21 3.7 Disassembling the Display Follow these steps to disassemble the display: 1. Remove the two oval LCD bumpers at the top of the display; use a pointed instrument to remove the two mylar stickers on the bottom of the display. Figure 3-28 Removing the LCD Bumpers 2. Remove four screws on the display bezel. Figure 3-29 Removing the Display Bezel Screws STN and TFT LCDs use the same bezel but different panels.
3-22Service Guide 3. Pull out and remove the display bezel by first pulling on the inside of the bezel sides and lower bezel area. Then pull up the top bezel area. Figure 3-30 Removing the Display Bezel 4. Unplug two connectors and remove the inverter board. Figure 3-31 Removing the Inverter Board
Disassembly and Unit Replacement 3-23 5. Remove three screws on the four sides of the display panel (one screw holds and grounds the LCD cable). Then tilt the LCD Panel away for the display cover. Figure 3-32 Removing the LCD Panel 6. Detached the Display cable from the LCD Panel. Figure 3-33 Removing the display cable from LCD Panel
$S $SSHQG SHQGL[$ L[$ Model Number Definition Model Number Definition A-1 This appendix shows the model number definition of the notebook. 36 X X LCD: D: 12.1” DSTN T: 12.1” TFT CPU, Memory, HDD, FDD/CD-ROM, Battery: 5: P55C-166, 16MB, 2.1G, Internal FDD, NiMH Battery 6: P55C-166, 16MB, 2.1G, External FDD, 20x CD-ROM, NiMH Battery 7: Tillamook-200, 32MB, 2.1G, External FDD, 20x CD-ROM, NiMH Battery 8: Tillamook-200, 32MB, 2.1G, Internal FDD, NiMH Battery 9: Tillamook-233, 32MB, 3.2G, External FDD, 20x CD-ROM, NiMH Battery
$S $SSHQG SHQGL[% L[% Compatibility Test Report Excerpt This paragraph will usually be inserted into the Service Guide in the following weeks. Please check the http://ipg.intranet.acer.com.tw (Customer Services on the website) to find out when this information is available.
$SSHQGL[& $SSHQGL[& BIOS POST Checkpoints BIOS POST Checkpoints C-1 This appendix lists the POST checkpoints of the notebook BIOS. Table C-1 POST Checkpoint List CheckpointDescription 04h · Dispatch Shutdown Path Note:At the beginning of POST, port 64 bit 2 (8042 system flag) is read to determine whether this POST is caused by a cold or warm boot. If it is a cold boot, a complete POST is performed. If it is a warm boot, the chip initialization and memory test is eliminated from the POST routine. 08h · Reset PIE, AIE, UIE Note:These interrupts are disabled in order to avoid any incorrect actions from happening during the POST routine. 09h · Initialize m1531 0Ah · Initialize m1533 · Initialize m7101 10h · DMA(8237) testing & initialization 14h · System Timer(8254) testing & initialization 18h · DRAM refresh cycle testing · Set default SS:SP= 0:400 1Ch · CMOS shutdown byte test, battery, and check sum Note:Several parts of the POST routine require the system to be in protected mode. When returning to real mode from protected mode, the processor is reset, therefore POST is re-entered. In order to prevent re-initialization of the system, POST reads the shutdown code stored in location 0Fh in CMOS RAM. Then it jumps around the initialization procedure to the appropriate entry point. The CMOS shutdown byte verification assures that CMOS 0Fh area is fine to execute POST properly. · Initialize default CMOS setting if CMOS bad · Initialize RTC time base Note:The RTC has an embedded oscillator that generates a 32.768 KHz frequency. To initialize the RTC time base, turn on this oscillator and set a divisor to 32768 so that the RTC can count time correctly 1Dh, 1Eh · DRAM type determination 2Ch · 128K base memory testing · Set default SS:SP= 0:400 Note:The 128K base memory area is tested for POST execution. The remaining memory area is tested later. 20h · KB controller(8041/8042) testing · KB type determination · Write default command byte upon KB type
C-2Service Guide Table C-1 POST Checkpoint List CheckpointDescription 24h · PIC(8259) testing & initialization 30h · System Shadow RAM 34h · DRAM sizing 3Ch · Initialize interrupt vectors 4Bh · Identify CPU brand and type 35h · PCI pass 0 40h · Assign I/O if device request 41h · Assign Memory if device requested 44h · Assign IRQ if device request 45h · Enable command byte if device is OK 50h · Initialize Video display 52h · Download keyboard matrix 4Ch · ChipUp initialization for CPU clock checking 54h · Process VGA shadow region 58h · Set POST screen mode(Graphic or Text) · Display Acer(or OEM) logo if necessary · Display Acer copyright message if necessary · Display BIOS serial number 59h · Hook int vector 1ch for POST quiet boot 5Ch · Memory testing 5Ah · SMRAM test and SMI handler initialization 4Eh · Audio initialization 60h · External Cache sizing · External Cache testing(SRAM & Controller) · Enable internal cache if necessary · Enable external cache if necessary 64h · Reset KB device · Check KB status Note:The keyboard LEDs should flash once. 7Ch · Reset pointing device · Check pointing device 70h · Parallel port testing 74h · Serial port testing 78h · Math Coprocessor testing 80h · Set security status 84h · KB device initialization · Enable KB device
BIOS POST Checkpoints C-3 Table C-1 POST Checkpoint List CheckpointDescription 6Ch · FDD testing & parameter table setup Note:The FDD LED should flash once and its head should be positioned 88h · HDD testing & parameter table setup 89h · Get CPU MUX Note:This routine is to identify the user-set CPU frequency, not CPU-required frequency 90h · Display POST status if necessary 93h · Rehook int1c for quiet boot 94h · Initialize I/O ROM A4h · Initialize security feature A8h · Setup SMI parameters A0h · Initialize Timer counter for DOS use ACh · Enable NMI · Enable parity checking · Set video mode B0h · Power-on password checking · Display configuration table · Clear memory buffer used for POST · Select boot device
$S $SSHQG SHQGL[ L[ Silk Screen Silk ScreenD-1 1.1 CPU Board Layout For the mainboard layout, please refer to the next page. The following table is a reference when mounting1 the CPU. CPU Mounting Reference Table Volt. Ext Freq Ratio CPU Volt Freq R4 R6 R8 R11 R20 R22 R24 R26 RX14 RY1 RX6 RX9 RX11 RX12 UX2 UX3 P55C-133MHz 2.5V 133=66x2 V X VXVXXVV XV X X X XX P55C-150MHz 2.5V 150=60x2.5 V X VVXXVVV XV X X X XX P55C-166MHz 2.5V 166=66x2.5 V X VXXXVVV XV X X X XX TLMK-200MHz 1.8V 200=66x3 X X VXXVVXV XX V V V VV TLMK-233MHz 1.8V 233=66x3.5 X X VXVVXXV XX V V V VV TLMK-266MHz 2.0V 266=66x4 X V VXXXVVX VX V V V VV PCB No. 96532-SA CPU Board Layout (Top) 1V: mount on; X: not mount on
Silk ScreenD-2 PCB No. 96532-SA CPU Board Layout (Bottom)