Samsung Exynos 5 User Manual
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Page 851
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-109 15.5.2.64 BLENDEQ3 Base Address: 0x1440_0000 Address = Base Address + 0x024C, Reset Value = 0x0000_00C2 Name Bit Type Description Reset Value RSVD [31:22] –=Reserved=0x000= Q_FUNC_F=[21:18]=RW= Specifies the constant that is used in alphaB=(alpha= value of background (1)) 0000 = 0 (zero) 0001 = 1 (maximum) 0010 = alphaA (2) (alpha value of foreground (1)) 0011 = 1 –=alphaA= 0100 = alphaB = 0101 = 1=–=alphaB= 0110 =...
Page 852
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-110 15.5.2.65 BLENDEQ4 Base Address: 0x1440_0000 Address = Base Address + 0x0250, Reset Value = 0x0000_00C2 Name Bit Type Description Reset Value RSVD [31:22] –=Reserved=0x000= Q_FUNC_F=[21:18]=RW= Specifies the constant that is used in alphaB=(alpha= value of background (1)) 0000 = 0 (zero) 0001 = 1 (maximum) 0010 = alphaA (2) (alpha value of foreground (1)) 0011 = 1 –=alphaA= 0100 = alphaB = 0101 = 1=–=alphaB= 0110 =...
Page 853
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-111 15.5.2.66 BLENDCON Base Address: 0x1440_0000 Address = Base Address + 0x0260, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:1] –=Reserved=0x000= BLEND_NEt=[0]=RW= Specifies the=width=of alpha value.= 0 = 4-bit alpha value = 1 = 8-bit alpha value = 0x0= = =
Page 854
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-112 15.5.2.67 W013DSTERECON Base Address: 0x1440_0000 Address = Base Address + 0x0254, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:19] –=Reserved==0= WIDTe=[18:7]=RW=Specifies the Width of=frame image. W IDTH = image width= –=1=0= MERGE_EN=[6]=RW=Specifies the enable signal for ieft frame and Right frame merging block.=0= A_L_FIRST=[5]=RW=Specifies the ieft cirst signal for Alpha data.=0=...
Page 855
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-113 15.5.2.69 SHD_VIDW0nADD0 (n = 0 to 4) Base Address: 0x1440_0000 Address = Base Address + 0x40A0, 0x40A8, 0x40B0, 0x40B8, 0x40C0, Reset Value = 0x0000_0000 (SHD_VIDW00ADD0, SHD_VIDW01ADD0, SHD_VIDW02ADD0, SHD_VIDW03ADD0, SHD_VIDW04ADD0) Name Bit Type Description Reset Value VBASEU_F [31:0] R Specifies A[31:0] of the start address for Video Frame Buffer (Shadow). 0 15.5.2.70 SHD_VIDW0nADD1 (n = 0 to 4) Base Address:...
Page 856
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-114 15.5.3 Palette Memory (PalRam) 15.5.3.1 Win0 PalRam (not SFR) Base Address: 0x1440_0000 Address = Base Address + 0x2400 to 0x27FC, Reset Value = 0x0000_0000 Register Offset Type Description Reset Value 00 0x2400 (0x0400) RW Specifies the Window 0 Palette entry 0 address. Undefined 01 0x2404 (0x0404) RW Specifies the Window 0 Palette entry 1 address. Undefined : : : : : FF 0x27FC (0x07FC) RW Specifies the Window 0...
Page 857
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-115 15.5.3.3 Win2 PalRam (not SFR) Base Address: 0x1440_0000 Address = Base Address + 0x2C00 to 0x2FFC, Reset Value = 0x0000_0000 Register Offset Type Description Reset Value 00 0x2C00 RW Specifies the Window 2 Palette entry 0 address. Undefined 01 0x2C04 RW Specifies the Window 2 Palette entry 1 address. Undefined : : : : : FF 0x2FFC RW Specifies the Window 2 Palette entry 255 address. Undefined 15.5.3.4 Win3 PalRam (not...
Page 858
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-116 15.5.4 Enhancer Register 15.5.4.1 COLORGAINCON Base Address: 0x1441_0000 Address = Base Address + 0x01C0, Reset Value = 0x1004_0100 Name Bit Type Description Reset Value RSVD [31:30] –=Reserved=0= CG_RGAIN=[29:20]=RW= Specifies=the Color=dain value of Red=data (maximum= 4, 8-bit resolution).= 0h000 = 0= 0h001 = 0.00390625 (1/256)= 0h002 = 0.0078125 (2/256)= …= 0h0FF = 0.99609375 (255/256)= 0h100 = 1.0= …= 0x3FF = 3.99609375...
Page 859
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-117 15.5.5 LCDIF Register 15.5.5.1 VIDOUT_CON Base Address: 0x1442_0000 Address = Base Address + 0x0000, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value RSVD [31:17] –=Reserved=0= VIDOUT_Um=[16]=RW= Selects VIDOUT_F update timing control.= 0 = Always= 1 = Start of a frame (only once per frame)= 0= RSVD=[15:11]=–=Reserved=0= VIDOUT_F=[10:8]=RW= aetermines the output format of Video Controller.= 000== RGB...
Page 860
Samsung Confidential Exynos 5250_UM 15 Display Controller 15-118 15.5.5.2 VIDCON1 Base Address: 0x1442_0000 Address = Base Address + 0x0004, Reset Value = 0x0000_0000 Name Bit Type Description Reset Value LINECNT (read only) [26:16] R Specifies the status of the Line Counter (Read-only). Count upwards from 0 to LINEVAL 0 FSTATUS [15] R Specifies the Field Status (Read-only). 0 = ODD field 1 = EVEN field 0 VSTATUS [14:13] R Specifies the Vertical Status (Read-only). 00 = VSYNC 01...
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